1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Texas Instruments ADS1119 ADC driver.
4 *
5 * Copyright 2024 Toradex
6 */
7
8 #include <linux/bits.h>
9 #include <linux/bitfield.h>
10 #include <linux/completion.h>
11 #include <linux/delay.h>
12 #include <linux/dev_printk.h>
13 #include <linux/err.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/interrupt.h>
16 #include <linux/iopoll.h>
17 #include <linux/i2c.h>
18 #include <linux/kernel.h>
19 #include <linux/math.h>
20 #include <linux/module.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/units.h>
24
25 #include <linux/iio/iio.h>
26 #include <linux/iio/buffer.h>
27 #include <linux/iio/trigger.h>
28 #include <linux/iio/triggered_buffer.h>
29 #include <linux/iio/trigger_consumer.h>
30
31 #define ADS1119_CMD_RESET 0x06
32 #define ADS1119_CMD_POWERDOWN 0x02
33 #define ADS1119_CMD_START_SYNC 0x08
34 #define ADS1119_CMD_RDATA 0x10
35 #define ADS1119_CMD_RREG_CONFIG 0x20
36 #define ADS1119_CMD_RREG_STATUS 0x24
37 #define ADS1119_CMD_WREG 0x40
38
39 #define ADS1119_CMD_RREG(reg) (0x20 | (reg) << 2)
40
41 /* Config register */
42 #define ADS1119_REG_CONFIG 0x00
43 #define ADS1119_CONFIG_VREF_FIELD BIT(0)
44 #define ADS1119_CONFIG_CM_FIELD BIT(1)
45 #define ADS1119_CONFIG_DR_FIELD GENMASK(3, 2)
46 #define ADS1119_CONFIG_GAIN_FIELD BIT(4)
47 #define ADS1119_CONFIG_MUX_FIELD GENMASK(7, 5)
48
49 #define ADS1119_VREF_INTERNAL 0
50 #define ADS1119_VREF_EXTERNAL 1
51 #define ADS1119_VREF_INTERNAL_VAL 2048000
52
53 #define ADS1119_CM_SINGLE 0
54 #define ADS1119_CM_CONTINUOUS 1
55
56 #define ADS1119_DR_20_SPS 0
57 #define ADS1119_DR_90_SPS 1
58 #define ADS1119_DR_330_SPS 2
59 #define ADS1119_DR_1000_SPS 3
60
61 #define ADS1119_GAIN_1 0
62 #define ADS1119_GAIN_4 1
63
64 #define ADS1119_MUX_AIN0_AIN1 0
65 #define ADS1119_MUX_AIN2_AIN3 1
66 #define ADS1119_MUX_AIN1_AIN2 2
67 #define ADS1119_MUX_AIN0 3
68 #define ADS1119_MUX_AIN1 4
69 #define ADS1119_MUX_AIN2 5
70 #define ADS1119_MUX_AIN3 6
71 #define ADS1119_MUX_SHORTED 7
72
73 /* Status register */
74 #define ADS1119_REG_STATUS 0x01
75 #define ADS1119_STATUS_DRDY_FIELD BIT(7)
76
77 #define ADS1119_DEFAULT_GAIN 1
78 #define ADS1119_DEFAULT_DATARATE 20
79
80 #define ADS1119_SUSPEND_DELAY 2000
81
82 /* Timeout based on the minimum sample rate of 20 SPS (50000us) */
83 #define ADS1119_MAX_DRDY_TIMEOUT 85000
84
85 #define ADS1119_MAX_CHANNELS 7
86 #define ADS1119_MAX_SINGLE_CHANNELS 4
87
88 struct ads1119_channel_config {
89 int gain;
90 int datarate;
91 int mux;
92 };
93
94 struct ads1119_state {
95 struct completion completion;
96 struct i2c_client *client;
97 struct gpio_desc *reset_gpio;
98 struct iio_trigger *trig;
99 struct ads1119_channel_config *channels_cfg;
100 unsigned int num_channels_cfg;
101 unsigned int cached_config;
102 int vref_uV;
103 };
104
105 static const char * const ads1119_power_supplies[] = {
106 "avdd", "dvdd"
107 };
108
109 static const int ads1119_available_datarates[] = {
110 20, 90, 330, 1000,
111 };
112
113 static const int ads1119_available_gains[] = {
114 1, 1,
115 1, 4,
116 };
117
ads1119_upd_cfg_reg(struct ads1119_state * st,unsigned int fields,unsigned int val)118 static int ads1119_upd_cfg_reg(struct ads1119_state *st, unsigned int fields,
119 unsigned int val)
120 {
121 unsigned int config = st->cached_config;
122 int ret;
123
124 config &= ~fields;
125 config |= val;
126
127 ret = i2c_smbus_write_byte_data(st->client, ADS1119_CMD_WREG, config);
128 if (ret)
129 return ret;
130
131 st->cached_config = config;
132
133 return 0;
134 }
135
ads1119_data_ready(struct ads1119_state * st)136 static bool ads1119_data_ready(struct ads1119_state *st)
137 {
138 int status;
139
140 status = i2c_smbus_read_byte_data(st->client, ADS1119_CMD_RREG_STATUS);
141 if (status < 0)
142 return false;
143
144 return FIELD_GET(ADS1119_STATUS_DRDY_FIELD, status);
145 }
146
ads1119_reset(struct ads1119_state * st)147 static int ads1119_reset(struct ads1119_state *st)
148 {
149 st->cached_config = 0;
150
151 if (!st->reset_gpio)
152 return i2c_smbus_write_byte(st->client, ADS1119_CMD_RESET);
153
154 gpiod_set_value_cansleep(st->reset_gpio, 1);
155 udelay(1);
156 gpiod_set_value_cansleep(st->reset_gpio, 0);
157 udelay(1);
158
159 return 0;
160 }
161
ads1119_set_conv_mode(struct ads1119_state * st,bool continuous)162 static int ads1119_set_conv_mode(struct ads1119_state *st, bool continuous)
163 {
164 unsigned int mode;
165
166 if (continuous)
167 mode = ADS1119_CM_CONTINUOUS;
168 else
169 mode = ADS1119_CM_SINGLE;
170
171 return ads1119_upd_cfg_reg(st, ADS1119_CONFIG_CM_FIELD,
172 FIELD_PREP(ADS1119_CONFIG_CM_FIELD, mode));
173 }
174
ads1119_get_hw_gain(int gain)175 static int ads1119_get_hw_gain(int gain)
176 {
177 if (gain == 4)
178 return ADS1119_GAIN_4;
179 else
180 return ADS1119_GAIN_1;
181 }
182
ads1119_get_hw_datarate(int datarate)183 static int ads1119_get_hw_datarate(int datarate)
184 {
185 switch (datarate) {
186 case 90:
187 return ADS1119_DR_90_SPS;
188 case 330:
189 return ADS1119_DR_330_SPS;
190 case 1000:
191 return ADS1119_DR_1000_SPS;
192 case 20:
193 default:
194 return ADS1119_DR_20_SPS;
195 }
196 }
197
ads1119_configure_channel(struct ads1119_state * st,int mux,int gain,int datarate)198 static int ads1119_configure_channel(struct ads1119_state *st, int mux,
199 int gain, int datarate)
200 {
201 int ret;
202
203 ret = ads1119_upd_cfg_reg(st, ADS1119_CONFIG_MUX_FIELD,
204 FIELD_PREP(ADS1119_CONFIG_MUX_FIELD, mux));
205 if (ret)
206 return ret;
207
208 ret = ads1119_upd_cfg_reg(st, ADS1119_CONFIG_GAIN_FIELD,
209 FIELD_PREP(ADS1119_CONFIG_GAIN_FIELD,
210 ads1119_get_hw_gain(gain)));
211 if (ret)
212 return ret;
213
214 return ads1119_upd_cfg_reg(st, ADS1119_CONFIG_DR_FIELD,
215 FIELD_PREP(ADS1119_CONFIG_DR_FIELD,
216 ads1119_get_hw_datarate(datarate)));
217 }
218
ads1119_poll_data_ready(struct ads1119_state * st,struct iio_chan_spec const * chan)219 static int ads1119_poll_data_ready(struct ads1119_state *st,
220 struct iio_chan_spec const *chan)
221 {
222 unsigned int datarate = st->channels_cfg[chan->address].datarate;
223 unsigned long wait_time;
224 bool data_ready;
225
226 /* Poll 5 times more than the data rate */
227 wait_time = DIV_ROUND_CLOSEST(MICRO, 5 * datarate);
228
229 return read_poll_timeout(ads1119_data_ready, data_ready,
230 data_ready, wait_time,
231 ADS1119_MAX_DRDY_TIMEOUT, false, st);
232 }
233
ads1119_read_data(struct ads1119_state * st,struct iio_chan_spec const * chan,unsigned int * val)234 static int ads1119_read_data(struct ads1119_state *st,
235 struct iio_chan_spec const *chan,
236 unsigned int *val)
237 {
238 unsigned int timeout;
239 int ret = 0;
240
241 timeout = msecs_to_jiffies(ADS1119_MAX_DRDY_TIMEOUT);
242
243 if (!st->client->irq) {
244 ret = ads1119_poll_data_ready(st, chan);
245 if (ret)
246 return ret;
247 } else if (!wait_for_completion_timeout(&st->completion, timeout)) {
248 return -ETIMEDOUT;
249 }
250
251 ret = i2c_smbus_read_word_swapped(st->client, ADS1119_CMD_RDATA);
252 if (ret < 0)
253 return ret;
254
255 *val = ret;
256
257 return 0;
258 }
259
ads1119_single_conversion(struct ads1119_state * st,struct iio_chan_spec const * chan,int * val,bool calib_offset)260 static int ads1119_single_conversion(struct ads1119_state *st,
261 struct iio_chan_spec const *chan,
262 int *val,
263 bool calib_offset)
264 {
265 struct device *dev = &st->client->dev;
266 int mux = st->channels_cfg[chan->address].mux;
267 int gain = st->channels_cfg[chan->address].gain;
268 int datarate = st->channels_cfg[chan->address].datarate;
269 unsigned int sample;
270 int ret;
271
272 if (calib_offset)
273 mux = ADS1119_MUX_SHORTED;
274
275 ret = pm_runtime_resume_and_get(dev);
276 if (ret)
277 goto pdown;
278
279 ret = ads1119_configure_channel(st, mux, gain, datarate);
280 if (ret)
281 goto pdown;
282
283 ret = i2c_smbus_write_byte(st->client, ADS1119_CMD_START_SYNC);
284 if (ret)
285 goto pdown;
286
287 ret = ads1119_read_data(st, chan, &sample);
288 if (ret)
289 goto pdown;
290
291 *val = sign_extend32(sample, chan->scan_type.realbits - 1);
292 ret = IIO_VAL_INT;
293 pdown:
294 pm_runtime_mark_last_busy(dev);
295 pm_runtime_put_autosuspend(dev);
296 return ret;
297 }
298
ads1119_validate_datarate(struct ads1119_state * st,int datarate)299 static int ads1119_validate_datarate(struct ads1119_state *st, int datarate)
300 {
301 switch (datarate) {
302 case 20:
303 case 90:
304 case 330:
305 case 1000:
306 return datarate;
307 default:
308 return -EINVAL;
309 }
310 }
311
ads1119_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)312 static int ads1119_read_avail(struct iio_dev *indio_dev,
313 struct iio_chan_spec const *chan,
314 const int **vals, int *type, int *length,
315 long mask)
316 {
317 switch (mask) {
318 case IIO_CHAN_INFO_SCALE:
319 *type = IIO_VAL_FRACTIONAL;
320 *vals = ads1119_available_gains;
321 *length = ARRAY_SIZE(ads1119_available_gains);
322 return IIO_AVAIL_LIST;
323 case IIO_CHAN_INFO_SAMP_FREQ:
324 *type = IIO_VAL_INT;
325 *vals = ads1119_available_datarates;
326 *length = ARRAY_SIZE(ads1119_available_datarates);
327 return IIO_AVAIL_LIST;
328 default:
329 return -EINVAL;
330 }
331 }
332
ads1119_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)333 static int ads1119_read_raw(struct iio_dev *indio_dev,
334 struct iio_chan_spec const *chan, int *val,
335 int *val2, long mask)
336 {
337 struct ads1119_state *st = iio_priv(indio_dev);
338 unsigned int index = chan->address;
339 int ret;
340
341 if (index >= st->num_channels_cfg)
342 return -EINVAL;
343
344 switch (mask) {
345 case IIO_CHAN_INFO_RAW:
346 if (!iio_device_claim_direct(indio_dev))
347 return -EBUSY;
348 ret = ads1119_single_conversion(st, chan, val, false);
349 iio_device_release_direct(indio_dev);
350 return ret;
351 case IIO_CHAN_INFO_OFFSET:
352 if (!iio_device_claim_direct(indio_dev))
353 return -EBUSY;
354 ret = ads1119_single_conversion(st, chan, val, true);
355 iio_device_release_direct(indio_dev);
356 return ret;
357 case IIO_CHAN_INFO_SCALE:
358 *val = st->vref_uV / 1000;
359 *val /= st->channels_cfg[index].gain;
360 *val2 = chan->scan_type.realbits - 1;
361 return IIO_VAL_FRACTIONAL_LOG2;
362 case IIO_CHAN_INFO_SAMP_FREQ:
363 *val = st->channels_cfg[index].datarate;
364 return IIO_VAL_INT;
365 default:
366 return -EINVAL;
367 }
368 }
369
ads1119_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)370 static int ads1119_write_raw(struct iio_dev *indio_dev,
371 struct iio_chan_spec const *chan, int val,
372 int val2, long mask)
373 {
374 struct ads1119_state *st = iio_priv(indio_dev);
375 unsigned int index = chan->address;
376 int ret;
377
378 if (index >= st->num_channels_cfg)
379 return -EINVAL;
380
381 switch (mask) {
382 case IIO_CHAN_INFO_SCALE:
383 ret = MICRO / ((val * MICRO) + val2);
384 if (ret != 1 && ret != 4)
385 return -EINVAL;
386
387 st->channels_cfg[index].gain = ret;
388 return 0;
389 case IIO_CHAN_INFO_SAMP_FREQ:
390 ret = ads1119_validate_datarate(st, val);
391 if (ret < 0)
392 return ret;
393
394 st->channels_cfg[index].datarate = ret;
395 return 0;
396 default:
397 return -EINVAL;
398 }
399 }
400
ads1119_debugfs_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)401 static int ads1119_debugfs_reg_access(struct iio_dev *indio_dev,
402 unsigned int reg, unsigned int writeval,
403 unsigned int *readval)
404 {
405 struct ads1119_state *st = iio_priv(indio_dev);
406 int ret;
407
408 if (reg > ADS1119_REG_STATUS)
409 return -EINVAL;
410
411 if (readval) {
412 ret = i2c_smbus_read_byte_data(st->client,
413 ADS1119_CMD_RREG(reg));
414 if (ret < 0)
415 return ret;
416
417 *readval = ret;
418 return 0;
419 }
420
421 if (reg > ADS1119_REG_CONFIG)
422 return -EINVAL;
423
424 return i2c_smbus_write_byte_data(st->client, ADS1119_CMD_WREG,
425 writeval);
426 }
427
428 static const struct iio_info ads1119_info = {
429 .read_avail = ads1119_read_avail,
430 .read_raw = ads1119_read_raw,
431 .write_raw = ads1119_write_raw,
432 .debugfs_reg_access = ads1119_debugfs_reg_access,
433 };
434
ads1119_triggered_buffer_preenable(struct iio_dev * indio_dev)435 static int ads1119_triggered_buffer_preenable(struct iio_dev *indio_dev)
436 {
437 struct ads1119_state *st = iio_priv(indio_dev);
438 struct device *dev = &st->client->dev;
439 unsigned int index;
440 int ret;
441
442 index = find_first_bit(indio_dev->active_scan_mask,
443 iio_get_masklength(indio_dev));
444
445 ret = ads1119_set_conv_mode(st, true);
446 if (ret)
447 return ret;
448
449 ret = ads1119_configure_channel(st,
450 st->channels_cfg[index].mux,
451 st->channels_cfg[index].gain,
452 st->channels_cfg[index].datarate);
453 if (ret)
454 return ret;
455
456 ret = pm_runtime_resume_and_get(dev);
457 if (ret)
458 return ret;
459
460 return i2c_smbus_write_byte(st->client, ADS1119_CMD_START_SYNC);
461 }
462
ads1119_triggered_buffer_postdisable(struct iio_dev * indio_dev)463 static int ads1119_triggered_buffer_postdisable(struct iio_dev *indio_dev)
464 {
465 struct ads1119_state *st = iio_priv(indio_dev);
466 struct device *dev = &st->client->dev;
467 int ret;
468
469 ret = ads1119_set_conv_mode(st, false);
470 if (ret)
471 return ret;
472
473 pm_runtime_mark_last_busy(dev);
474 pm_runtime_put_autosuspend(dev);
475
476 return 0;
477 }
478
479 static const struct iio_buffer_setup_ops ads1119_buffer_setup_ops = {
480 .preenable = ads1119_triggered_buffer_preenable,
481 .postdisable = ads1119_triggered_buffer_postdisable,
482 .validate_scan_mask = &iio_validate_scan_mask_onehot,
483 };
484
485 static const struct iio_trigger_ops ads1119_trigger_ops = {
486 .validate_device = &iio_trigger_validate_own_device,
487 };
488
ads1119_irq_handler(int irq,void * dev_id)489 static irqreturn_t ads1119_irq_handler(int irq, void *dev_id)
490 {
491 struct iio_dev *indio_dev = dev_id;
492 struct ads1119_state *st = iio_priv(indio_dev);
493
494 if (iio_buffer_enabled(indio_dev) && iio_trigger_using_own(indio_dev))
495 iio_trigger_poll(indio_dev->trig);
496 else
497 complete(&st->completion);
498
499 return IRQ_HANDLED;
500 }
501
ads1119_trigger_handler(int irq,void * private)502 static irqreturn_t ads1119_trigger_handler(int irq, void *private)
503 {
504 struct iio_poll_func *pf = private;
505 struct iio_dev *indio_dev = pf->indio_dev;
506 struct ads1119_state *st = iio_priv(indio_dev);
507 struct {
508 s16 sample;
509 aligned_s64 timestamp;
510 } scan = { };
511 unsigned int index;
512 int ret;
513
514 if (!iio_trigger_using_own(indio_dev)) {
515 index = find_first_bit(indio_dev->active_scan_mask,
516 iio_get_masklength(indio_dev));
517
518 ret = ads1119_poll_data_ready(st, &indio_dev->channels[index]);
519 if (ret) {
520 dev_err(&st->client->dev,
521 "Failed to poll data on trigger (%d)\n", ret);
522 goto done;
523 }
524 }
525
526 ret = i2c_smbus_read_word_swapped(st->client, ADS1119_CMD_RDATA);
527 if (ret < 0) {
528 dev_err(&st->client->dev,
529 "Failed to read data on trigger (%d)\n", ret);
530 goto done;
531 }
532
533 scan.sample = ret;
534
535 iio_push_to_buffers_with_ts(indio_dev, &scan, sizeof(scan),
536 iio_get_time_ns(indio_dev));
537 done:
538 iio_trigger_notify_done(indio_dev->trig);
539 return IRQ_HANDLED;
540 }
541
ads1119_init(struct ads1119_state * st,bool vref_external)542 static int ads1119_init(struct ads1119_state *st, bool vref_external)
543 {
544 int ret;
545
546 ret = ads1119_reset(st);
547 if (ret)
548 return ret;
549
550 if (vref_external)
551 return ads1119_upd_cfg_reg(st,
552 ADS1119_CONFIG_VREF_FIELD,
553 FIELD_PREP(ADS1119_CONFIG_VREF_FIELD,
554 ADS1119_VREF_EXTERNAL));
555 return 0;
556 }
557
ads1119_map_analog_inputs_mux(int ain_pos,int ain_neg,bool differential)558 static int ads1119_map_analog_inputs_mux(int ain_pos, int ain_neg,
559 bool differential)
560 {
561 if (ain_pos >= ADS1119_MAX_SINGLE_CHANNELS)
562 return -EINVAL;
563
564 if (!differential)
565 return ADS1119_MUX_AIN0 + ain_pos;
566
567 if (ain_pos == 0 && ain_neg == 1)
568 return ADS1119_MUX_AIN0_AIN1;
569 else if (ain_pos == 1 && ain_neg == 2)
570 return ADS1119_MUX_AIN1_AIN2;
571 else if (ain_pos == 2 && ain_neg == 3)
572 return ADS1119_MUX_AIN2_AIN3;
573
574 return -EINVAL;
575 }
576
ads1119_alloc_and_config_channels(struct iio_dev * indio_dev)577 static int ads1119_alloc_and_config_channels(struct iio_dev *indio_dev)
578 {
579 const struct iio_chan_spec ads1119_channel =
580 (const struct iio_chan_spec) {
581 .type = IIO_VOLTAGE,
582 .indexed = 1,
583 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
584 BIT(IIO_CHAN_INFO_SCALE) |
585 BIT(IIO_CHAN_INFO_OFFSET) |
586 BIT(IIO_CHAN_INFO_SAMP_FREQ),
587 .info_mask_shared_by_all_available =
588 BIT(IIO_CHAN_INFO_SCALE) |
589 BIT(IIO_CHAN_INFO_SAMP_FREQ),
590 .scan_type = {
591 .sign = 's',
592 .realbits = 16,
593 .storagebits = 16,
594 .endianness = IIO_CPU,
595 },
596 };
597 const struct iio_chan_spec ads1119_ts = IIO_CHAN_SOFT_TIMESTAMP(0);
598 struct ads1119_state *st = iio_priv(indio_dev);
599 struct iio_chan_spec *iio_channels, *chan;
600 struct device *dev = &st->client->dev;
601 unsigned int num_channels, i;
602 bool differential;
603 u32 ain[2];
604 int ret;
605
606 st->num_channels_cfg = device_get_child_node_count(dev);
607 if (st->num_channels_cfg > ADS1119_MAX_CHANNELS)
608 return dev_err_probe(dev, -EINVAL,
609 "Too many channels %d, max is %d\n",
610 st->num_channels_cfg,
611 ADS1119_MAX_CHANNELS);
612
613 st->channels_cfg = devm_kcalloc(dev, st->num_channels_cfg,
614 sizeof(*st->channels_cfg), GFP_KERNEL);
615 if (!st->channels_cfg)
616 return -ENOMEM;
617
618 /* Allocate one more iio channel for the timestamp */
619 num_channels = st->num_channels_cfg + 1;
620 iio_channels = devm_kcalloc(dev, num_channels, sizeof(*iio_channels),
621 GFP_KERNEL);
622 if (!iio_channels)
623 return -ENOMEM;
624
625 i = 0;
626
627 device_for_each_child_node_scoped(dev, child) {
628 chan = &iio_channels[i];
629
630 differential = fwnode_property_present(child, "diff-channels");
631 if (differential)
632 ret = fwnode_property_read_u32_array(child,
633 "diff-channels",
634 ain, 2);
635 else
636 ret = fwnode_property_read_u32(child, "single-channel",
637 &ain[0]);
638
639 if (ret)
640 return dev_err_probe(dev, ret,
641 "Failed to get channel property\n");
642
643 ret = ads1119_map_analog_inputs_mux(ain[0], ain[1],
644 differential);
645 if (ret < 0)
646 return dev_err_probe(dev, ret,
647 "Invalid channel value\n");
648
649 st->channels_cfg[i].mux = ret;
650 st->channels_cfg[i].gain = ADS1119_DEFAULT_GAIN;
651 st->channels_cfg[i].datarate = ADS1119_DEFAULT_DATARATE;
652
653 *chan = ads1119_channel;
654 chan->channel = ain[0];
655 chan->address = i;
656 chan->scan_index = i;
657
658 if (differential) {
659 chan->channel2 = ain[1];
660 chan->differential = 1;
661 }
662
663 dev_dbg(dev, "channel: index %d, mux %d\n", i,
664 st->channels_cfg[i].mux);
665
666 i++;
667 }
668
669 iio_channels[i] = ads1119_ts;
670 iio_channels[i].address = i;
671 iio_channels[i].scan_index = i;
672
673 indio_dev->channels = iio_channels;
674 indio_dev->num_channels = num_channels;
675
676 return 0;
677 }
678
ads1119_powerdown(void * data)679 static void ads1119_powerdown(void *data)
680 {
681 struct ads1119_state *st = data;
682
683 i2c_smbus_write_byte(st->client, ADS1119_CMD_POWERDOWN);
684 }
685
ads1119_probe(struct i2c_client * client)686 static int ads1119_probe(struct i2c_client *client)
687 {
688 struct iio_dev *indio_dev;
689 struct ads1119_state *st;
690 struct device *dev = &client->dev;
691 bool vref_external = true;
692 int ret;
693
694 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
695 if (!indio_dev)
696 return dev_err_probe(dev, -ENOMEM,
697 "Failed to allocate IIO device\n");
698
699 st = iio_priv(indio_dev);
700 st->client = client;
701
702 indio_dev->name = "ads1119";
703 indio_dev->info = &ads1119_info;
704 indio_dev->modes = INDIO_DIRECT_MODE;
705
706 i2c_set_clientdata(client, indio_dev);
707
708 ret = devm_regulator_bulk_get_enable(dev,
709 ARRAY_SIZE(ads1119_power_supplies),
710 ads1119_power_supplies);
711 if (ret)
712 return dev_err_probe(dev, ret,
713 "Failed to get and enable supplies\n");
714
715 st->vref_uV = devm_regulator_get_enable_read_voltage(dev, "vref");
716 if (st->vref_uV == -ENODEV) {
717 vref_external = false;
718 st->vref_uV = ADS1119_VREF_INTERNAL_VAL;
719 } else if (st->vref_uV < 0) {
720 return dev_err_probe(dev, st->vref_uV, "Failed to get vref\n");
721 }
722
723 st->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
724 if (IS_ERR(st->reset_gpio))
725 return dev_err_probe(dev, PTR_ERR(st->reset_gpio),
726 "Failed to get reset gpio\n");
727
728 ret = ads1119_alloc_and_config_channels(indio_dev);
729 if (ret)
730 return ret;
731
732 init_completion(&st->completion);
733
734 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
735 ads1119_trigger_handler,
736 &ads1119_buffer_setup_ops);
737 if (ret)
738 return dev_err_probe(dev, ret, "Failed to setup IIO buffer\n");
739
740 if (client->irq > 0) {
741 ret = devm_request_threaded_irq(dev, client->irq,
742 ads1119_irq_handler,
743 NULL, IRQF_ONESHOT,
744 "ads1119", indio_dev);
745 if (ret)
746 return dev_err_probe(dev, ret,
747 "Failed to allocate irq\n");
748
749 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
750 indio_dev->name,
751 iio_device_id(indio_dev));
752 if (!st->trig)
753 return dev_err_probe(dev, -ENOMEM,
754 "Failed to allocate IIO trigger\n");
755
756 st->trig->ops = &ads1119_trigger_ops;
757 iio_trigger_set_drvdata(st->trig, indio_dev);
758
759 ret = devm_iio_trigger_register(dev, st->trig);
760 if (ret)
761 return dev_err_probe(dev, ret,
762 "Failed to register IIO trigger\n");
763 }
764
765 ret = ads1119_init(st, vref_external);
766 if (ret)
767 return dev_err_probe(dev, ret,
768 "Failed to initialize device\n");
769
770 pm_runtime_set_autosuspend_delay(dev, ADS1119_SUSPEND_DELAY);
771 pm_runtime_use_autosuspend(dev);
772 pm_runtime_mark_last_busy(dev);
773 pm_runtime_set_active(dev);
774
775 ret = devm_pm_runtime_enable(dev);
776 if (ret)
777 return dev_err_probe(dev, ret, "Failed to enable pm runtime\n");
778
779 ret = devm_add_action_or_reset(dev, ads1119_powerdown, st);
780 if (ret)
781 return dev_err_probe(dev, ret,
782 "Failed to add powerdown action\n");
783
784 return devm_iio_device_register(dev, indio_dev);
785 }
786
ads1119_runtime_suspend(struct device * dev)787 static int ads1119_runtime_suspend(struct device *dev)
788 {
789 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
790 struct ads1119_state *st = iio_priv(indio_dev);
791
792 return i2c_smbus_write_byte(st->client, ADS1119_CMD_POWERDOWN);
793 }
794
795 /*
796 * The ADS1119 does not require a resume function because it automatically
797 * powers on after a reset.
798 * After a power down command, the ADS1119 can still communicate but turns off
799 * its analog parts. To resume from power down, the device will power up again
800 * upon receiving a start/sync command.
801 */
802 static DEFINE_RUNTIME_DEV_PM_OPS(ads1119_pm_ops, ads1119_runtime_suspend,
803 NULL, NULL);
804
805 static const struct of_device_id __maybe_unused ads1119_of_match[] = {
806 { .compatible = "ti,ads1119" },
807 { }
808 };
809 MODULE_DEVICE_TABLE(of, ads1119_of_match);
810
811 static const struct i2c_device_id ads1119_id[] = {
812 { "ads1119" },
813 { }
814 };
815 MODULE_DEVICE_TABLE(i2c, ads1119_id);
816
817 static struct i2c_driver ads1119_driver = {
818 .driver = {
819 .name = "ads1119",
820 .of_match_table = ads1119_of_match,
821 .pm = pm_ptr(&ads1119_pm_ops),
822 },
823 .probe = ads1119_probe,
824 .id_table = ads1119_id,
825 };
826 module_i2c_driver(ads1119_driver);
827
828 MODULE_AUTHOR("João Paulo Gonçalves <joao.goncalves@toradex.com>");
829 MODULE_DESCRIPTION("Texas Instruments ADS1119 ADC Driver");
830 MODULE_LICENSE("GPL");
831