1 /*-
2 * Copyright (c) 2011, 2025 Chelsio Communications.
3 * Written by: Navdeep Parhar <np@FreeBSD.org>
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #define _WANT_SFF_8472_ID
28
29 #include <sys/param.h>
30 #include <sys/ioctl.h>
31 #include <sys/mman.h>
32 #include <sys/socket.h>
33 #include <sys/stat.h>
34 #include <sys/sysctl.h>
35
36 #include <arpa/inet.h>
37 #include <net/ethernet.h>
38 #include <net/sff8472.h>
39 #include <netinet/in.h>
40
41 #include <ctype.h>
42 #include <err.h>
43 #include <errno.h>
44 #include <fcntl.h>
45 #include <limits.h>
46 #include <stdbool.h>
47 #include <stdint.h>
48 #include <stdio.h>
49 #include <stdlib.h>
50 #include <string.h>
51 #include <unistd.h>
52 #include <pcap.h>
53
54 #include "t4_ioctl.h"
55 #include "tcb_common.h"
56
57 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
58 #define max(x, y) ((x) > (y) ? (x) : (y))
59
60 static struct {
61 const char *progname, *nexus;
62 int chip_id; /* 4 for T4, 5 for T5, and so on. */
63 int inst; /* instance of nexus device */
64 int pf; /* PF# of the nexus (if not VF). */
65 bool vf; /* Nexus is a VF. */
66
67 int fd;
68 bool warn_on_ioctl_err;
69 } g;
70
71 struct reg_info {
72 const char *name;
73 uint32_t addr;
74 uint32_t len;
75 };
76
77 struct mod_regs {
78 const char *name;
79 const struct reg_info *ri;
80 };
81
82 struct field_desc {
83 const char *name; /* Field name */
84 unsigned short start; /* Start bit position */
85 unsigned short end; /* End bit position */
86 unsigned char shift; /* # of low order bits omitted and implicitly 0 */
87 unsigned char hex; /* Print field in hex instead of decimal */
88 unsigned char islog2; /* Field contains the base-2 log of the value */
89 };
90
91 #include "reg_defs_t4.c"
92 #include "reg_defs_t5.c"
93 #include "reg_defs_t6.c"
94 #include "reg_defs_t7.c"
95 #include "reg_defs_t4vf.c"
96
97 static void
usage(FILE * fp)98 usage(FILE *fp)
99 {
100 fprintf(fp, "Usage: %s <nexus> [operation]\n", g.progname);
101 fprintf(fp,
102 "\tclearstats <port> clear port statistics\n"
103 "\tclip hold|release <ip6> hold/release an address\n"
104 "\tclip list list the CLIP table\n"
105 "\tcontext <type> <id> show an SGE context\n"
106 "\tdumpstate <dump.bin> dump chip state\n"
107 "\tfilter <idx> [<param> <val>] ... set a filter\n"
108 "\tfilter <idx> delete|clear [prio 1] delete a filter\n"
109 "\tfilter list list all filters\n"
110 "\tfilter mode [<match>] ... get/set global filter mode\n"
111 "\thashfilter [<param> <val>] ... set a hashfilter\n"
112 "\thashfilter <idx> delete|clear delete a hashfilter\n"
113 "\thashfilter list list all hashfilters\n"
114 "\thashfilter mode [<match>] ... get/set global hashfilter mode\n"
115 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n"
116 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n"
117 "\tloadboot clear [pf|offset <val>] remove boot image\n"
118 "\tloadboot-cfg <bc.bin> install boot config\n"
119 "\tloadboot-cfg clear remove boot config\n"
120 "\tloadcfg <fw-config.txt> install configuration file\n"
121 "\tloadcfg clear remove configuration file\n"
122 "\tloadfw <fw-image.bin> install firmware\n"
123 "\tmemdump <addr> <len> dump a memory range\n"
124 "\tmodinfo <port> [raw] optics/cable information\n"
125 "\tpolicy <policy.txt> install offload policy\n"
126 "\tpolicy clear remove offload policy\n"
127 "\treg <address>[=<val>] read/write register\n"
128 "\treg64 <address>[=<val>] read/write 64 bit register\n"
129 "\tregdump [<module>] ... dump registers\n"
130 "\tsched-class params <param> <val> .. configure TX scheduler class\n"
131 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n"
132 "\tstdio interactive mode\n"
133 "\ttcb <tid> read TCB\n"
134 "\ttracer <idx> tx<n>|rx<n>|lo<n> set and enable a tracer\n"
135 "\ttracer <idx> disable|enable disable or enable a tracer\n"
136 "\ttracer list list all tracers\n"
137 );
138 }
139
140 static inline unsigned int
get_card_vers(unsigned int version)141 get_card_vers(unsigned int version)
142 {
143 return (version & 0x3ff);
144 }
145
146 static int
real_doit(unsigned long cmd,void * data,const char * cmdstr)147 real_doit(unsigned long cmd, void *data, const char *cmdstr)
148 {
149 if (ioctl(g.fd, cmd, data) < 0) {
150 if (g.warn_on_ioctl_err)
151 warn("%s", cmdstr);
152 return (errno);
153 }
154 return (0);
155 }
156 #define doit(x, y) real_doit(x, y, #x)
157
158 static char *
str_to_number(const char * s,long * val,long long * vall)159 str_to_number(const char *s, long *val, long long *vall)
160 {
161 char *p;
162
163 if (vall)
164 *vall = strtoll(s, &p, 0);
165 else if (val)
166 *val = strtol(s, &p, 0);
167 else
168 p = NULL;
169
170 return (p);
171 }
172
173 static int
read_reg(long addr,int size,long long * val)174 read_reg(long addr, int size, long long *val)
175 {
176 struct t4_reg reg;
177 int rc;
178
179 reg.addr = (uint32_t) addr;
180 reg.size = (uint32_t) size;
181 reg.val = 0;
182
183 rc = doit(CHELSIO_T4_GETREG, ®);
184
185 *val = reg.val;
186
187 return (rc);
188 }
189
190 static int
write_reg(long addr,int size,long long val)191 write_reg(long addr, int size, long long val)
192 {
193 struct t4_reg reg;
194
195 reg.addr = (uint32_t) addr;
196 reg.size = (uint32_t) size;
197 reg.val = (uint64_t) val;
198
199 return doit(CHELSIO_T4_SETREG, ®);
200 }
201
202 static int
register_io(int argc,const char * argv[],int size)203 register_io(int argc, const char *argv[], int size)
204 {
205 char *p, *v;
206 long addr;
207 long long val;
208 int w = 0, rc;
209
210 if (argc == 1) {
211 /* <reg> OR <reg>=<value> */
212
213 p = str_to_number(argv[0], &addr, NULL);
214 if (*p) {
215 if (*p != '=') {
216 warnx("invalid register \"%s\"", argv[0]);
217 return (EINVAL);
218 }
219
220 w = 1;
221 v = p + 1;
222 p = str_to_number(v, NULL, &val);
223
224 if (*p) {
225 warnx("invalid value \"%s\"", v);
226 return (EINVAL);
227 }
228 }
229
230 } else if (argc == 2) {
231 /* <reg> <value> */
232
233 w = 1;
234
235 p = str_to_number(argv[0], &addr, NULL);
236 if (*p) {
237 warnx("invalid register \"%s\"", argv[0]);
238 return (EINVAL);
239 }
240
241 p = str_to_number(argv[1], NULL, &val);
242 if (*p) {
243 warnx("invalid value \"%s\"", argv[1]);
244 return (EINVAL);
245 }
246 } else {
247 warnx("reg: invalid number of arguments (%d)", argc);
248 return (EINVAL);
249 }
250
251 if (w)
252 rc = write_reg(addr, size, val);
253 else {
254 rc = read_reg(addr, size, &val);
255 if (rc == 0)
256 printf("0x%llx [%llu]\n", val, val);
257 }
258
259 return (rc);
260 }
261
262 static inline uint32_t
xtract(uint32_t val,int shift,int len)263 xtract(uint32_t val, int shift, int len)
264 {
265 return (val >> shift) & ((1 << len) - 1);
266 }
267
268 static int
dump_block_regs(const struct reg_info * reg_array,const uint32_t * regs)269 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs)
270 {
271 uint32_t reg_val = 0;
272
273 for ( ; reg_array->name; ++reg_array)
274 if (!reg_array->len) {
275 reg_val = regs[reg_array->addr / 4];
276 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr,
277 reg_array->name, reg_val, reg_val);
278 } else {
279 uint32_t v = xtract(reg_val, reg_array->addr,
280 reg_array->len);
281
282 printf(" %*u:%u %-47s %#-10x %u\n",
283 reg_array->addr < 10 ? 3 : 2,
284 reg_array->addr + reg_array->len - 1,
285 reg_array->addr, reg_array->name, v, v);
286 }
287
288 return (1);
289 }
290
291 static int
dump_regs_table(int argc,const char * argv[],const uint32_t * regs,const struct mod_regs * modtab,int nmodules)292 dump_regs_table(int argc, const char *argv[], const uint32_t *regs,
293 const struct mod_regs *modtab, int nmodules)
294 {
295 int i, j, match;
296
297 for (i = 0; i < argc; i++) {
298 for (j = 0; j < nmodules; j++) {
299 if (!strcmp(argv[i], modtab[j].name))
300 break;
301 }
302
303 if (j == nmodules) {
304 warnx("invalid register block \"%s\"", argv[i]);
305 fprintf(stderr, "\nAvailable blocks:");
306 for ( ; nmodules; nmodules--, modtab++)
307 fprintf(stderr, " %s", modtab->name);
308 fprintf(stderr, "\n");
309 return (EINVAL);
310 }
311 }
312
313 for ( ; nmodules; nmodules--, modtab++) {
314
315 match = argc == 0 ? 1 : 0;
316 for (i = 0; !match && i < argc; i++) {
317 if (!strcmp(argv[i], modtab->name))
318 match = 1;
319 }
320
321 if (match)
322 dump_block_regs(modtab->ri, regs);
323 }
324
325 return (0);
326 }
327
328 #define T4_MODREGS(name) { #name, t4_##name##_regs }
329 static int
dump_regs_t4(int argc,const char * argv[],const uint32_t * regs)330 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs)
331 {
332 static struct mod_regs t4_mod[] = {
333 T4_MODREGS(sge),
334 { "pci", t4_pcie_regs },
335 T4_MODREGS(dbg),
336 T4_MODREGS(mc),
337 T4_MODREGS(ma),
338 { "edc0", t4_edc_0_regs },
339 { "edc1", t4_edc_1_regs },
340 T4_MODREGS(cim),
341 T4_MODREGS(tp),
342 T4_MODREGS(ulp_rx),
343 T4_MODREGS(ulp_tx),
344 { "pmrx", t4_pm_rx_regs },
345 { "pmtx", t4_pm_tx_regs },
346 T4_MODREGS(mps),
347 { "cplsw", t4_cpl_switch_regs },
348 T4_MODREGS(smb),
349 { "i2c", t4_i2cm_regs },
350 T4_MODREGS(mi),
351 T4_MODREGS(uart),
352 T4_MODREGS(pmu),
353 T4_MODREGS(sf),
354 T4_MODREGS(pl),
355 T4_MODREGS(le),
356 T4_MODREGS(ncsi),
357 T4_MODREGS(xgmac)
358 };
359
360 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod));
361 }
362 #undef T4_MODREGS
363
364 #define T5_MODREGS(name) { #name, t5_##name##_regs }
365 static int
dump_regs_t5(int argc,const char * argv[],const uint32_t * regs)366 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs)
367 {
368 static struct mod_regs t5_mod[] = {
369 T5_MODREGS(sge),
370 { "pci", t5_pcie_regs },
371 T5_MODREGS(dbg),
372 { "mc0", t5_mc_0_regs },
373 { "mc1", t5_mc_1_regs },
374 T5_MODREGS(ma),
375 { "edc0", t5_edc_t50_regs },
376 { "edc1", t5_edc_t51_regs },
377 T5_MODREGS(cim),
378 T5_MODREGS(tp),
379 { "ulprx", t5_ulp_rx_regs },
380 { "ulptx", t5_ulp_tx_regs },
381 { "pmrx", t5_pm_rx_regs },
382 { "pmtx", t5_pm_tx_regs },
383 T5_MODREGS(mps),
384 { "cplsw", t5_cpl_switch_regs },
385 T5_MODREGS(smb),
386 { "i2c", t5_i2cm_regs },
387 T5_MODREGS(mi),
388 T5_MODREGS(uart),
389 T5_MODREGS(pmu),
390 T5_MODREGS(sf),
391 T5_MODREGS(pl),
392 T5_MODREGS(le),
393 T5_MODREGS(ncsi),
394 T5_MODREGS(mac),
395 { "hma", t5_hma_t5_regs }
396 };
397
398 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod));
399 }
400 #undef T5_MODREGS
401
402 #define T6_MODREGS(name) { #name, t6_##name##_regs }
403 static int
dump_regs_t6(int argc,const char * argv[],const uint32_t * regs)404 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs)
405 {
406 static struct mod_regs t6_mod[] = {
407 T6_MODREGS(sge),
408 { "pci", t6_pcie_regs },
409 T6_MODREGS(dbg),
410 { "mc0", t6_mc_0_regs },
411 T6_MODREGS(ma),
412 { "edc0", t6_edc_t60_regs },
413 { "edc1", t6_edc_t61_regs },
414 T6_MODREGS(cim),
415 T6_MODREGS(tp),
416 { "ulprx", t6_ulp_rx_regs },
417 { "ulptx", t6_ulp_tx_regs },
418 { "pmrx", t6_pm_rx_regs },
419 { "pmtx", t6_pm_tx_regs },
420 T6_MODREGS(mps),
421 { "cplsw", t6_cpl_switch_regs },
422 T6_MODREGS(smb),
423 { "i2c", t6_i2cm_regs },
424 T6_MODREGS(mi),
425 T6_MODREGS(uart),
426 T6_MODREGS(pmu),
427 T6_MODREGS(sf),
428 T6_MODREGS(pl),
429 T6_MODREGS(le),
430 T6_MODREGS(ncsi),
431 T6_MODREGS(mac),
432 { "hma", t6_hma_t6_regs }
433 };
434
435 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod));
436 }
437 #undef T6_MODREGS
438
439 #define T7_MODREGS(name) { #name, t7_##name##_regs }
440 static int
dump_regs_t7(int argc,const char * argv[],const uint32_t * regs)441 dump_regs_t7(int argc, const char *argv[], const uint32_t *regs)
442 {
443 static struct mod_regs t7_mod[] = {
444 T7_MODREGS(sge),
445 { "pci", t7_pcie_regs },
446 T7_MODREGS(dbg),
447 { "mc0", t7_mc_t70_regs },
448 T7_MODREGS(ma),
449 { "edc0", t7_edc_t60_regs },
450 { "edc1", t7_edc_t61_regs },
451 T7_MODREGS(cim),
452 T7_MODREGS(tp),
453 { "ulprx", t7_ulp_rx_regs },
454 { "ulptx", t7_ulp_tx_regs },
455 { "pmrx", t7_pm_rx_regs },
456 { "pmtx", t7_pm_tx_regs },
457 T7_MODREGS(mps),
458 { "cplsw", t7_cpl_switch_regs },
459 T7_MODREGS(smb),
460 { "i2c", t7_i2cm_regs },
461 T7_MODREGS(mi),
462 T7_MODREGS(uart),
463 T7_MODREGS(pmu),
464 T7_MODREGS(sf),
465 T7_MODREGS(pl),
466 T7_MODREGS(le),
467 T7_MODREGS(ncsi),
468 { "mac", t7_mac_t7_regs },
469 { "hma", t7_hma_t6_regs },
470 { "crypto0", t7_crypto_0_regs },
471 { "crypto1", t7_crypto_1_regs },
472 { "cryptokey", t7_crypto_key_regs },
473 T7_MODREGS(arm),
474 T7_MODREGS(gcache),
475 };
476
477 return dump_regs_table(argc, argv, regs, t7_mod, nitems(t7_mod));
478 }
479 #undef T7_MODREGS
480
481 static int
dump_regs_t4vf(int argc,const char * argv[],const uint32_t * regs)482 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs)
483 {
484 static struct mod_regs t4vf_mod[] = {
485 { "sge", t4vf_sge_regs },
486 { "mps", t4vf_mps_regs },
487 { "pl", t4vf_pl_regs },
488 { "mbdata", t4vf_mbdata_regs },
489 { "cim", t4vf_cim_regs },
490 };
491
492 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod));
493 }
494
495 static int
dump_regs_t5vf(int argc,const char * argv[],const uint32_t * regs)496 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs)
497 {
498 static struct mod_regs t5vf_mod[] = {
499 { "sge", t5vf_sge_regs },
500 { "mps", t4vf_mps_regs },
501 { "pl", t5vf_pl_regs },
502 { "mbdata", t4vf_mbdata_regs },
503 { "cim", t4vf_cim_regs },
504 };
505
506 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod));
507 }
508
509 static int
dump_regs_t6vf(int argc,const char * argv[],const uint32_t * regs)510 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs)
511 {
512 static struct mod_regs t6vf_mod[] = {
513 { "sge", t5vf_sge_regs },
514 { "mps", t4vf_mps_regs },
515 { "pl", t6vf_pl_regs },
516 { "mbdata", t4vf_mbdata_regs },
517 { "cim", t4vf_cim_regs },
518 };
519
520 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod));
521 }
522
523 static int
dump_regs_t7vf(int argc,const char * argv[],const uint32_t * regs)524 dump_regs_t7vf(int argc, const char *argv[], const uint32_t *regs)
525 {
526 static struct mod_regs t7vf_mod[] = {
527 { "sge", t5vf_sge_regs },
528 { "mps", t4vf_mps_regs },
529 { "pl", t7vf_pl_regs },
530 { "mbdata", t4vf_mbdata_regs },
531 { "cim", t4vf_cim_regs },
532 };
533
534 return dump_regs_table(argc, argv, regs, t7vf_mod, nitems(t7vf_mod));
535 }
536
537 static int
dump_regs(int argc,const char * argv[])538 dump_regs(int argc, const char *argv[])
539 {
540 int vers, revision, rc;
541 struct t4_regdump regs;
542 uint32_t len;
543
544 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE);
545 regs.data = calloc(1, len);
546 if (regs.data == NULL) {
547 warnc(ENOMEM, "regdump");
548 return (ENOMEM);
549 }
550
551 regs.len = len;
552 rc = doit(CHELSIO_T4_REGDUMP, ®s);
553 if (rc != 0)
554 return (rc);
555
556 vers = get_card_vers(regs.version);
557 revision = (regs.version >> 10) & 0x3f;
558
559 if (vers == 4) {
560 if (revision == 0x3f)
561 rc = dump_regs_t4vf(argc, argv, regs.data);
562 else
563 rc = dump_regs_t4(argc, argv, regs.data);
564 } else if (vers == 5) {
565 if (revision == 0x3f)
566 rc = dump_regs_t5vf(argc, argv, regs.data);
567 else
568 rc = dump_regs_t5(argc, argv, regs.data);
569 } else if (vers == 6) {
570 if (revision == 0x3f)
571 rc = dump_regs_t6vf(argc, argv, regs.data);
572 else
573 rc = dump_regs_t6(argc, argv, regs.data);
574 } else if (vers == 7) {
575 if (revision == 0x3f)
576 rc = dump_regs_t7vf(argc, argv, regs.data);
577 else
578 rc = dump_regs_t7(argc, argv, regs.data);
579 } else {
580 warnx("%s (type %d, rev %d) is not a known card.",
581 g.nexus, vers, revision);
582 return (ENOTSUP);
583 }
584
585 free(regs.data);
586 return (rc);
587 }
588
589 static void
do_show_info_header(uint32_t mode)590 do_show_info_header(uint32_t mode)
591 {
592 uint32_t i;
593
594 printf("%4s %8s", "Idx", "Hits");
595 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
596 switch (mode & i) {
597 case T4_FILTER_FCoE:
598 printf(" FCoE");
599 break;
600 case T4_FILTER_PORT:
601 printf(" Port");
602 break;
603 case T4_FILTER_VNIC:
604 if (mode & T4_FILTER_IC_VNIC)
605 printf(" VFvld:PF:VF");
606 else
607 printf(" vld:oVLAN");
608 break;
609 case T4_FILTER_VLAN:
610 printf(" vld:VLAN");
611 break;
612 case T4_FILTER_IP_TOS:
613 printf(" TOS");
614 break;
615 case T4_FILTER_IP_PROTO:
616 printf(" Prot");
617 break;
618 case T4_FILTER_ETH_TYPE:
619 printf(" EthType");
620 break;
621 case T4_FILTER_MAC_IDX:
622 printf(" MACIdx");
623 break;
624 case T4_FILTER_MPS_HIT_TYPE:
625 printf(" MPS");
626 break;
627 case T4_FILTER_IP_FRAGMENT:
628 printf(" Frag");
629 break;
630 default:
631 /* compressed filter field not enabled */
632 break;
633 }
634 }
635 printf(" %20s %20s %9s %9s %s\n",
636 "DIP", "SIP", "DPORT", "SPORT", "Action");
637 }
638
639 /*
640 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] }
641 * ordered tuple. If the parameter name in the argument sub-vector does not
642 * match the passed in parameter name, then a zero is returned for the
643 * function and no parsing is performed. If there is a match, then the value
644 * and optional mask are parsed and returned in the provided return value
645 * pointers. If no optional mask is specified, then a default mask of all 1s
646 * will be returned.
647 *
648 * An error in parsing the value[:mask] will result in an error message and
649 * program termination.
650 */
651 static int
parse_val_mask(const char * param,const char * args[],uint32_t * val,uint32_t * mask,int hashfilter)652 parse_val_mask(const char *param, const char *args[], uint32_t *val,
653 uint32_t *mask, int hashfilter)
654 {
655 long l;
656 char *p;
657
658 if (strcmp(param, args[0]) != 0)
659 return (EINVAL);
660
661 p = str_to_number(args[1], &l, NULL);
662 if (l >= 0 && l <= UINT32_MAX) {
663 *val = (uint32_t)l;
664 if (p > args[1]) {
665 if (p[0] == 0) {
666 *mask = ~0;
667 return (0);
668 }
669
670 if (p[0] == ':' && p[1] != 0) {
671 if (hashfilter) {
672 warnx("param %s: mask not allowed for "
673 "hashfilter or nat params", param);
674 return (EINVAL);
675 }
676 p = str_to_number(p + 1, &l, NULL);
677 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) {
678 *mask = (uint32_t)l;
679 return (0);
680 }
681 }
682 }
683 }
684
685 warnx("parameter \"%s\" has bad \"value[:mask]\" %s",
686 args[0], args[1]);
687
688 return (EINVAL);
689 }
690
691 /*
692 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] }
693 * ordered tuple. If the parameter name in the argument sub-vector does not
694 * match the passed in parameter name, then a zero is returned for the
695 * function and no parsing is performed. If there is a match, then the value
696 * and optional mask are parsed and returned in the provided return value
697 * pointers. If no optional mask is specified, then a default mask of all 1s
698 * will be returned.
699 *
700 * The value return parameter "afp" is used to specify the expected address
701 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual
702 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6
703 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and
704 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4
705 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are
706 * returned in the first four bytes of the address and mask return values with
707 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0,
708 * 1, 2, 3}, respectively.
709 *
710 * An error in parsing the value[:mask] will result in an error message and
711 * program termination.
712 */
713 static int
parse_ipaddr(const char * param,const char * args[],int * afp,uint8_t addr[],uint8_t mask[],int maskless)714 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[],
715 uint8_t mask[], int maskless)
716 {
717 const char *colon, *afn;
718 char *slash;
719 uint8_t *m;
720 int af, ret;
721 unsigned int masksize;
722
723 /*
724 * Is this our parameter?
725 */
726 if (strcmp(param, args[0]) != 0)
727 return (EINVAL);
728
729 /*
730 * Fundamental IPv4 versus IPv6 selection.
731 */
732 colon = strchr(args[1], ':');
733 if (!colon) {
734 afn = "IPv4";
735 af = AF_INET;
736 masksize = 32;
737 } else {
738 afn = "IPv6";
739 af = AF_INET6;
740 masksize = 128;
741 }
742 if (*afp == AF_UNSPEC)
743 *afp = af;
744 else if (*afp != af) {
745 warnx("address %s is not of expected family %s",
746 args[1], *afp == AF_INET ? "IP" : "IPv6");
747 return (EINVAL);
748 }
749
750 /*
751 * Parse address (temporarily stripping off any "/mask"
752 * specification).
753 */
754 slash = strchr(args[1], '/');
755 if (slash)
756 *slash = 0;
757 ret = inet_pton(af, args[1], addr);
758 if (slash)
759 *slash = '/';
760 if (ret <= 0) {
761 warnx("Cannot parse %s %s address %s", param, afn, args[1]);
762 return (EINVAL);
763 }
764
765 /*
766 * Parse optional mask specification.
767 */
768 if (slash) {
769 char *p;
770 unsigned int prefix = strtoul(slash + 1, &p, 10);
771
772 if (maskless) {
773 warnx("mask cannot be provided for maskless specification");
774 return (EINVAL);
775 }
776
777 if (p == slash + 1) {
778 warnx("missing address prefix for %s", param);
779 return (EINVAL);
780 }
781 if (*p) {
782 warnx("%s is not a valid address prefix", slash + 1);
783 return (EINVAL);
784 }
785 if (prefix > masksize) {
786 warnx("prefix %u is too long for an %s address",
787 prefix, afn);
788 return (EINVAL);
789 }
790 memset(mask, 0, masksize / 8);
791 masksize = prefix;
792 }
793
794 if (mask != NULL) {
795 /*
796 * Fill in mask.
797 */
798 for (m = mask; masksize >= 8; m++, masksize -= 8)
799 *m = ~0;
800 if (masksize)
801 *m = ~0 << (8 - masksize);
802 }
803
804 return (0);
805 }
806
807 /*
808 * Parse an argument sub-vector as a { <parameter name> <value> } ordered
809 * tuple. If the parameter name in the argument sub-vector does not match the
810 * passed in parameter name, then a zero is returned for the function and no
811 * parsing is performed. If there is a match, then the value is parsed and
812 * returned in the provided return value pointer.
813 */
814 static int
parse_val(const char * param,const char * args[],uint32_t * val)815 parse_val(const char *param, const char *args[], uint32_t *val)
816 {
817 char *p;
818 long l;
819
820 if (strcmp(param, args[0]) != 0)
821 return (EINVAL);
822
823 p = str_to_number(args[1], &l, NULL);
824 if (*p || l < 0 || l > UINT32_MAX) {
825 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]);
826 return (EINVAL);
827 }
828
829 *val = (uint32_t)l;
830 return (0);
831 }
832
833 static void
filters_show_ipaddr(int type,uint8_t * addr,uint8_t * addrm)834 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm)
835 {
836 int noctets, octet;
837
838 printf(" ");
839 if (type == 0) {
840 noctets = 4;
841 printf("%3s", " ");
842 } else
843 noctets = 16;
844
845 for (octet = 0; octet < noctets; octet++)
846 printf("%02x", addr[octet]);
847 printf("/");
848 for (octet = 0; octet < noctets; octet++)
849 printf("%02x", addrm[octet]);
850 }
851
852 static void
do_show_one_filter_info(struct t4_filter * t,uint32_t mode)853 do_show_one_filter_info(struct t4_filter *t, uint32_t mode)
854 {
855 uint32_t i;
856
857 printf("%4d", t->idx);
858 if (t->hits == UINT64_MAX)
859 printf(" %8s", "-");
860 else
861 printf(" %8ju", t->hits);
862
863 /*
864 * Compressed header portion of filter.
865 */
866 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) {
867 switch (mode & i) {
868 case T4_FILTER_FCoE:
869 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe);
870 break;
871 case T4_FILTER_PORT:
872 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport);
873 break;
874 case T4_FILTER_VNIC:
875 if (mode & T4_FILTER_IC_VNIC) {
876 printf(" %1d:%1x:%02x/%1d:%1x:%02x",
877 t->fs.val.pfvf_vld,
878 (t->fs.val.vnic >> 13) & 0x7,
879 t->fs.val.vnic & 0x1fff,
880 t->fs.mask.pfvf_vld,
881 (t->fs.mask.vnic >> 13) & 0x7,
882 t->fs.mask.vnic & 0x1fff);
883 } else {
884 printf(" %1d:%04x/%1d:%04x",
885 t->fs.val.ovlan_vld, t->fs.val.vnic,
886 t->fs.mask.ovlan_vld, t->fs.mask.vnic);
887 }
888 break;
889 case T4_FILTER_VLAN:
890 printf(" %1d:%04x/%1d:%04x",
891 t->fs.val.vlan_vld, t->fs.val.vlan,
892 t->fs.mask.vlan_vld, t->fs.mask.vlan);
893 break;
894 case T4_FILTER_IP_TOS:
895 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos);
896 break;
897 case T4_FILTER_IP_PROTO:
898 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto);
899 break;
900 case T4_FILTER_ETH_TYPE:
901 printf(" %04x/%04x", t->fs.val.ethtype,
902 t->fs.mask.ethtype);
903 break;
904 case T4_FILTER_MAC_IDX:
905 printf(" %03x/%03x", t->fs.val.macidx,
906 t->fs.mask.macidx);
907 break;
908 case T4_FILTER_MPS_HIT_TYPE:
909 printf(" %1x/%1x", t->fs.val.matchtype,
910 t->fs.mask.matchtype);
911 break;
912 case T4_FILTER_IP_FRAGMENT:
913 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag);
914 break;
915 default:
916 /* compressed filter field not enabled */
917 break;
918 }
919 }
920
921 /*
922 * Fixed portion of filter.
923 */
924 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip);
925 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip);
926 printf(" %04x/%04x %04x/%04x",
927 t->fs.val.dport, t->fs.mask.dport,
928 t->fs.val.sport, t->fs.mask.sport);
929
930 /*
931 * Variable length filter action.
932 */
933 if (t->fs.action == FILTER_DROP)
934 printf(" Drop");
935 else if (t->fs.action == FILTER_SWITCH) {
936 printf(" Switch: port=%d", t->fs.eport);
937 if (t->fs.newdmac)
938 printf(
939 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x "
940 ", l2tidx=%d",
941 t->fs.dmac[0], t->fs.dmac[1],
942 t->fs.dmac[2], t->fs.dmac[3],
943 t->fs.dmac[4], t->fs.dmac[5],
944 t->l2tidx);
945 if (t->fs.newsmac)
946 printf(
947 ", smac=%02x:%02x:%02x:%02x:%02x:%02x "
948 ", smtidx=%d",
949 t->fs.smac[0], t->fs.smac[1],
950 t->fs.smac[2], t->fs.smac[3],
951 t->fs.smac[4], t->fs.smac[5],
952 t->smtidx);
953 if (t->fs.newvlan == VLAN_REMOVE)
954 printf(", vlan=none");
955 else if (t->fs.newvlan == VLAN_INSERT)
956 printf(", vlan=insert(%x)", t->fs.vlan);
957 else if (t->fs.newvlan == VLAN_REWRITE)
958 printf(", vlan=rewrite(%x)", t->fs.vlan);
959 } else {
960 printf(" Pass: Q=");
961 if (t->fs.dirsteer == 0) {
962 printf("RSS");
963 if (t->fs.maskhash)
964 printf("(region %d)", t->fs.iq << 1);
965 } else {
966 printf("%d", t->fs.iq);
967 if (t->fs.dirsteerhash == 0)
968 printf("(QID)");
969 else
970 printf("(hash)");
971 }
972 }
973 if (g.chip_id <= 5 && t->fs.prio)
974 printf(" Prio");
975 if (t->fs.rpttid)
976 printf(" RptTID");
977 printf("\n");
978 }
979
980 static int
show_filters(int hash)981 show_filters(int hash)
982 {
983 uint32_t mode = 0, header, hpfilter = 0;
984 struct t4_filter t;
985 int rc;
986
987 /* Get the global filter mode first */
988 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
989 if (rc != 0)
990 return (rc);
991
992 if (!hash && g.chip_id >= 6) {
993 header = 0;
994 bzero(&t, sizeof (t));
995 t.idx = 0;
996 t.fs.hash = 0;
997 t.fs.prio = 1;
998 for (t.idx = 0; ; t.idx++) {
999 rc = doit(CHELSIO_T4_GET_FILTER, &t);
1000 if (rc != 0 || t.idx == 0xffffffff)
1001 break;
1002
1003 if (!header) {
1004 printf("High Priority TCAM Region:\n");
1005 do_show_info_header(mode);
1006 header = 1;
1007 hpfilter = 1;
1008 }
1009 do_show_one_filter_info(&t, mode);
1010 }
1011 }
1012
1013 header = 0;
1014 bzero(&t, sizeof (t));
1015 t.idx = 0;
1016 t.fs.hash = hash;
1017 for (t.idx = 0; ; t.idx++) {
1018 rc = doit(CHELSIO_T4_GET_FILTER, &t);
1019 if (rc != 0 || t.idx == 0xffffffff)
1020 break;
1021
1022 if (!header) {
1023 if (hpfilter)
1024 printf("\nNormal Priority TCAM Region:\n");
1025 do_show_info_header(mode);
1026 header = 1;
1027 }
1028 do_show_one_filter_info(&t, mode);
1029 }
1030
1031 return (rc);
1032 }
1033
1034 static int
get_filter_mode(int hashfilter)1035 get_filter_mode(int hashfilter)
1036 {
1037 uint32_t mode = hashfilter;
1038 int rc;
1039
1040 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode);
1041 if (rc != 0)
1042 return (rc);
1043
1044 if (mode & T4_FILTER_IPv4)
1045 printf("ipv4 ");
1046 if (mode & T4_FILTER_IPv6)
1047 printf("ipv6 ");
1048 if (mode & T4_FILTER_IP_SADDR)
1049 printf("sip ");
1050 if (mode & T4_FILTER_IP_DADDR)
1051 printf("dip ");
1052 if (mode & T4_FILTER_IP_SPORT)
1053 printf("sport ");
1054 if (mode & T4_FILTER_IP_DPORT)
1055 printf("dport ");
1056 if (mode & T4_FILTER_IP_FRAGMENT)
1057 printf("frag ");
1058 if (mode & T4_FILTER_MPS_HIT_TYPE)
1059 printf("matchtype ");
1060 if (mode & T4_FILTER_MAC_IDX)
1061 printf("macidx ");
1062 if (mode & T4_FILTER_ETH_TYPE)
1063 printf("ethtype ");
1064 if (mode & T4_FILTER_IP_PROTO)
1065 printf("proto ");
1066 if (mode & T4_FILTER_IP_TOS)
1067 printf("tos ");
1068 if (mode & T4_FILTER_VLAN)
1069 printf("vlan ");
1070 if (mode & T4_FILTER_VNIC) {
1071 if (mode & T4_FILTER_IC_VNIC)
1072 printf("vnic_id ");
1073 else if (mode & T4_FILTER_IC_ENCAP)
1074 printf("encap ");
1075 else
1076 printf("ovlan ");
1077 }
1078 if (mode & T4_FILTER_PORT)
1079 printf("iport ");
1080 if (mode & T4_FILTER_FCoE)
1081 printf("fcoe ");
1082 printf("\n");
1083
1084 return (0);
1085 }
1086
1087 static int
set_filter_mode(int argc,const char * argv[],int hashfilter)1088 set_filter_mode(int argc, const char *argv[], int hashfilter)
1089 {
1090 uint32_t mode = 0;
1091 int vnic = 0, ovlan = 0, invalid = 0;
1092
1093 for (; argc; argc--, argv++) {
1094 if (!strcmp(argv[0], "ipv4") || !strcmp(argv[0], "ipv6") ||
1095 !strcmp(argv[0], "sip") || !strcmp(argv[0], "dip") ||
1096 !strcmp(argv[0], "sport") || !strcmp(argv[0], "dport")) {
1097 /* These are always available and enabled. */
1098 continue;
1099 } else if (!strcmp(argv[0], "frag"))
1100 mode |= T4_FILTER_IP_FRAGMENT;
1101 else if (!strcmp(argv[0], "matchtype"))
1102 mode |= T4_FILTER_MPS_HIT_TYPE;
1103 else if (!strcmp(argv[0], "macidx"))
1104 mode |= T4_FILTER_MAC_IDX;
1105 else if (!strcmp(argv[0], "ethtype"))
1106 mode |= T4_FILTER_ETH_TYPE;
1107 else if (!strcmp(argv[0], "proto"))
1108 mode |= T4_FILTER_IP_PROTO;
1109 else if (!strcmp(argv[0], "tos"))
1110 mode |= T4_FILTER_IP_TOS;
1111 else if (!strcmp(argv[0], "vlan"))
1112 mode |= T4_FILTER_VLAN;
1113 else if (!strcmp(argv[0], "ovlan")) {
1114 mode |= T4_FILTER_VNIC;
1115 ovlan = 1;
1116 } else if (!strcmp(argv[0], "vnic_id")) {
1117 mode |= T4_FILTER_VNIC;
1118 mode |= T4_FILTER_IC_VNIC;
1119 vnic = 1;
1120 }
1121 #ifdef notyet
1122 else if (!strcmp(argv[0], "encap")) {
1123 mode |= T4_FILTER_VNIC;
1124 mode |= T4_FILTER_IC_ENCAP;
1125 encap = 1;
1126 }
1127 #endif
1128 else if (!strcmp(argv[0], "iport"))
1129 mode |= T4_FILTER_PORT;
1130 else if (!strcmp(argv[0], "fcoe"))
1131 mode |= T4_FILTER_FCoE;
1132 else {
1133 warnx("\"%s\" is not valid while setting filter mode.",
1134 argv[0]);
1135 invalid++;
1136 }
1137 }
1138
1139 if (vnic + ovlan > 1) {
1140 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive.");
1141 invalid++;
1142 }
1143
1144 if (invalid > 0)
1145 return (EINVAL);
1146
1147 if (hashfilter)
1148 return doit(CHELSIO_T4_SET_FILTER_MASK, &mode);
1149 else
1150 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode);
1151 }
1152
1153 static int
del_filter(uint32_t idx,int prio,int hashfilter)1154 del_filter(uint32_t idx, int prio, int hashfilter)
1155 {
1156 struct t4_filter t;
1157
1158 t.fs.prio = prio;
1159 t.fs.hash = hashfilter;
1160 t.idx = idx;
1161
1162 return doit(CHELSIO_T4_DEL_FILTER, &t);
1163 }
1164
1165 #define MAX_VLANID (4095)
1166
1167 static int
set_filter(uint32_t idx,int argc,const char * argv[],int hash)1168 set_filter(uint32_t idx, int argc, const char *argv[], int hash)
1169 {
1170 int rc, af = AF_UNSPEC, start_arg = 0;
1171 struct t4_filter t;
1172
1173 if (argc < 2) {
1174 warnc(EINVAL, "%s", __func__);
1175 return (EINVAL);
1176 };
1177 bzero(&t, sizeof (t));
1178 t.idx = idx;
1179 t.fs.hitcnts = 1;
1180 t.fs.hash = hash;
1181
1182 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) {
1183 const char **args = &argv[start_arg];
1184 uint32_t val, mask;
1185
1186 if (!strcmp(argv[start_arg], "type")) {
1187 int newaf;
1188 if (!strcasecmp(argv[start_arg + 1], "ipv4"))
1189 newaf = AF_INET;
1190 else if (!strcasecmp(argv[start_arg + 1], "ipv6"))
1191 newaf = AF_INET6;
1192 else {
1193 warnx("invalid type \"%s\"; "
1194 "must be one of \"ipv4\" or \"ipv6\"",
1195 argv[start_arg + 1]);
1196 return (EINVAL);
1197 }
1198
1199 if (af != AF_UNSPEC && af != newaf) {
1200 warnx("conflicting IPv4/IPv6 specifications.");
1201 return (EINVAL);
1202 }
1203 af = newaf;
1204 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) {
1205 t.fs.val.fcoe = val;
1206 t.fs.mask.fcoe = mask;
1207 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) {
1208 t.fs.val.iport = val;
1209 t.fs.mask.iport = mask;
1210 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) {
1211 t.fs.val.vnic = val;
1212 t.fs.mask.vnic = mask;
1213 t.fs.val.ovlan_vld = 1;
1214 t.fs.mask.ovlan_vld = 1;
1215 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) {
1216 t.fs.val.vlan = val;
1217 t.fs.mask.vlan = mask;
1218 t.fs.val.vlan_vld = 1;
1219 t.fs.mask.vlan_vld = 1;
1220 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) {
1221 t.fs.val.vnic &= 0x1fff;
1222 t.fs.val.vnic |= (val & 0x7) << 13;
1223 t.fs.mask.vnic &= 0x1fff;
1224 t.fs.mask.vnic |= (mask & 0x7) << 13;
1225 t.fs.val.pfvf_vld = 1;
1226 t.fs.mask.pfvf_vld = 1;
1227 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) {
1228 t.fs.val.vnic &= 0xe000;
1229 t.fs.val.vnic |= val & 0x1fff;
1230 t.fs.mask.vnic &= 0xe000;
1231 t.fs.mask.vnic |= mask & 0x1fff;
1232 t.fs.val.pfvf_vld = 1;
1233 t.fs.mask.pfvf_vld = 1;
1234 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) {
1235 t.fs.val.tos = val;
1236 t.fs.mask.tos = mask;
1237 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) {
1238 t.fs.val.proto = val;
1239 t.fs.mask.proto = mask;
1240 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) {
1241 t.fs.val.ethtype = val;
1242 t.fs.mask.ethtype = mask;
1243 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) {
1244 t.fs.val.macidx = val;
1245 t.fs.mask.macidx = mask;
1246 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) {
1247 t.fs.val.matchtype = val;
1248 t.fs.mask.matchtype = mask;
1249 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) {
1250 t.fs.val.frag = val;
1251 t.fs.mask.frag = mask;
1252 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) {
1253 t.fs.val.dport = val;
1254 t.fs.mask.dport = mask;
1255 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) {
1256 t.fs.val.sport = val;
1257 t.fs.mask.sport = mask;
1258 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip,
1259 t.fs.mask.dip, hash)) {
1260 /* nada */;
1261 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip,
1262 t.fs.mask.sip, hash)) {
1263 /* nada */;
1264 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) {
1265 /*nada*/;
1266 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) {
1267 /*nada*/
1268 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) {
1269 t.fs.nat_dport = val;
1270 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) {
1271 t.fs.nat_sport = val;
1272 } else if (!strcmp(argv[start_arg], "action")) {
1273 if (!strcmp(argv[start_arg + 1], "pass"))
1274 t.fs.action = FILTER_PASS;
1275 else if (!strcmp(argv[start_arg + 1], "drop"))
1276 t.fs.action = FILTER_DROP;
1277 else if (!strcmp(argv[start_arg + 1], "switch"))
1278 t.fs.action = FILTER_SWITCH;
1279 else {
1280 warnx("invalid action \"%s\"; must be one of"
1281 " \"pass\", \"drop\" or \"switch\"",
1282 argv[start_arg + 1]);
1283 return (EINVAL);
1284 }
1285 } else if (!parse_val("hitcnts", args, &val)) {
1286 t.fs.hitcnts = val;
1287 } else if (!parse_val("prio", args, &val)) {
1288 if (hash) {
1289 warnx("Hashfilters doesn't support \"prio\"\n");
1290 return (EINVAL);
1291 }
1292 if (val != 0 && val != 1) {
1293 warnx("invalid priority \"%s\"; must be"
1294 " \"0\" or \"1\"", argv[start_arg + 1]);
1295 return (EINVAL);
1296 }
1297 t.fs.prio = val;
1298 } else if (!parse_val("rpttid", args, &val)) {
1299 t.fs.rpttid = 1;
1300 } else if (!parse_val("queue", args, &val)) {
1301 t.fs.dirsteer = 1; /* direct steer */
1302 t.fs.iq = val; /* to the iq with this cntxt_id */
1303 } else if (!parse_val("tcbhash", args, &val)) {
1304 t.fs.dirsteerhash = 1; /* direct steer */
1305 /* XXX: use (val << 1) as the rss_hash? */
1306 t.fs.iq = val;
1307 } else if (!parse_val("tcbrss", args, &val)) {
1308 t.fs.maskhash = 1; /* steer to RSS region */
1309 /*
1310 * val = start idx of the region but the internal TCB
1311 * field is 10b only and is left shifted by 1 before use.
1312 */
1313 t.fs.iq = val >> 1;
1314 } else if (!parse_val("eport", args, &val)) {
1315 t.fs.eport = val;
1316 } else if (!parse_val("swapmac", args, &val)) {
1317 t.fs.swapmac = 1;
1318 } else if (!strcmp(argv[start_arg], "nat")) {
1319 if (!strcmp(argv[start_arg + 1], "dip"))
1320 t.fs.nat_mode = NAT_MODE_DIP;
1321 else if (!strcmp(argv[start_arg + 1], "dip-dp"))
1322 t.fs.nat_mode = NAT_MODE_DIP_DP;
1323 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip"))
1324 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP;
1325 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp"))
1326 t.fs.nat_mode = NAT_MODE_DIP_DP_SP;
1327 else if (!strcmp(argv[start_arg + 1], "sip-sp"))
1328 t.fs.nat_mode = NAT_MODE_SIP_SP;
1329 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp"))
1330 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP;
1331 else if (!strcmp(argv[start_arg + 1], "all"))
1332 t.fs.nat_mode = NAT_MODE_ALL;
1333 else {
1334 warnx("unknown nat type \"%s\"; known types are dip, "
1335 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, "
1336 "dip-sip-sp, and all", argv[start_arg + 1]);
1337 return (EINVAL);
1338 }
1339 } else if (!parse_val("natseq", args, &val)) {
1340 t.fs.nat_seq_chk = val;
1341 } else if (!parse_val("natflag", args, &val)) {
1342 t.fs.nat_flag_chk = 1;
1343 } else if (!strcmp(argv[start_arg], "dmac")) {
1344 struct ether_addr *daddr;
1345
1346 daddr = ether_aton(argv[start_arg + 1]);
1347 if (daddr == NULL) {
1348 warnx("invalid dmac address \"%s\"",
1349 argv[start_arg + 1]);
1350 return (EINVAL);
1351 }
1352 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN);
1353 t.fs.newdmac = 1;
1354 } else if (!strcmp(argv[start_arg], "smac")) {
1355 struct ether_addr *saddr;
1356
1357 saddr = ether_aton(argv[start_arg + 1]);
1358 if (saddr == NULL) {
1359 warnx("invalid smac address \"%s\"",
1360 argv[start_arg + 1]);
1361 return (EINVAL);
1362 }
1363 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN);
1364 t.fs.newsmac = 1;
1365 } else if (!strcmp(argv[start_arg], "vlan")) {
1366 char *p;
1367 if (!strcmp(argv[start_arg + 1], "none")) {
1368 t.fs.newvlan = VLAN_REMOVE;
1369 } else if (argv[start_arg + 1][0] == '=') {
1370 t.fs.newvlan = VLAN_REWRITE;
1371 } else if (argv[start_arg + 1][0] == '+') {
1372 t.fs.newvlan = VLAN_INSERT;
1373 } else {
1374 warnx("unknown vlan parameter \"%s\"; must"
1375 " be one of \"none\", \"=<vlan>\", "
1376 " \"+<vlan>\"", argv[start_arg + 1]);
1377 return (EINVAL);
1378 }
1379 if (t.fs.newvlan == VLAN_REWRITE ||
1380 t.fs.newvlan == VLAN_INSERT) {
1381 t.fs.vlan = strtoul(argv[start_arg + 1] + 1,
1382 &p, 0);
1383 if (p == argv[start_arg + 1] + 1 || p[0] != 0 ||
1384 t.fs.vlan > MAX_VLANID) {
1385 warnx("invalid vlan \"%s\"",
1386 argv[start_arg + 1]);
1387 return (EINVAL);
1388 }
1389 }
1390 } else {
1391 warnx("invalid parameter \"%s\"", argv[start_arg]);
1392 return (EINVAL);
1393 }
1394 }
1395 if (start_arg != argc) {
1396 warnx("no value for \"%s\"", argv[start_arg]);
1397 return (EINVAL);
1398 }
1399
1400 /*
1401 * Check basic sanity of option combinations.
1402 */
1403 if (t.fs.action != FILTER_SWITCH &&
1404 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan ||
1405 t.fs.swapmac || t.fs.nat_mode)) {
1406 warnx("port, dmac, smac, vlan, and nat only make sense with"
1407 " \"action switch\"");
1408 return (EINVAL);
1409 }
1410 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk ||
1411 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) {
1412 warnx("nat params only make sense with valid nat mode");
1413 return (EINVAL);
1414 }
1415 if (t.fs.action != FILTER_PASS &&
1416 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) {
1417 warnx("rpttid, queue and tcbhash don't make sense with"
1418 " action \"drop\" or \"switch\"");
1419 return (EINVAL);
1420 }
1421 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) {
1422 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive");
1423 return (EINVAL);
1424 }
1425
1426 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */
1427 rc = doit(CHELSIO_T4_SET_FILTER, &t);
1428 if (hash && rc == 0)
1429 printf("%d\n", t.idx);
1430 return (rc);
1431 }
1432
1433 static int
filter_cmd(int argc,const char * argv[],int hashfilter)1434 filter_cmd(int argc, const char *argv[], int hashfilter)
1435 {
1436 long long val;
1437 uint32_t idx;
1438 char *s;
1439
1440 if (argc == 0) {
1441 warnx("%sfilter: no arguments.", hashfilter ? "hash" : "");
1442 return (EINVAL);
1443 };
1444
1445 /* list */
1446 if (strcmp(argv[0], "list") == 0) {
1447 if (argc != 1)
1448 warnx("trailing arguments after \"list\" ignored.");
1449
1450 return show_filters(hashfilter);
1451 }
1452
1453 /* mode */
1454 if (argc == 1 && strcmp(argv[0], "mode") == 0)
1455 return get_filter_mode(hashfilter);
1456
1457 /* mode <mode> */
1458 if (strcmp(argv[0], "mode") == 0)
1459 return set_filter_mode(argc - 1, argv + 1, hashfilter);
1460
1461 /* <idx> ... */
1462 s = str_to_number(argv[0], NULL, &val);
1463 if (*s || val < 0 || val > 0xffffffffU) {
1464 if (hashfilter) {
1465 /*
1466 * No numeric index means this must be a request to
1467 * create a new hashfilter and we are already at the
1468 * parameter/value list.
1469 */
1470 idx = (uint32_t) -1;
1471 goto setf;
1472 }
1473 warnx("\"%s\" is neither an index nor a filter subcommand.",
1474 argv[0]);
1475 return (EINVAL);
1476 }
1477 idx = (uint32_t) val;
1478
1479 /* <idx> delete|clear [prio 0|1] */
1480 if ((argc == 2 || argc == 4) &&
1481 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) {
1482 int prio = 0;
1483
1484 if (argc == 4) {
1485 if (hashfilter) {
1486 warnx("stray arguments after \"%s\".", argv[1]);
1487 return (EINVAL);
1488 }
1489
1490 if (strcmp(argv[2], "prio") != 0) {
1491 warnx("\"prio\" is the only valid keyword "
1492 "after \"%s\", found \"%s\" instead.",
1493 argv[1], argv[2]);
1494 return (EINVAL);
1495 }
1496
1497 s = str_to_number(argv[3], NULL, &val);
1498 if (*s || val < 0 || val > 1) {
1499 warnx("%s \"%s\"; must be \"0\" or \"1\".",
1500 argv[2], argv[3]);
1501 return (EINVAL);
1502 }
1503 prio = (int)val;
1504 }
1505 return del_filter(idx, prio, hashfilter);
1506 }
1507
1508 /* skip <idx> */
1509 argc--;
1510 argv++;
1511
1512 setf:
1513 /* [<param> <val>] ... */
1514 return set_filter(idx, argc, argv, hashfilter);
1515 }
1516
1517 /*
1518 * Shows the fields of a multi-word structure. The structure is considered to
1519 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure)
1520 * whose fields are described by @fd. The 32-bit words are given in @words
1521 * starting with the least significant 32-bit word.
1522 */
1523 static void
show_struct(const uint32_t * words,int nwords,const struct field_desc * fd)1524 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd)
1525 {
1526 unsigned int w = 0;
1527 const struct field_desc *p;
1528
1529 for (p = fd; p->name; p++)
1530 w = max(w, strlen(p->name));
1531
1532 while (fd->name) {
1533 unsigned long long data;
1534 int first_word = fd->start / 32;
1535 int shift = fd->start % 32;
1536 int width = fd->end - fd->start + 1;
1537 unsigned long long mask = (1ULL << width) - 1;
1538
1539 data = (words[first_word] >> shift) |
1540 ((uint64_t)words[first_word + 1] << (32 - shift));
1541 if (shift)
1542 data |= ((uint64_t)words[first_word + 2] << (64 - shift));
1543 data &= mask;
1544 if (fd->islog2)
1545 data = 1 << data;
1546 printf("%-*s ", w, fd->name);
1547 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift);
1548 fd++;
1549 }
1550 }
1551
1552 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 }
1553 #define FIELD1(name, start) FIELD(name, start, start)
1554
1555 static void
show_t7_ctxt(const struct t4_sge_ctxt * p)1556 show_t7_ctxt(const struct t4_sge_ctxt *p)
1557 {
1558 static struct field_desc egress_t7[] = {
1559 FIELD("uPToken_4k:", 197, 198),
1560 FIELD("WrLength_5:", 196, 196),
1561 FIELD("CpuId:", 193, 195),
1562 FIELD("PCIeDataChannel_1:", 192, 192),
1563 FIELD("DCA_ST:", 181, 191),
1564 FIELD("StatusPgNS:", 180, 180),
1565 FIELD("StatusPgRO:", 179, 179),
1566 FIELD("FetchNS:", 178, 178),
1567 FIELD("FetchRO:", 177, 177),
1568 FIELD("Valid:", 176, 176),
1569 FIELD("ReschedulePending_1:", 175, 175),
1570 FIELD("PCIeDataChannel:", 174, 174),
1571 FIELD("StatusPgTPHintEn:", 173, 173),
1572 FIELD("StatusPgTPHint:", 171, 172),
1573 FIELD("FetchTPHintEn:", 170, 170),
1574 FIELD("FetchTPHint:", 168, 169),
1575 FIELD("FCThreshOverride:", 167, 167),
1576 { "WRLength:", 162, 166, 9, 0, 1 },
1577 FIELD("WRLengthKnown:", 161, 161),
1578 FIELD("ReschedulePending:", 160, 160),
1579 FIELD("TimerIx:", 157, 159),
1580 FIELD("FetchBurstMin:", 156, 156),
1581 FIELD("FLMPacking:", 155, 155),
1582 FIELD("FetchBurstMax:", 153, 154),
1583 FIELD("uPToken:", 133, 152),
1584 FIELD("uPTokenEn:", 132, 132),
1585 FIELD("UserModeIO:", 131, 131),
1586 FIELD("uPFLCredits:", 123, 130),
1587 FIELD("uPFLCreditEn:", 122, 122),
1588 FIELD("FID:", 111, 121),
1589 FIELD("HostFCMode:", 109, 110),
1590 FIELD("HostFCOwner:", 108, 108),
1591 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1592 FIELD("CIDX:", 89, 104),
1593 FIELD("PIDX:", 73, 88),
1594 { "BaseAddress:", 18, 72, 9, 1 },
1595 FIELD("QueueSize:", 2, 17),
1596 FIELD("QueueType:", 1, 1),
1597 FIELD("FetchSizeMode:", 0, 0),
1598 { NULL }
1599 };
1600 static struct field_desc fl_t7[] = {
1601 FIELD("FLMcontextID_4k:", 197, 198),
1602 FIELD("CpuId:", 193, 195),
1603 FIELD("PCIeDataChannel_1:", 192, 192),
1604 FIELD("DCA_ST:", 181, 191),
1605 FIELD("StatusPgNS:", 180, 180),
1606 FIELD("StatusPgRO:", 179, 179),
1607 FIELD("FetchNS:", 178, 178),
1608 FIELD("FetchRO:", 177, 177),
1609 FIELD("Valid:", 176, 176),
1610 FIELD("PCIeDataChannel:", 174, 175),
1611 FIELD("StatusPgTPHintEn:", 173, 173),
1612 FIELD("StatusPgTPHint:", 171, 172),
1613 FIELD("FetchTPHintEn:", 170, 170),
1614 FIELD("FetchTPHint:", 168, 169),
1615 FIELD("FCThreshOverride:", 167, 167),
1616 FIELD("ReschedulePending:", 160, 160),
1617 FIELD("OnChipQueue:", 159, 159),
1618 FIELD("FetchSizeMode:", 158, 158),
1619 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1620 FIELD("FLMPacking:", 155, 155),
1621 FIELD("FetchBurstMax:", 153, 154),
1622 FIELD("FLMcongMode:", 152, 152),
1623 FIELD("MaxuPFLCredits:", 144, 151),
1624 FIELD("FLMcontextID:", 133, 143),
1625 FIELD("uPTokenEn:", 132, 132),
1626 FIELD("UserModeIO:", 131, 131),
1627 FIELD("uPFLCredits:", 123, 130),
1628 FIELD("uPFLCreditEn:", 122, 122),
1629 FIELD("FID:", 111, 121),
1630 FIELD("HostFCMode:", 109, 110),
1631 FIELD("HostFCOwner:", 108, 108),
1632 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1633 FIELD("CIDX:", 89, 104),
1634 FIELD("PIDX:", 73, 88),
1635 { "BaseAddress:", 18, 72, 9, 1 },
1636 FIELD("QueueSize:", 2, 17),
1637 FIELD("QueueType:", 1, 1),
1638 FIELD("CachePriority:", 0, 0),
1639 { NULL }
1640 };
1641 static struct field_desc ingress_t7[] = {
1642 FIELD("Fid:", 171, 182),
1643 FIELD("InterruptIDX4K:", 170, 170),
1644 FIELD("CoalEn:", 169, 169),
1645 FIELD("CoalAbort:", 168, 168),
1646 FIELD("CoalCntr:", 161, 167),
1647 FIELD("CoalCompTimerStatus:", 160, 160),
1648 FIELD("CoalCompCntrStatus:", 159, 159),
1649 FIELD("SP_NS:", 158, 158),
1650 FIELD("SP_RO:", 157, 157),
1651 FIELD("SP_TPHintEn:", 156, 156),
1652 FIELD("SP_TPHint:", 154, 155),
1653 FIELD("DCA_ST:", 143, 153),
1654 FIELD("ISCSICoalescing:", 142, 142),
1655 FIELD("Queue_Valid:", 141, 141),
1656 FIELD("TimerPending:", 140, 140),
1657 FIELD("DropRSS:", 139, 139),
1658 FIELD("PCIeChannel:", 137, 138),
1659 FIELD("SEInterruptArmed:", 136, 136),
1660 FIELD("CongestionMgtEnable:", 135, 135),
1661 FIELD("NoSnoop:", 134, 134),
1662 FIELD("RelaxedOrdering:", 133, 133),
1663 FIELD("GTSmode:", 132, 132),
1664 FIELD("TPHintEn:", 131, 131),
1665 FIELD("TPHint:", 129, 130),
1666 FIELD("UpdateScheduling:", 128, 128),
1667 FIELD("UpdateDelivery:", 126, 127),
1668 FIELD("InterruptSent:", 125, 125),
1669 FIELD("InterruptIDX:", 114, 124),
1670 FIELD("InterruptDestination:", 113, 113),
1671 FIELD("InterruptArmed:", 112, 112),
1672 FIELD("RxIntCounter:", 106, 111),
1673 FIELD("RxIntCounterThreshold:", 104, 105),
1674 FIELD("Generation:", 103, 103),
1675 { "BaseAddress:", 48, 102, 9, 1 },
1676 FIELD("PIDX:", 32, 47),
1677 FIELD("CIDX:", 16, 31),
1678 { "QueueSize:", 4, 15, 4, 0 },
1679 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1680 FIELD("QueueEntryOverride:", 1, 1),
1681 FIELD("CachePriority:", 0, 0),
1682 { NULL }
1683 };
1684 static struct field_desc flm_t7[] = {
1685 FIELD("MidCongEn:", 154, 154),
1686 FIELD("FlPtr:", 90, 153),
1687 FIELD("Valid:", 89, 89),
1688 FIELD("SplitLenMode:", 87, 88),
1689 FIELD("TPHintEn:", 86, 86),
1690 FIELD("TPHint:", 84, 85),
1691 FIELD("NoSnoop:", 83, 83),
1692 FIELD("RelaxedOrdering:", 82, 82),
1693 FIELD("DCA_ST:", 71, 81),
1694 FIELD("EQid:", 54, 70),
1695 FIELD("SplitEn:", 52, 53),
1696 FIELD("PadEn:", 51, 51),
1697 FIELD("PackEn:", 50, 50),
1698 FIELD("Cache_Lock :", 49, 49),
1699 FIELD("CongDrop:", 48, 48),
1700 FIELD("Inflifght:", 47, 47),
1701 FIELD("CongEn:", 46, 46),
1702 FIELD("CongMode:", 45, 45),
1703 FIELD("PackOffset:", 20, 39),
1704 FIELD("CIDX:", 8, 15),
1705 FIELD("PIDX:", 0, 7),
1706 { NULL }
1707 };
1708 static struct field_desc conm_t7[] = {
1709 FIELD("CngMPSEnable:", 37, 37),
1710 FIELD("CngTPMode:", 35, 36),
1711 FIELD("CngDBPHdr:", 34, 34),
1712 FIELD("CngDBPData:", 33, 33),
1713 FIELD("CngIMSG:", 32, 32),
1714 { "CngChMap:", 0, 31, 0, 1, 0 },
1715 { NULL }
1716 };
1717
1718 if (p->mem_id == SGE_CONTEXT_EGRESS)
1719 show_struct(p->data, 7, (p->data[0] & 2) ? fl_t7 : egress_t7);
1720 else if (p->mem_id == SGE_CONTEXT_FLM)
1721 show_struct(p->data, 5, flm_t7);
1722 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1723 show_struct(p->data, 6, ingress_t7);
1724 else if (p->mem_id == SGE_CONTEXT_CNM)
1725 show_struct(p->data, 2, conm_t7);
1726 }
1727
1728 static void
show_t5t6_ctxt(const struct t4_sge_ctxt * p,int vers)1729 show_t5t6_ctxt(const struct t4_sge_ctxt *p, int vers)
1730 {
1731 static struct field_desc egress_t5[] = {
1732 FIELD("DCA_ST:", 181, 191),
1733 FIELD1("StatusPgNS:", 180),
1734 FIELD1("StatusPgRO:", 179),
1735 FIELD1("FetchNS:", 178),
1736 FIELD1("FetchRO:", 177),
1737 FIELD1("Valid:", 176),
1738 FIELD("PCIeDataChannel:", 174, 175),
1739 FIELD1("StatusPgTPHintEn:", 173),
1740 FIELD("StatusPgTPHint:", 171, 172),
1741 FIELD1("FetchTPHintEn:", 170),
1742 FIELD("FetchTPHint:", 168, 169),
1743 FIELD1("FCThreshOverride:", 167),
1744 { "WRLength:", 162, 166, 9, 0, 1 },
1745 FIELD1("WRLengthKnown:", 161),
1746 FIELD1("ReschedulePending:", 160),
1747 FIELD1("OnChipQueue:", 159),
1748 FIELD1("FetchSizeMode:", 158),
1749 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1750 FIELD1("FLMPacking:", 155),
1751 FIELD("FetchBurstMax:", 153, 154),
1752 FIELD("uPToken:", 133, 152),
1753 FIELD1("uPTokenEn:", 132),
1754 FIELD1("UserModeIO:", 131),
1755 FIELD("uPFLCredits:", 123, 130),
1756 FIELD1("uPFLCreditEn:", 122),
1757 FIELD("FID:", 111, 121),
1758 FIELD("HostFCMode:", 109, 110),
1759 FIELD1("HostFCOwner:", 108),
1760 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1761 FIELD("CIDX:", 89, 104),
1762 FIELD("PIDX:", 73, 88),
1763 { "BaseAddress:", 18, 72, 9, 1 },
1764 FIELD("QueueSize:", 2, 17),
1765 FIELD1("QueueType:", 1),
1766 FIELD1("CachePriority:", 0),
1767 { NULL }
1768 };
1769 static struct field_desc egress_t6[] = {
1770 FIELD("DCA_ST:", 181, 191),
1771 FIELD1("StatusPgNS:", 180),
1772 FIELD1("StatusPgRO:", 179),
1773 FIELD1("FetchNS:", 178),
1774 FIELD1("FetchRO:", 177),
1775 FIELD1("Valid:", 176),
1776 FIELD1("ReschedulePending_1:", 175),
1777 FIELD1("PCIeDataChannel:", 174),
1778 FIELD1("StatusPgTPHintEn:", 173),
1779 FIELD("StatusPgTPHint:", 171, 172),
1780 FIELD1("FetchTPHintEn:", 170),
1781 FIELD("FetchTPHint:", 168, 169),
1782 FIELD1("FCThreshOverride:", 167),
1783 { "WRLength:", 162, 166, 9, 0, 1 },
1784 FIELD1("WRLengthKnown:", 161),
1785 FIELD1("ReschedulePending:", 160),
1786 FIELD("TimerIx:", 157, 159),
1787 FIELD1("FetchBurstMin:", 156),
1788 FIELD1("FLMPacking:", 155),
1789 FIELD("FetchBurstMax:", 153, 154),
1790 FIELD("uPToken:", 133, 152),
1791 FIELD1("uPTokenEn:", 132),
1792 FIELD1("UserModeIO:", 131),
1793 FIELD("uPFLCredits:", 123, 130),
1794 FIELD1("uPFLCreditEn:", 122),
1795 FIELD("FID:", 111, 121),
1796 FIELD("HostFCMode:", 109, 110),
1797 FIELD1("HostFCOwner:", 108),
1798 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1799 FIELD("CIDX:", 89, 104),
1800 FIELD("PIDX:", 73, 88),
1801 { "BaseAddress:", 18, 72, 9, 1 },
1802 FIELD("QueueSize:", 2, 17),
1803 FIELD1("QueueType:", 1),
1804 FIELD1("FetchSizeMode:", 0),
1805 { NULL }
1806 };
1807 static struct field_desc fl_t5[] = {
1808 FIELD("DCA_ST:", 181, 191),
1809 FIELD1("StatusPgNS:", 180),
1810 FIELD1("StatusPgRO:", 179),
1811 FIELD1("FetchNS:", 178),
1812 FIELD1("FetchRO:", 177),
1813 FIELD1("Valid:", 176),
1814 FIELD("PCIeDataChannel:", 174, 175),
1815 FIELD1("StatusPgTPHintEn:", 173),
1816 FIELD("StatusPgTPHint:", 171, 172),
1817 FIELD1("FetchTPHintEn:", 170),
1818 FIELD("FetchTPHint:", 168, 169),
1819 FIELD1("FCThreshOverride:", 167),
1820 FIELD1("ReschedulePending:", 160),
1821 FIELD1("OnChipQueue:", 159),
1822 FIELD1("FetchSizeMode:", 158),
1823 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1824 FIELD1("FLMPacking:", 155),
1825 FIELD("FetchBurstMax:", 153, 154),
1826 FIELD1("FLMcongMode:", 152),
1827 FIELD("MaxuPFLCredits:", 144, 151),
1828 FIELD("FLMcontextID:", 133, 143),
1829 FIELD1("uPTokenEn:", 132),
1830 FIELD1("UserModeIO:", 131),
1831 FIELD("uPFLCredits:", 123, 130),
1832 FIELD1("uPFLCreditEn:", 122),
1833 FIELD("FID:", 111, 121),
1834 FIELD("HostFCMode:", 109, 110),
1835 FIELD1("HostFCOwner:", 108),
1836 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
1837 FIELD("CIDX:", 89, 104),
1838 FIELD("PIDX:", 73, 88),
1839 { "BaseAddress:", 18, 72, 9, 1 },
1840 FIELD("QueueSize:", 2, 17),
1841 FIELD1("QueueType:", 1),
1842 FIELD1("CachePriority:", 0),
1843 { NULL }
1844 };
1845 static struct field_desc ingress_t5[] = {
1846 FIELD("DCA_ST:", 143, 153),
1847 FIELD1("ISCSICoalescing:", 142),
1848 FIELD1("Queue_Valid:", 141),
1849 FIELD1("TimerPending:", 140),
1850 FIELD1("DropRSS:", 139),
1851 FIELD("PCIeChannel:", 137, 138),
1852 FIELD1("SEInterruptArmed:", 136),
1853 FIELD1("CongestionMgtEnable:", 135),
1854 FIELD1("NoSnoop:", 134),
1855 FIELD1("RelaxedOrdering:", 133),
1856 FIELD1("GTSmode:", 132),
1857 FIELD1("TPHintEn:", 131),
1858 FIELD("TPHint:", 129, 130),
1859 FIELD1("UpdateScheduling:", 128),
1860 FIELD("UpdateDelivery:", 126, 127),
1861 FIELD1("InterruptSent:", 125),
1862 FIELD("InterruptIDX:", 114, 124),
1863 FIELD1("InterruptDestination:", 113),
1864 FIELD1("InterruptArmed:", 112),
1865 FIELD("RxIntCounter:", 106, 111),
1866 FIELD("RxIntCounterThreshold:", 104, 105),
1867 FIELD1("Generation:", 103),
1868 { "BaseAddress:", 48, 102, 9, 1 },
1869 FIELD("PIDX:", 32, 47),
1870 FIELD("CIDX:", 16, 31),
1871 { "QueueSize:", 4, 15, 4, 0 },
1872 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1873 FIELD1("QueueEntryOverride:", 1),
1874 FIELD1("CachePriority:", 0),
1875 { NULL }
1876 };
1877 static struct field_desc ingress_t6[] = {
1878 FIELD1("SP_NS:", 158),
1879 FIELD1("SP_RO:", 157),
1880 FIELD1("SP_TPHintEn:", 156),
1881 FIELD("SP_TPHint:", 154, 155),
1882 FIELD("DCA_ST:", 143, 153),
1883 FIELD1("ISCSICoalescing:", 142),
1884 FIELD1("Queue_Valid:", 141),
1885 FIELD1("TimerPending:", 140),
1886 FIELD1("DropRSS:", 139),
1887 FIELD("PCIeChannel:", 137, 138),
1888 FIELD1("SEInterruptArmed:", 136),
1889 FIELD1("CongestionMgtEnable:", 135),
1890 FIELD1("NoSnoop:", 134),
1891 FIELD1("RelaxedOrdering:", 133),
1892 FIELD1("GTSmode:", 132),
1893 FIELD1("TPHintEn:", 131),
1894 FIELD("TPHint:", 129, 130),
1895 FIELD1("UpdateScheduling:", 128),
1896 FIELD("UpdateDelivery:", 126, 127),
1897 FIELD1("InterruptSent:", 125),
1898 FIELD("InterruptIDX:", 114, 124),
1899 FIELD1("InterruptDestination:", 113),
1900 FIELD1("InterruptArmed:", 112),
1901 FIELD("RxIntCounter:", 106, 111),
1902 FIELD("RxIntCounterThreshold:", 104, 105),
1903 FIELD1("Generation:", 103),
1904 { "BaseAddress:", 48, 102, 9, 1 },
1905 FIELD("PIDX:", 32, 47),
1906 FIELD("CIDX:", 16, 31),
1907 { "QueueSize:", 4, 15, 4, 0 },
1908 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
1909 FIELD1("QueueEntryOverride:", 1),
1910 FIELD1("CachePriority:", 0),
1911 { NULL }
1912 };
1913 static struct field_desc flm_t5[] = {
1914 FIELD1("Valid:", 89),
1915 FIELD("SplitLenMode:", 87, 88),
1916 FIELD1("TPHintEn:", 86),
1917 FIELD("TPHint:", 84, 85),
1918 FIELD1("NoSnoop:", 83),
1919 FIELD1("RelaxedOrdering:", 82),
1920 FIELD("DCA_ST:", 71, 81),
1921 FIELD("EQid:", 54, 70),
1922 FIELD("SplitEn:", 52, 53),
1923 FIELD1("PadEn:", 51),
1924 FIELD1("PackEn:", 50),
1925 FIELD1("Cache_Lock :", 49),
1926 FIELD1("CongDrop:", 48),
1927 FIELD("PackOffset:", 16, 47),
1928 FIELD("CIDX:", 8, 15),
1929 FIELD("PIDX:", 0, 7),
1930 { NULL }
1931 };
1932 static struct field_desc flm_t6[] = {
1933 FIELD1("Valid:", 89),
1934 FIELD("SplitLenMode:", 87, 88),
1935 FIELD1("TPHintEn:", 86),
1936 FIELD("TPHint:", 84, 85),
1937 FIELD1("NoSnoop:", 83),
1938 FIELD1("RelaxedOrdering:", 82),
1939 FIELD("DCA_ST:", 71, 81),
1940 FIELD("EQid:", 54, 70),
1941 FIELD("SplitEn:", 52, 53),
1942 FIELD1("PadEn:", 51),
1943 FIELD1("PackEn:", 50),
1944 FIELD1("Cache_Lock :", 49),
1945 FIELD1("CongDrop:", 48),
1946 FIELD1("Inflight:", 47),
1947 FIELD1("CongEn:", 46),
1948 FIELD1("CongMode:", 45),
1949 FIELD("PackOffset:", 20, 39),
1950 FIELD("CIDX:", 8, 15),
1951 FIELD("PIDX:", 0, 7),
1952 { NULL }
1953 };
1954 static struct field_desc conm_t5[] = {
1955 FIELD1("CngMPSEnable:", 21),
1956 FIELD("CngTPMode:", 19, 20),
1957 FIELD1("CngDBPHdr:", 18),
1958 FIELD1("CngDBPData:", 17),
1959 FIELD1("CngIMSG:", 16),
1960 { "CngChMap:", 0, 15, 0, 1, 0 },
1961 { NULL }
1962 };
1963
1964 if (p->mem_id == SGE_CONTEXT_EGRESS) {
1965 if (p->data[0] & 2)
1966 show_struct(p->data, 6, fl_t5);
1967 else if (vers == 5)
1968 show_struct(p->data, 6, egress_t5);
1969 else
1970 show_struct(p->data, 6, egress_t6);
1971 } else if (p->mem_id == SGE_CONTEXT_FLM)
1972 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6);
1973 else if (p->mem_id == SGE_CONTEXT_INGRESS)
1974 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6);
1975 else if (p->mem_id == SGE_CONTEXT_CNM)
1976 show_struct(p->data, 1, conm_t5);
1977 }
1978
1979 static void
show_t4_ctxt(const struct t4_sge_ctxt * p)1980 show_t4_ctxt(const struct t4_sge_ctxt *p)
1981 {
1982 static struct field_desc egress_t4[] = {
1983 FIELD1("StatusPgNS:", 180),
1984 FIELD1("StatusPgRO:", 179),
1985 FIELD1("FetchNS:", 178),
1986 FIELD1("FetchRO:", 177),
1987 FIELD1("Valid:", 176),
1988 FIELD("PCIeDataChannel:", 174, 175),
1989 FIELD1("DCAEgrQEn:", 173),
1990 FIELD("DCACPUID:", 168, 172),
1991 FIELD1("FCThreshOverride:", 167),
1992 FIELD("WRLength:", 162, 166),
1993 FIELD1("WRLengthKnown:", 161),
1994 FIELD1("ReschedulePending:", 160),
1995 FIELD1("OnChipQueue:", 159),
1996 FIELD1("FetchSizeMode", 158),
1997 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
1998 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
1999 FIELD("uPToken:", 133, 152),
2000 FIELD1("uPTokenEn:", 132),
2001 FIELD1("UserModeIO:", 131),
2002 FIELD("uPFLCredits:", 123, 130),
2003 FIELD1("uPFLCreditEn:", 122),
2004 FIELD("FID:", 111, 121),
2005 FIELD("HostFCMode:", 109, 110),
2006 FIELD1("HostFCOwner:", 108),
2007 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
2008 FIELD("CIDX:", 89, 104),
2009 FIELD("PIDX:", 73, 88),
2010 { "BaseAddress:", 18, 72, 9, 1 },
2011 FIELD("QueueSize:", 2, 17),
2012 FIELD1("QueueType:", 1),
2013 FIELD1("CachePriority:", 0),
2014 { NULL }
2015 };
2016 static struct field_desc fl_t4[] = {
2017 FIELD1("StatusPgNS:", 180),
2018 FIELD1("StatusPgRO:", 179),
2019 FIELD1("FetchNS:", 178),
2020 FIELD1("FetchRO:", 177),
2021 FIELD1("Valid:", 176),
2022 FIELD("PCIeDataChannel:", 174, 175),
2023 FIELD1("DCAEgrQEn:", 173),
2024 FIELD("DCACPUID:", 168, 172),
2025 FIELD1("FCThreshOverride:", 167),
2026 FIELD1("ReschedulePending:", 160),
2027 FIELD1("OnChipQueue:", 159),
2028 FIELD1("FetchSizeMode", 158),
2029 { "FetchBurstMin:", 156, 157, 4, 0, 1 },
2030 { "FetchBurstMax:", 153, 154, 6, 0, 1 },
2031 FIELD1("FLMcongMode:", 152),
2032 FIELD("MaxuPFLCredits:", 144, 151),
2033 FIELD("FLMcontextID:", 133, 143),
2034 FIELD1("uPTokenEn:", 132),
2035 FIELD1("UserModeIO:", 131),
2036 FIELD("uPFLCredits:", 123, 130),
2037 FIELD1("uPFLCreditEn:", 122),
2038 FIELD("FID:", 111, 121),
2039 FIELD("HostFCMode:", 109, 110),
2040 FIELD1("HostFCOwner:", 108),
2041 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 },
2042 FIELD("CIDX:", 89, 104),
2043 FIELD("PIDX:", 73, 88),
2044 { "BaseAddress:", 18, 72, 9, 1 },
2045 FIELD("QueueSize:", 2, 17),
2046 FIELD1("QueueType:", 1),
2047 FIELD1("CachePriority:", 0),
2048 { NULL }
2049 };
2050 static struct field_desc ingress_t4[] = {
2051 FIELD1("NoSnoop:", 145),
2052 FIELD1("RelaxedOrdering:", 144),
2053 FIELD1("GTSmode:", 143),
2054 FIELD1("ISCSICoalescing:", 142),
2055 FIELD1("Valid:", 141),
2056 FIELD1("TimerPending:", 140),
2057 FIELD1("DropRSS:", 139),
2058 FIELD("PCIeChannel:", 137, 138),
2059 FIELD1("SEInterruptArmed:", 136),
2060 FIELD1("CongestionMgtEnable:", 135),
2061 FIELD1("DCAIngQEnable:", 134),
2062 FIELD("DCACPUID:", 129, 133),
2063 FIELD1("UpdateScheduling:", 128),
2064 FIELD("UpdateDelivery:", 126, 127),
2065 FIELD1("InterruptSent:", 125),
2066 FIELD("InterruptIDX:", 114, 124),
2067 FIELD1("InterruptDestination:", 113),
2068 FIELD1("InterruptArmed:", 112),
2069 FIELD("RxIntCounter:", 106, 111),
2070 FIELD("RxIntCounterThreshold:", 104, 105),
2071 FIELD1("Generation:", 103),
2072 { "BaseAddress:", 48, 102, 9, 1 },
2073 FIELD("PIDX:", 32, 47),
2074 FIELD("CIDX:", 16, 31),
2075 { "QueueSize:", 4, 15, 4, 0 },
2076 { "QueueEntrySize:", 2, 3, 4, 0, 1 },
2077 FIELD1("QueueEntryOverride:", 1),
2078 FIELD1("CachePriority:", 0),
2079 { NULL }
2080 };
2081 static struct field_desc flm_t4[] = {
2082 FIELD1("NoSnoop:", 79),
2083 FIELD1("RelaxedOrdering:", 78),
2084 FIELD1("Valid:", 77),
2085 FIELD("DCACPUID:", 72, 76),
2086 FIELD1("DCAFLEn:", 71),
2087 FIELD("EQid:", 54, 70),
2088 FIELD("SplitEn:", 52, 53),
2089 FIELD1("PadEn:", 51),
2090 FIELD1("PackEn:", 50),
2091 FIELD1("DBpriority:", 48),
2092 FIELD("PackOffset:", 16, 47),
2093 FIELD("CIDX:", 8, 15),
2094 FIELD("PIDX:", 0, 7),
2095 { NULL }
2096 };
2097 static struct field_desc conm_t4[] = {
2098 FIELD1("CngDBPHdr:", 6),
2099 FIELD1("CngDBPData:", 5),
2100 FIELD1("CngIMSG:", 4),
2101 { "CngChMap:", 0, 3, 0, 1, 0},
2102 { NULL }
2103 };
2104
2105 if (p->mem_id == SGE_CONTEXT_EGRESS)
2106 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4);
2107 else if (p->mem_id == SGE_CONTEXT_FLM)
2108 show_struct(p->data, 3, flm_t4);
2109 else if (p->mem_id == SGE_CONTEXT_INGRESS)
2110 show_struct(p->data, 5, ingress_t4);
2111 else if (p->mem_id == SGE_CONTEXT_CNM)
2112 show_struct(p->data, 1, conm_t4);
2113 }
2114
2115 #undef FIELD
2116 #undef FIELD1
2117
2118 static int
get_sge_context(int argc,const char * argv[])2119 get_sge_context(int argc, const char *argv[])
2120 {
2121 int rc;
2122 char *p;
2123 long cid;
2124 struct t4_sge_ctxt cntxt = {0};
2125
2126 if (argc != 2) {
2127 warnx("sge_context: incorrect number of arguments.");
2128 return (EINVAL);
2129 }
2130
2131 if (!strcmp(argv[0], "egress"))
2132 cntxt.mem_id = SGE_CONTEXT_EGRESS;
2133 else if (!strcmp(argv[0], "ingress"))
2134 cntxt.mem_id = SGE_CONTEXT_INGRESS;
2135 else if (!strcmp(argv[0], "fl"))
2136 cntxt.mem_id = SGE_CONTEXT_FLM;
2137 else if (!strcmp(argv[0], "cong"))
2138 cntxt.mem_id = SGE_CONTEXT_CNM;
2139 else {
2140 warnx("unknown context type \"%s\"; known types are egress, "
2141 "ingress, fl, and cong.", argv[0]);
2142 return (EINVAL);
2143 }
2144
2145 p = str_to_number(argv[1], &cid, NULL);
2146 if (*p) {
2147 warnx("invalid context id \"%s\"", argv[1]);
2148 return (EINVAL);
2149 }
2150 cntxt.cid = cid;
2151
2152 rc = doit(CHELSIO_T4_GET_SGE_CTXT, &cntxt);
2153 if (rc != 0)
2154 return (rc);
2155
2156 switch (g.chip_id) {
2157 case 4:
2158 show_t4_ctxt(&cntxt);
2159 break;
2160 case 5:
2161 case 6:
2162 show_t5t6_ctxt(&cntxt, g.chip_id);
2163 break;
2164 default:
2165 show_t7_ctxt(&cntxt);
2166 }
2167
2168 return (0);
2169 }
2170
2171 static int
real_load_file(unsigned long ioc,const char * iocname,const char * fname,struct t4_bootrom * br)2172 real_load_file(unsigned long ioc, const char *iocname, const char *fname,
2173 struct t4_bootrom *br)
2174 {
2175 int rc, fd, n;
2176 struct t4_data data = {0};
2177 struct stat st = {0};
2178 const int bufsz = 2 * 1024 * 1024;
2179
2180 if (strcmp(fname, "clear") == 0) {
2181 if (br == NULL)
2182 return (real_doit(ioc, &data, iocname));
2183 else
2184 return (real_doit(ioc, br, iocname));
2185 }
2186
2187 fd = open(fname, O_RDONLY);
2188 if (fd < 0) {
2189 warn("open(%s)", fname);
2190 return (errno);
2191 }
2192
2193 if (fstat(fd, &st) < 0) {
2194 warn("fstat");
2195 close(fd);
2196 return (errno);
2197 }
2198
2199 if (st.st_mode & S_IFREG) {
2200 data.len = st.st_size;
2201 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0);
2202 if (data.data == MAP_FAILED) {
2203 warn("mmap %u", data.len);
2204 return (errno);
2205 }
2206 } else {
2207 data.data = malloc(bufsz);
2208 if (data.data == NULL) {
2209 warnx("malloc failed.");
2210 return (ENOMEM);
2211 }
2212 for (data.len = 0; data.len <= bufsz; data.len += n) {
2213 n = read(fd, data.data + data.len, bufsz - data.len);
2214 if (n == -1) {
2215 warn("read(%s, %u)", fname, data.len);
2216 free(data.data);
2217 close(fd);
2218 return (errno);
2219 }
2220 if (n == 0)
2221 break;
2222 }
2223 if (data.len == bufsz)
2224 warnx("file '%s' contents > %u ignored.", fname, bufsz);
2225 }
2226
2227 if (br == NULL)
2228 rc = real_doit(ioc, &data, iocname);
2229 else {
2230 br->len = data.len;
2231 br->data = data.data;
2232 rc = real_doit(ioc, br, iocname);
2233 }
2234 if (st.st_mode & S_IFREG)
2235 munmap(data.data, data.len);
2236 else
2237 free(data.data);
2238 close(fd);
2239 return (rc);
2240 }
2241 #define load_file(ioc, fname) real_load_file(ioc, #ioc, fname, NULL)
2242 #define load_file_br(ioc, fname, br) real_load_file(ioc, #ioc, fname, br)
2243
2244 static int
loadfw(int argc,const char * argv[])2245 loadfw(int argc, const char *argv[])
2246 {
2247 const char *fname = argv[0];
2248
2249 if (argc != 1) {
2250 warnx("loadfw: incorrect number of arguments.");
2251 return (EINVAL);
2252 }
2253
2254 return (load_file(CHELSIO_T4_LOAD_FW, fname));
2255 }
2256
2257 static int
loadcfg(int argc,const char * argv[])2258 loadcfg(int argc, const char *argv[])
2259 {
2260 const char *fname = argv[0];
2261
2262 if (argc != 1) {
2263 warnx("loadcfg: incorrect number of arguments.");
2264 return (EINVAL);
2265 }
2266
2267 return (load_file(CHELSIO_T4_LOAD_CFG, fname));
2268 }
2269
2270 static int
dumpstate(int argc,const char * argv[])2271 dumpstate(int argc, const char *argv[])
2272 {
2273 int rc, fd;
2274 struct t4_cudbg_dump dump = {0};
2275 const char *fname = argv[0];
2276
2277 if (argc != 1) {
2278 warnx("dumpstate: incorrect number of arguments.");
2279 return (EINVAL);
2280 }
2281
2282 dump.wr_flash = 0;
2283 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap));
2284 dump.len = 8 * 1024 * 1024;
2285 dump.data = malloc(dump.len);
2286 if (dump.data == NULL) {
2287 return (ENOMEM);
2288 }
2289
2290 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump);
2291 if (rc != 0)
2292 goto done;
2293
2294 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY,
2295 S_IRUSR | S_IRGRP | S_IROTH);
2296 if (fd < 0) {
2297 warn("open(%s)", fname);
2298 rc = errno;
2299 goto done;
2300 }
2301 write(fd, dump.data, dump.len);
2302 close(fd);
2303 done:
2304 free(dump.data);
2305 return (rc);
2306 }
2307
2308 static int
read_mem(uint32_t addr,uint32_t len,void (* output)(uint32_t *,uint32_t))2309 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t))
2310 {
2311 int rc;
2312 struct t4_mem_range mr;
2313
2314 mr.addr = addr;
2315 mr.len = len;
2316 mr.data = malloc(mr.len);
2317
2318 if (mr.data == 0) {
2319 warn("read_mem: malloc");
2320 return (errno);
2321 }
2322
2323 rc = doit(CHELSIO_T4_GET_MEM, &mr);
2324 if (rc != 0)
2325 goto done;
2326
2327 if (output)
2328 (*output)(mr.data, mr.len);
2329 done:
2330 free(mr.data);
2331 return (rc);
2332 }
2333
2334 static int
loadboot(int argc,const char * argv[])2335 loadboot(int argc, const char *argv[])
2336 {
2337 long l;
2338 char *p;
2339 struct t4_bootrom br = {0};
2340 const char *fname = argv[0];
2341
2342 if (argc == 1) {
2343 br.pf_offset = 0;
2344 br.pfidx_addr = 0;
2345 } else if (argc == 3) {
2346 if (!strcmp(argv[1], "pf"))
2347 br.pf_offset = 0;
2348 else if (!strcmp(argv[1], "offset"))
2349 br.pf_offset = 1;
2350 else
2351 return (EINVAL);
2352
2353 p = str_to_number(argv[2], &l, NULL);
2354 if (*p)
2355 return (EINVAL);
2356 br.pfidx_addr = l;
2357 } else {
2358 warnx("loadboot: incorrect number of arguments.");
2359 return (EINVAL);
2360 }
2361
2362 return (load_file_br(CHELSIO_T4_LOAD_BOOT, fname, &br));
2363 }
2364
2365 static int
loadbootcfg(int argc,const char * argv[])2366 loadbootcfg(int argc, const char *argv[])
2367 {
2368 const char *fname = argv[0];
2369
2370 if (argc != 1) {
2371 warnx("loadbootcfg: incorrect number of arguments.");
2372 return (EINVAL);
2373 }
2374
2375 return (load_file(CHELSIO_T4_LOAD_BOOTCFG, fname));
2376 }
2377
2378 /*
2379 * Display memory as list of 'n' 4-byte values per line.
2380 */
2381 static void
show_mem(uint32_t * buf,uint32_t len)2382 show_mem(uint32_t *buf, uint32_t len)
2383 {
2384 const char *s;
2385 int i, n = 8;
2386
2387 while (len) {
2388 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2389 s = i ? " " : "";
2390 printf("%s%08x", s, htonl(*buf));
2391 }
2392 printf("\n");
2393 }
2394 }
2395
2396 static int
memdump(int argc,const char * argv[])2397 memdump(int argc, const char *argv[])
2398 {
2399 char *p;
2400 long l;
2401 uint32_t addr, len;
2402
2403 if (argc != 2) {
2404 warnx("incorrect number of arguments.");
2405 return (EINVAL);
2406 }
2407
2408 p = str_to_number(argv[0], &l, NULL);
2409 if (*p) {
2410 warnx("invalid address \"%s\"", argv[0]);
2411 return (EINVAL);
2412 }
2413 addr = l;
2414
2415 p = str_to_number(argv[1], &l, NULL);
2416 if (*p) {
2417 warnx("memdump: invalid length \"%s\"", argv[1]);
2418 return (EINVAL);
2419 }
2420 len = l;
2421
2422 return (read_mem(addr, len, show_mem));
2423 }
2424
2425 /*
2426 * Display TCB as list of 'n' 4-byte values per line.
2427 */
2428 static void
show_tcb(uint32_t * buf,uint32_t len)2429 show_tcb(uint32_t *buf, uint32_t len)
2430 {
2431 unsigned char *tcb = (unsigned char *)buf;
2432 const char *s;
2433 int i, n = 8;
2434
2435 while (len) {
2436 for (i = 0; len && i < n; i++, buf++, len -= 4) {
2437 s = i ? " " : "";
2438 printf("%s%08x", s, htonl(*buf));
2439 }
2440 printf("\n");
2441 }
2442 set_tcb_info(TIDTYPE_TCB, g.chip_id);
2443 set_print_style(PRNTSTYL_COMP);
2444 swizzle_tcb(tcb);
2445 parse_n_display_xcb(tcb);
2446 }
2447
2448 #define A_TP_CMM_TCB_BASE 0x7d10
2449 #define TCB_SIZE 128
2450 static int
read_tcb(int argc,const char * argv[])2451 read_tcb(int argc, const char *argv[])
2452 {
2453 char *p;
2454 long l;
2455 long long val;
2456 unsigned int tid;
2457 uint32_t addr;
2458 int rc;
2459
2460 if (argc != 1) {
2461 warnx("incorrect number of arguments.");
2462 return (EINVAL);
2463 }
2464
2465 p = str_to_number(argv[0], &l, NULL);
2466 if (*p) {
2467 warnx("invalid tid \"%s\"", argv[0]);
2468 return (EINVAL);
2469 }
2470 tid = l;
2471
2472 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val);
2473 if (rc != 0)
2474 return (rc);
2475
2476 addr = val + tid * TCB_SIZE;
2477
2478 return (read_mem(addr, TCB_SIZE, show_tcb));
2479 }
2480
2481 static int
read_i2c(int argc,const char * argv[])2482 read_i2c(int argc, const char *argv[])
2483 {
2484 char *p;
2485 long l;
2486 struct t4_i2c_data i2cd;
2487 int rc, i;
2488
2489 if (argc < 3 || argc > 4) {
2490 warnx("incorrect number of arguments.");
2491 return (EINVAL);
2492 }
2493
2494 p = str_to_number(argv[0], &l, NULL);
2495 if (*p || l > UCHAR_MAX) {
2496 warnx("invalid port id \"%s\"", argv[0]);
2497 return (EINVAL);
2498 }
2499 i2cd.port_id = l;
2500
2501 p = str_to_number(argv[1], &l, NULL);
2502 if (*p || l > UCHAR_MAX) {
2503 warnx("invalid i2c device address \"%s\"", argv[1]);
2504 return (EINVAL);
2505 }
2506 i2cd.dev_addr = l;
2507
2508 p = str_to_number(argv[2], &l, NULL);
2509 if (*p || l > UCHAR_MAX) {
2510 warnx("invalid byte offset \"%s\"", argv[2]);
2511 return (EINVAL);
2512 }
2513 i2cd.offset = l;
2514
2515 if (argc == 4) {
2516 p = str_to_number(argv[3], &l, NULL);
2517 if (*p || l > sizeof(i2cd.data)) {
2518 warnx("invalid number of bytes \"%s\"", argv[3]);
2519 return (EINVAL);
2520 }
2521 i2cd.len = l;
2522 } else
2523 i2cd.len = 1;
2524
2525 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2526 if (rc != 0)
2527 return (rc);
2528
2529 for (i = 0; i < i2cd.len; i++)
2530 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]);
2531
2532 return (0);
2533 }
2534
2535 static int
clearstats(int argc,const char * argv[])2536 clearstats(int argc, const char *argv[])
2537 {
2538 char *p;
2539 long l;
2540 uint32_t port;
2541
2542 if (argc != 1) {
2543 warnx("incorrect number of arguments.");
2544 return (EINVAL);
2545 }
2546
2547 p = str_to_number(argv[0], &l, NULL);
2548 if (*p) {
2549 warnx("invalid port id \"%s\"", argv[0]);
2550 return (EINVAL);
2551 }
2552 port = l;
2553
2554 return doit(CHELSIO_T4_CLEAR_STATS, &port);
2555 }
2556
2557 static int
show_tracers(void)2558 show_tracers(void)
2559 {
2560 struct t4_tracer t;
2561 char *s;
2562 int rc, port_idx, i;
2563 long long val;
2564
2565 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */
2566 rc = read_reg(0x9800, 4, &val);
2567 if (rc != 0)
2568 return (rc);
2569 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED");
2570
2571 t.idx = 0;
2572 for (t.idx = 0; ; t.idx++) {
2573 rc = doit(CHELSIO_T4_GET_TRACER, &t);
2574 if (rc != 0 || t.idx == 0xff)
2575 break;
2576
2577 if (t.tp.port < 4) {
2578 s = "Rx";
2579 port_idx = t.tp.port;
2580 } else if (t.tp.port < 8) {
2581 s = "Tx";
2582 port_idx = t.tp.port - 4;
2583 } else if (t.tp.port < 12) {
2584 s = "loopback";
2585 port_idx = t.tp.port - 8;
2586 } else if (t.tp.port < 16) {
2587 s = "MPS Rx";
2588 port_idx = t.tp.port - 12;
2589 } else if (t.tp.port < 20) {
2590 s = "MPS Tx";
2591 port_idx = t.tp.port - 16;
2592 } else {
2593 s = "unknown";
2594 port_idx = t.tp.port;
2595 }
2596
2597 printf("\ntracer %u (currently %s) captures ", t.idx,
2598 t.enabled ? "ENABLED" : "DISABLED");
2599 if (t.tp.port < 8)
2600 printf("port %u %s, ", port_idx, s);
2601 else
2602 printf("%s %u, ", s, port_idx);
2603 printf("snap length: %u, min length: %u\n", t.tp.snap_len,
2604 t.tp.min_len);
2605 printf("packets captured %smatch filter\n",
2606 t.tp.invert ? "do not " : "");
2607 if (t.tp.skip_ofst) {
2608 printf("filter pattern: ");
2609 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2610 printf("%08x%08x", t.tp.data[i],
2611 t.tp.data[i + 1]);
2612 printf("/");
2613 for (i = 0; i < t.tp.skip_ofst * 2; i += 2)
2614 printf("%08x%08x", t.tp.mask[i],
2615 t.tp.mask[i + 1]);
2616 printf("@0\n");
2617 }
2618 printf("filter pattern: ");
2619 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2620 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]);
2621 printf("/");
2622 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2)
2623 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]);
2624 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8);
2625 }
2626
2627 return (rc);
2628 }
2629
2630 static int
tracer_onoff(uint8_t idx,int enabled)2631 tracer_onoff(uint8_t idx, int enabled)
2632 {
2633 struct t4_tracer t;
2634
2635 t.idx = idx;
2636 t.enabled = enabled;
2637 t.valid = 0;
2638
2639 return doit(CHELSIO_T4_SET_TRACER, &t);
2640 }
2641
2642 static void
create_tracing_ifnet()2643 create_tracing_ifnet()
2644 {
2645 char *cmd[] = {
2646 "/sbin/ifconfig", __DECONST(char *, g.nexus), "create", NULL
2647 };
2648 char *env[] = {NULL};
2649
2650 if (vfork() == 0) {
2651 close(STDERR_FILENO);
2652 execve(cmd[0], cmd, env);
2653 _exit(0);
2654 }
2655 }
2656
2657 /*
2658 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted
2659 * matching). Right now this is a quick-n-dirty implementation that traces the
2660 * first 128B of all tx or rx on a port
2661 */
2662 static int
set_tracer(uint8_t idx,int argc,const char * argv[])2663 set_tracer(uint8_t idx, int argc, const char *argv[])
2664 {
2665 struct t4_tracer t;
2666 int len, port;
2667
2668 bzero(&t, sizeof (t));
2669 t.idx = idx;
2670 t.enabled = 1;
2671 t.valid = 1;
2672
2673 if (argc != 1) {
2674 warnx("must specify one of tx/rx/lo<n>");
2675 return (EINVAL);
2676 }
2677
2678 len = strlen(argv[0]);
2679 if (len != 3) {
2680 warnx("argument must be 3 characters (tx/rx/lo<n>). eg. tx0");
2681 return (EINVAL);
2682 }
2683
2684 if (strncmp(argv[0], "lo", 2) == 0) {
2685 port = argv[0][2] - '0';
2686 if (port < 0 || port > 3) {
2687 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2688 return (EINVAL);
2689 }
2690 port += 8;
2691 } else if (strncmp(argv[0], "tx", 2) == 0) {
2692 port = argv[0][2] - '0';
2693 if (port < 0 || port > 3) {
2694 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2695 return (EINVAL);
2696 }
2697 port += 4;
2698 } else if (strncmp(argv[0], "rx", 2) == 0) {
2699 port = argv[0][2] - '0';
2700 if (port < 0 || port > 3) {
2701 warnx("'%c' in %s is invalid", argv[0][2], argv[0]);
2702 return (EINVAL);
2703 }
2704 } else {
2705 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]);
2706 return (EINVAL);
2707 }
2708
2709 t.tp.snap_len = 128;
2710 t.tp.min_len = 0;
2711 t.tp.skip_ofst = 0;
2712 t.tp.skip_len = 0;
2713 t.tp.invert = 0;
2714 t.tp.port = port;
2715
2716 create_tracing_ifnet();
2717 return doit(CHELSIO_T4_SET_TRACER, &t);
2718 }
2719
2720 static int
tracer_cmd(int argc,const char * argv[])2721 tracer_cmd(int argc, const char *argv[])
2722 {
2723 long long val;
2724 uint8_t idx;
2725 char *s;
2726
2727 if (argc == 0) {
2728 warnx("tracer: no arguments.");
2729 return (EINVAL);
2730 };
2731
2732 /* list */
2733 if (strcmp(argv[0], "list") == 0) {
2734 if (argc != 1)
2735 warnx("trailing arguments after \"list\" ignored.");
2736
2737 return show_tracers();
2738 }
2739
2740 /* <idx> ... */
2741 s = str_to_number(argv[0], NULL, &val);
2742 if (*s || val > 0xff) {
2743 warnx("\"%s\" is neither an index nor a tracer subcommand.",
2744 argv[0]);
2745 return (EINVAL);
2746 }
2747 idx = (int8_t)val;
2748
2749 /* <idx> disable */
2750 if (argc == 2 && strcmp(argv[1], "disable") == 0)
2751 return tracer_onoff(idx, 0);
2752
2753 /* <idx> enable */
2754 if (argc == 2 && strcmp(argv[1], "enable") == 0)
2755 return tracer_onoff(idx, 1);
2756
2757 /* <idx> ... */
2758 return set_tracer(idx, argc - 1, argv + 1);
2759 }
2760
2761 static int
modinfo_raw(int port_id)2762 modinfo_raw(int port_id)
2763 {
2764 uint8_t offset;
2765 struct t4_i2c_data i2cd;
2766 int rc;
2767
2768 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) {
2769 bzero(&i2cd, sizeof(i2cd));
2770 i2cd.port_id = port_id;
2771 i2cd.dev_addr = 0xa0;
2772 i2cd.offset = offset;
2773 i2cd.len = sizeof(i2cd.data);
2774 rc = doit(CHELSIO_T4_GET_I2C, &i2cd);
2775 if (rc != 0)
2776 return (rc);
2777 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x",
2778 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2],
2779 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6],
2780 i2cd.data[7]);
2781
2782 printf(" %c%c%c%c %c%c%c%c\n",
2783 isprint(i2cd.data[0]) ? i2cd.data[0] : '.',
2784 isprint(i2cd.data[1]) ? i2cd.data[1] : '.',
2785 isprint(i2cd.data[2]) ? i2cd.data[2] : '.',
2786 isprint(i2cd.data[3]) ? i2cd.data[3] : '.',
2787 isprint(i2cd.data[4]) ? i2cd.data[4] : '.',
2788 isprint(i2cd.data[5]) ? i2cd.data[5] : '.',
2789 isprint(i2cd.data[6]) ? i2cd.data[6] : '.',
2790 isprint(i2cd.data[7]) ? i2cd.data[7] : '.');
2791 }
2792
2793 return (0);
2794 }
2795
2796 static int
modinfo(int argc,const char * argv[])2797 modinfo(int argc, const char *argv[])
2798 {
2799 long port;
2800 char string[16], *p;
2801 struct t4_i2c_data i2cd;
2802 int rc, i;
2803 uint16_t temp, vcc, tx_bias, tx_power, rx_power;
2804
2805 if (argc < 1) {
2806 warnx("must supply a port");
2807 return (EINVAL);
2808 }
2809
2810 if (argc > 2) {
2811 warnx("too many arguments");
2812 return (EINVAL);
2813 }
2814
2815 p = str_to_number(argv[0], &port, NULL);
2816 if (*p || port > UCHAR_MAX) {
2817 warnx("invalid port id \"%s\"", argv[0]);
2818 return (EINVAL);
2819 }
2820
2821 if (argc == 2) {
2822 if (!strcmp(argv[1], "raw"))
2823 return (modinfo_raw(port));
2824 else {
2825 warnx("second argument can only be \"raw\"");
2826 return (EINVAL);
2827 }
2828 }
2829
2830 bzero(&i2cd, sizeof(i2cd));
2831 i2cd.len = 1;
2832 i2cd.port_id = port;
2833 i2cd.dev_addr = SFF_8472_BASE;
2834
2835 i2cd.offset = SFF_8472_ID;
2836 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2837 goto fail;
2838
2839 if (i2cd.data[0] > SFF_8472_ID_LAST)
2840 printf("Unknown ID\n");
2841 else
2842 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]);
2843
2844 bzero(&string, sizeof(string));
2845 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) {
2846 i2cd.offset = i;
2847 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2848 goto fail;
2849 string[i - SFF_8472_VENDOR_START] = i2cd.data[0];
2850 }
2851 printf("Vendor %s\n", string);
2852
2853 bzero(&string, sizeof(string));
2854 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) {
2855 i2cd.offset = i;
2856 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2857 goto fail;
2858 string[i - SFF_8472_SN_START] = i2cd.data[0];
2859 }
2860 printf("SN %s\n", string);
2861
2862 bzero(&string, sizeof(string));
2863 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) {
2864 i2cd.offset = i;
2865 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2866 goto fail;
2867 string[i - SFF_8472_PN_START] = i2cd.data[0];
2868 }
2869 printf("PN %s\n", string);
2870
2871 bzero(&string, sizeof(string));
2872 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) {
2873 i2cd.offset = i;
2874 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2875 goto fail;
2876 string[i - SFF_8472_REV_START] = i2cd.data[0];
2877 }
2878 printf("Rev %s\n", string);
2879
2880 i2cd.offset = SFF_8472_DIAG_TYPE;
2881 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2882 goto fail;
2883
2884 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL |
2885 SFF_8472_DIAG_INTERNAL)) {
2886
2887 /* Switch to reading from the Diagnostic address. */
2888 i2cd.dev_addr = SFF_8472_DIAG;
2889 i2cd.len = 1;
2890
2891 i2cd.offset = SFF_8472_TEMP;
2892 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2893 goto fail;
2894 temp = i2cd.data[0] << 8;
2895 printf("Temp: ");
2896 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN)
2897 printf("-");
2898 else
2899 printf("+");
2900 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >>
2901 SFF_8472_TEMP_SHIFT);
2902
2903 i2cd.offset = SFF_8472_VCC;
2904 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2905 goto fail;
2906 vcc = i2cd.data[0] << 8;
2907 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR);
2908
2909 i2cd.offset = SFF_8472_TX_BIAS;
2910 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2911 goto fail;
2912 tx_bias = i2cd.data[0] << 8;
2913 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR);
2914
2915 i2cd.offset = SFF_8472_TX_POWER;
2916 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2917 goto fail;
2918 tx_power = i2cd.data[0] << 8;
2919 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR);
2920
2921 i2cd.offset = SFF_8472_RX_POWER;
2922 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0)
2923 goto fail;
2924 rx_power = i2cd.data[0] << 8;
2925 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR);
2926
2927 } else
2928 printf("Diagnostics not supported.\n");
2929
2930 return(0);
2931
2932 fail:
2933 if (rc == EPERM)
2934 warnx("No module/cable in port %ld", port);
2935 return (rc);
2936
2937 }
2938
2939 /* XXX: pass in a low/high and do range checks as well */
2940 static int
get_sched_param(const char * param,const char * args[],long * val)2941 get_sched_param(const char *param, const char *args[], long *val)
2942 {
2943 char *p;
2944
2945 if (strcmp(param, args[0]) != 0)
2946 return (EINVAL);
2947
2948 p = str_to_number(args[1], val, NULL);
2949 if (*p) {
2950 warnx("parameter \"%s\" has bad value \"%s\"", args[0],
2951 args[1]);
2952 return (EINVAL);
2953 }
2954
2955 return (0);
2956 }
2957
2958 static int
sched_class(int argc,const char * argv[])2959 sched_class(int argc, const char *argv[])
2960 {
2961 struct t4_sched_params op;
2962 int errs, i;
2963
2964 memset(&op, 0xff, sizeof(op));
2965 op.subcmd = -1;
2966 op.type = -1;
2967 if (argc == 0) {
2968 warnx("missing scheduling sub-command");
2969 return (EINVAL);
2970 }
2971 if (!strcmp(argv[0], "config")) {
2972 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG;
2973 op.u.config.minmax = -1;
2974 } else if (!strcmp(argv[0], "params")) {
2975 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS;
2976 op.u.params.level = op.u.params.mode = op.u.params.rateunit =
2977 op.u.params.ratemode = op.u.params.channel =
2978 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate =
2979 op.u.params.weight = op.u.params.pktsize = -1;
2980 } else {
2981 warnx("invalid scheduling sub-command \"%s\"", argv[0]);
2982 return (EINVAL);
2983 }
2984
2985 /* Decode remaining arguments ... */
2986 errs = 0;
2987 for (i = 1; i < argc; i += 2) {
2988 const char **args = &argv[i];
2989 long l;
2990
2991 if (i + 1 == argc) {
2992 warnx("missing argument for \"%s\"", args[0]);
2993 errs++;
2994 break;
2995 }
2996
2997 if (!strcmp(args[0], "type")) {
2998 if (!strcmp(args[1], "packet"))
2999 op.type = SCHED_CLASS_TYPE_PACKET;
3000 else {
3001 warnx("invalid type parameter \"%s\"", args[1]);
3002 errs++;
3003 }
3004
3005 continue;
3006 }
3007
3008 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
3009 if(!get_sched_param("minmax", args, &l))
3010 op.u.config.minmax = (int8_t)l;
3011 else {
3012 warnx("unknown scheduler config parameter "
3013 "\"%s\"", args[0]);
3014 errs++;
3015 }
3016
3017 continue;
3018 }
3019
3020 /* Rest applies only to SUBCMD_PARAMS */
3021 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS)
3022 continue;
3023
3024 if (!strcmp(args[0], "level")) {
3025 if (!strcmp(args[1], "cl-rl"))
3026 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL;
3027 else if (!strcmp(args[1], "cl-wrr"))
3028 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR;
3029 else if (!strcmp(args[1], "ch-rl"))
3030 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL;
3031 else {
3032 warnx("invalid level parameter \"%s\"",
3033 args[1]);
3034 errs++;
3035 }
3036 } else if (!strcmp(args[0], "mode")) {
3037 if (!strcmp(args[1], "class"))
3038 op.u.params.mode = SCHED_CLASS_MODE_CLASS;
3039 else if (!strcmp(args[1], "flow"))
3040 op.u.params.mode = SCHED_CLASS_MODE_FLOW;
3041 else {
3042 warnx("invalid mode parameter \"%s\"", args[1]);
3043 errs++;
3044 }
3045 } else if (!strcmp(args[0], "rate-unit")) {
3046 if (!strcmp(args[1], "bits"))
3047 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS;
3048 else if (!strcmp(args[1], "pkts"))
3049 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS;
3050 else {
3051 warnx("invalid rate-unit parameter \"%s\"",
3052 args[1]);
3053 errs++;
3054 }
3055 } else if (!strcmp(args[0], "rate-mode")) {
3056 if (!strcmp(args[1], "relative"))
3057 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL;
3058 else if (!strcmp(args[1], "absolute"))
3059 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS;
3060 else {
3061 warnx("invalid rate-mode parameter \"%s\"",
3062 args[1]);
3063 errs++;
3064 }
3065 } else if (!get_sched_param("channel", args, &l))
3066 op.u.params.channel = (int8_t)l;
3067 else if (!get_sched_param("class", args, &l))
3068 op.u.params.cl = (int8_t)l;
3069 else if (!get_sched_param("min-rate", args, &l))
3070 op.u.params.minrate = (int32_t)l;
3071 else if (!get_sched_param("max-rate", args, &l))
3072 op.u.params.maxrate = (int32_t)l;
3073 else if (!get_sched_param("weight", args, &l))
3074 op.u.params.weight = (int16_t)l;
3075 else if (!get_sched_param("pkt-size", args, &l))
3076 op.u.params.pktsize = (int16_t)l;
3077 else {
3078 warnx("unknown scheduler parameter \"%s\"", args[0]);
3079 errs++;
3080 }
3081 }
3082
3083 /*
3084 * Catch some logical fallacies in terms of argument combinations here
3085 * so we can offer more than just the EINVAL return from the driver.
3086 * The driver will be able to catch a lot more issues since it knows
3087 * the specifics of the device hardware capabilities like how many
3088 * channels, classes, etc. the device supports.
3089 */
3090 if (op.type < 0) {
3091 warnx("sched \"type\" parameter missing");
3092 errs++;
3093 }
3094 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) {
3095 if (op.u.config.minmax < 0) {
3096 warnx("sched config \"minmax\" parameter missing");
3097 errs++;
3098 }
3099 }
3100 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) {
3101 if (op.u.params.level < 0) {
3102 warnx("sched params \"level\" parameter missing");
3103 errs++;
3104 }
3105 if (op.u.params.mode < 0 &&
3106 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) {
3107 warnx("sched params \"mode\" parameter missing");
3108 errs++;
3109 }
3110 if (op.u.params.rateunit < 0 &&
3111 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
3112 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
3113 warnx("sched params \"rate-unit\" parameter missing");
3114 errs++;
3115 }
3116 if (op.u.params.ratemode < 0 &&
3117 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
3118 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
3119 warnx("sched params \"rate-mode\" parameter missing");
3120 errs++;
3121 }
3122 if (op.u.params.channel < 0) {
3123 warnx("sched params \"channel\" missing");
3124 errs++;
3125 }
3126 if (op.u.params.cl < 0 &&
3127 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
3128 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) {
3129 warnx("sched params \"class\" missing");
3130 errs++;
3131 }
3132 if (op.u.params.maxrate < 0 &&
3133 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL ||
3134 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) {
3135 warnx("sched params \"max-rate\" missing for "
3136 "rate-limit level");
3137 errs++;
3138 }
3139 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR &&
3140 (op.u.params.weight < 1 || op.u.params.weight > 99)) {
3141 warnx("sched params \"weight\" missing or invalid "
3142 "(not 1-99) for weighted-round-robin level");
3143 errs++;
3144 }
3145 if (op.u.params.pktsize < 0 &&
3146 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) {
3147 warnx("sched params \"pkt-size\" missing for "
3148 "rate-limit level");
3149 errs++;
3150 }
3151 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW &&
3152 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) {
3153 warnx("sched params mode flow needs rate-mode absolute");
3154 errs++;
3155 }
3156 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL &&
3157 !in_range(op.u.params.maxrate, 1, 100)) {
3158 warnx("sched params \"max-rate\" takes "
3159 "percentage value(1-100) for rate-mode relative");
3160 errs++;
3161 }
3162 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS &&
3163 !in_range(op.u.params.maxrate, 1, 100000000)) {
3164 warnx("sched params \"max-rate\" takes "
3165 "value(1-100000000) for rate-mode absolute");
3166 errs++;
3167 }
3168 if (op.u.params.maxrate > 0 &&
3169 op.u.params.maxrate < op.u.params.minrate) {
3170 warnx("sched params \"max-rate\" is less than "
3171 "\"min-rate\"");
3172 errs++;
3173 }
3174 }
3175
3176 if (errs > 0) {
3177 warnx("%d error%s in sched-class command", errs,
3178 errs == 1 ? "" : "s");
3179 return (EINVAL);
3180 }
3181
3182 return doit(CHELSIO_T4_SCHED_CLASS, &op);
3183 }
3184
3185 static int
sched_queue(int argc,const char * argv[])3186 sched_queue(int argc, const char *argv[])
3187 {
3188 struct t4_sched_queue op = {0};
3189 char *p;
3190 long val;
3191
3192 if (argc != 3) {
3193 /* need "<port> <queue> <class> */
3194 warnx("incorrect number of arguments.");
3195 return (EINVAL);
3196 }
3197
3198 p = str_to_number(argv[0], &val, NULL);
3199 if (*p || val > UCHAR_MAX) {
3200 warnx("invalid port id \"%s\"", argv[0]);
3201 return (EINVAL);
3202 }
3203 op.port = (uint8_t)val;
3204
3205 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*"))
3206 op.queue = -1;
3207 else {
3208 p = str_to_number(argv[1], &val, NULL);
3209 if (*p || val < -1) {
3210 warnx("invalid queue \"%s\"", argv[1]);
3211 return (EINVAL);
3212 }
3213 op.queue = (int8_t)val;
3214 }
3215
3216 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear"))
3217 op.cl = -1;
3218 else {
3219 p = str_to_number(argv[2], &val, NULL);
3220 if (*p || val < -1) {
3221 warnx("invalid class \"%s\"", argv[2]);
3222 return (EINVAL);
3223 }
3224 op.cl = (int8_t)val;
3225 }
3226
3227 return doit(CHELSIO_T4_SCHED_QUEUE, &op);
3228 }
3229
3230 static int
parse_offload_settings_word(const char * s,char ** pnext,const char * ws,int * pneg,struct offload_settings * os)3231 parse_offload_settings_word(const char *s, char **pnext, const char *ws,
3232 int *pneg, struct offload_settings *os)
3233 {
3234
3235 while (*s == '!') {
3236 (*pneg)++;
3237 s++;
3238 }
3239
3240 if (!strcmp(s, "not")) {
3241 (*pneg)++;
3242 return (0);
3243 }
3244
3245 if (!strcmp(s, "offload")) {
3246 os->offload = (*pneg + 1) & 1;
3247 *pneg = 0;
3248 } else if (!strcmp(s , "coalesce")) {
3249 os->rx_coalesce = (*pneg + 1) & 1;
3250 *pneg = 0;
3251 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) {
3252 os->tstamp = (*pneg + 1) & 1;
3253 *pneg = 0;
3254 } else if (!strcmp(s, "sack")) {
3255 os->sack = (*pneg + 1) & 1;
3256 *pneg = 0;
3257 } else if (!strcmp(s, "nagle")) {
3258 os->nagle = (*pneg + 1) & 1;
3259 *pneg = 0;
3260 } else if (!strcmp(s, "ecn")) {
3261 os->ecn = (*pneg + 1) & 1;
3262 *pneg = 0;
3263 } else if (!strcmp(s, "ddp")) {
3264 os->ddp = (*pneg + 1) & 1;
3265 *pneg = 0;
3266 } else if (!strcmp(s, "tls")) {
3267 os->tls = (*pneg + 1) & 1;
3268 *pneg = 0;
3269 } else {
3270 char *param, *p;
3271 long val;
3272
3273 /* Settings with additional parameter handled here. */
3274
3275 if (*pneg) {
3276 warnx("\"%s\" is not a valid keyword, or it does not "
3277 "support negation.", s);
3278 return (EINVAL);
3279 }
3280
3281 while ((param = strsep(pnext, ws)) != NULL) {
3282 if (*param != '\0')
3283 break;
3284 }
3285 if (param == NULL) {
3286 warnx("\"%s\" is not a valid keyword, or it requires a "
3287 "parameter that has not been provided.", s);
3288 return (EINVAL);
3289 }
3290
3291 if (!strcmp(s, "cong")) {
3292 if (!strcmp(param, "reno"))
3293 os->cong_algo = 0;
3294 else if (!strcmp(param, "tahoe"))
3295 os->cong_algo = 1;
3296 else if (!strcmp(param, "newreno"))
3297 os->cong_algo = 2;
3298 else if (!strcmp(param, "highspeed"))
3299 os->cong_algo = 3;
3300 else {
3301 warnx("unknown congestion algorithm \"%s\".", s);
3302 return (EINVAL);
3303 }
3304 } else if (!strcmp(s, "class")) {
3305 val = -1;
3306 p = str_to_number(param, &val, NULL);
3307 /* (nsched_cls - 1) is spelled 15 here. */
3308 if (*p || val < 0 || val > 15) {
3309 warnx("invalid scheduling class \"%s\". "
3310 "\"class\" needs an integer value where "
3311 "0 <= value <= 15", param);
3312 return (EINVAL);
3313 }
3314 os->sched_class = val;
3315 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") ||
3316 !strcmp(s, "rxq")) {
3317 if (!strcmp(param, "random")) {
3318 val = QUEUE_RANDOM;
3319 } else if (!strcmp(param, "roundrobin")) {
3320 val = QUEUE_ROUNDROBIN;
3321 } else {
3322 p = str_to_number(param, &val, NULL);
3323 if (*p || val < 0 || val > 0xffff) {
3324 warnx("invalid queue specification "
3325 "\"%s\". \"%s\" needs an integer"
3326 " value, \"random\", or "
3327 "\"roundrobin\".", param, s);
3328 return (EINVAL);
3329 }
3330 }
3331 if (!strcmp(s, "bind")) {
3332 os->txq = val;
3333 os->rxq = val;
3334 } else if (!strcmp(s, "txq")) {
3335 os->txq = val;
3336 } else if (!strcmp(s, "rxq")) {
3337 os->rxq = val;
3338 } else {
3339 return (EDOOFUS);
3340 }
3341 } else if (!strcmp(s, "mss")) {
3342 val = -1;
3343 p = str_to_number(param, &val, NULL);
3344 if (*p || val <= 0) {
3345 warnx("invalid MSS specification \"%s\". "
3346 "\"mss\" needs a positive integer value",
3347 param);
3348 return (EINVAL);
3349 }
3350 os->mss = val;
3351 } else {
3352 warnx("unknown settings keyword: \"%s\"", s);
3353 return (EINVAL);
3354 }
3355 }
3356
3357 return (0);
3358 }
3359
3360 static int
parse_offload_settings(const char * settings_ro,struct offload_settings * os)3361 parse_offload_settings(const char *settings_ro, struct offload_settings *os)
3362 {
3363 const char *ws = " \f\n\r\v\t";
3364 char *settings, *s, *next;
3365 int rc, nsettings, neg;
3366 static const struct offload_settings default_settings = {
3367 .offload = 0, /* No settings imply !offload */
3368 .rx_coalesce = -1,
3369 .cong_algo = -1,
3370 .sched_class = -1,
3371 .tstamp = -1,
3372 .sack = -1,
3373 .nagle = -1,
3374 .ecn = -1,
3375 .ddp = -1,
3376 .tls = -1,
3377 .txq = QUEUE_RANDOM,
3378 .rxq = QUEUE_RANDOM,
3379 .mss = -1,
3380 };
3381
3382 *os = default_settings;
3383
3384 next = settings = strdup(settings_ro);
3385 if (settings == NULL) {
3386 warn (NULL);
3387 return (errno);
3388 }
3389
3390 nsettings = 0;
3391 rc = 0;
3392 neg = 0;
3393 while ((s = strsep(&next, ws)) != NULL) {
3394 if (*s == '\0')
3395 continue;
3396 nsettings++;
3397 rc = parse_offload_settings_word(s, &next, ws, &neg, os);
3398 if (rc != 0)
3399 goto done;
3400 }
3401 if (nsettings == 0) {
3402 warnx("no settings provided");
3403 rc = EINVAL;
3404 goto done;
3405 }
3406 if (neg > 0) {
3407 warnx("%d stray negation(s) at end of offload settings", neg);
3408 rc = EINVAL;
3409 goto done;
3410 }
3411 done:
3412 free(settings);
3413 return (rc);
3414 }
3415
3416 static int
isempty_line(char * line,size_t llen)3417 isempty_line(char *line, size_t llen)
3418 {
3419
3420 /* skip leading whitespace */
3421 while (isspace(*line)) {
3422 line++;
3423 llen--;
3424 }
3425 if (llen == 0 || *line == '#' || *line == '\n')
3426 return (1);
3427
3428 return (0);
3429 }
3430
3431 static int
special_offload_rule(char * str)3432 special_offload_rule(char *str)
3433 {
3434
3435 /* skip leading whitespaces */
3436 while (isspace(*str))
3437 str++;
3438
3439 /* check for special strings: "-", "all", "any" */
3440 if (*str == '-') {
3441 str++;
3442 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) {
3443 str += 3;
3444 } else {
3445 return (0);
3446 }
3447
3448 /* skip trailing whitespaces */
3449 while (isspace(*str))
3450 str++;
3451
3452 return (*str == '\0');
3453 }
3454
3455 /*
3456 * A rule has 3 parts: an open-type, a match expression, and offload settings.
3457 *
3458 * [<open-type>] <expr> => <settings>
3459 */
3460 static int
parse_offload_policy_line(size_t lno,char * line,size_t llen,pcap_t * pd,struct offload_rule * r)3461 parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd,
3462 struct offload_rule *r)
3463 {
3464 char *expr, *settings, *s;
3465
3466 bzero(r, sizeof(*r));
3467
3468 /* Skip leading whitespace. */
3469 while (isspace(*line))
3470 line++;
3471 /* Trim trailing whitespace */
3472 s = &line[llen - 1];
3473 while (isspace(*s)) {
3474 *s-- = '\0';
3475 llen--;
3476 }
3477
3478 /*
3479 * First part of the rule: '[X]' where X = A/D/L/P
3480 */
3481 if (*line++ != '[') {
3482 warnx("missing \"[\" on line %zd", lno);
3483 return (EINVAL);
3484 }
3485 switch (*line) {
3486 case 'A':
3487 case 'D':
3488 case 'L':
3489 case 'P':
3490 r->open_type = *line;
3491 break;
3492 default:
3493 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno);
3494 return (EINVAL);
3495 }
3496 line++;
3497 if (*line++ != ']') {
3498 warnx("missing \"]\" after \"[%c\" on line %zd",
3499 r->open_type, lno);
3500 return (EINVAL);
3501 }
3502
3503 /* Skip whitespace. */
3504 while (isspace(*line))
3505 line++;
3506
3507 /*
3508 * Rest of the rule: <expr> => <settings>
3509 */
3510 expr = line;
3511 s = strstr(line, "=>");
3512 if (s == NULL)
3513 return (EINVAL);
3514 settings = s + 2;
3515 while (isspace(*settings))
3516 settings++;
3517 *s = '\0';
3518
3519 /*
3520 * <expr> is either a special name (all, any) or a pcap-filter(7).
3521 * In case of a special name the bpf_prog stays all-zero.
3522 */
3523 if (!special_offload_rule(expr)) {
3524 if (pcap_compile(pd, &r->bpf_prog, expr, 1,
3525 PCAP_NETMASK_UNKNOWN) < 0) {
3526 warnx("failed to compile \"%s\" on line %zd: %s", expr,
3527 lno, pcap_geterr(pd));
3528 return (EINVAL);
3529 }
3530 }
3531
3532 /* settings to apply on a match. */
3533 if (parse_offload_settings(settings, &r->settings) != 0) {
3534 warnx("failed to parse offload settings \"%s\" on line %zd",
3535 settings, lno);
3536 pcap_freecode(&r->bpf_prog);
3537 return (EINVAL);
3538 }
3539
3540 return (0);
3541
3542 }
3543
3544 /*
3545 * Note that op itself is not dynamically allocated.
3546 */
3547 static void
free_offload_policy(struct t4_offload_policy * op)3548 free_offload_policy(struct t4_offload_policy *op)
3549 {
3550 int i;
3551
3552 for (i = 0; i < op->nrules; i++) {
3553 /*
3554 * pcap_freecode can cope with empty bpf_prog, which is the case
3555 * for an rule that matches on 'any/all/-'.
3556 */
3557 pcap_freecode(&op->rule[i].bpf_prog);
3558 }
3559 free(op->rule);
3560 op->nrules = 0;
3561 op->rule = NULL;
3562 }
3563
3564 #define REALLOC_STRIDE 32
3565
3566 /*
3567 * Fills up op->nrules and op->rule.
3568 */
3569 static int
parse_offload_policy(const char * fname,struct t4_offload_policy * op)3570 parse_offload_policy(const char *fname, struct t4_offload_policy *op)
3571 {
3572 FILE *fp;
3573 char *line;
3574 int lno, maxrules, rc;
3575 size_t lcap, llen;
3576 struct offload_rule *r;
3577 pcap_t *pd;
3578
3579 fp = fopen(fname, "r");
3580 if (fp == NULL) {
3581 warn("Unable to open file \"%s\"", fname);
3582 return (errno);
3583 }
3584 pd = pcap_open_dead(DLT_EN10MB, 128);
3585 if (pd == NULL) {
3586 warnx("Failed to open pcap device");
3587 fclose(fp);
3588 return (EIO);
3589 }
3590
3591 rc = 0;
3592 lno = 0;
3593 lcap = 0;
3594 maxrules = 0;
3595 op->nrules = 0;
3596 op->rule = NULL;
3597 line = NULL;
3598
3599 while ((llen = getline(&line, &lcap, fp)) != -1) {
3600 lno++;
3601
3602 /* Skip empty lines. */
3603 if (isempty_line(line, llen))
3604 continue;
3605
3606 if (op->nrules == maxrules) {
3607 maxrules += REALLOC_STRIDE;
3608 r = realloc(op->rule,
3609 maxrules * sizeof(struct offload_rule));
3610 if (r == NULL) {
3611 warnx("failed to allocate memory for %d rules",
3612 maxrules);
3613 rc = ENOMEM;
3614 goto done;
3615 }
3616 op->rule = r;
3617 }
3618
3619 r = &op->rule[op->nrules];
3620 rc = parse_offload_policy_line(lno, line, llen, pd, r);
3621 if (rc != 0) {
3622 warnx("Error parsing line %d of \"%s\"", lno, fname);
3623 goto done;
3624 }
3625
3626 op->nrules++;
3627 }
3628 free(line);
3629
3630 if (!feof(fp)) {
3631 warn("Error while reading from file \"%s\" at line %d",
3632 fname, lno);
3633 rc = errno;
3634 goto done;
3635 }
3636
3637 if (op->nrules == 0) {
3638 warnx("No valid rules found in \"%s\"", fname);
3639 rc = EINVAL;
3640 }
3641 done:
3642 pcap_close(pd);
3643 fclose(fp);
3644 if (rc != 0) {
3645 free_offload_policy(op);
3646 }
3647
3648 return (rc);
3649 }
3650
3651 static int
load_offload_policy(int argc,const char * argv[])3652 load_offload_policy(int argc, const char *argv[])
3653 {
3654 int rc = 0;
3655 const char *fname = argv[0];
3656 struct t4_offload_policy op = {0};
3657
3658 if (argc != 1) {
3659 warnx("incorrect number of arguments.");
3660 return (EINVAL);
3661 }
3662
3663 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) {
3664 /* op.nrules is 0 and that means clear policy */
3665 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op));
3666 }
3667
3668 rc = parse_offload_policy(fname, &op);
3669 if (rc != 0) {
3670 /* Error message displayed already */
3671 return (EINVAL);
3672 }
3673
3674 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op);
3675 free_offload_policy(&op);
3676
3677 return (rc);
3678 }
3679
3680 static int
display_clip(void)3681 display_clip(void)
3682 {
3683 size_t clip_buf_size = 4096;
3684 char *buf, name[32];
3685 int rc;
3686
3687 buf = malloc(clip_buf_size);
3688 if (buf == NULL) {
3689 warn("%s", __func__);
3690 return (errno);
3691 }
3692
3693 snprintf(name, sizeof(name), "dev.t%unex.%u.misc.clip", g.chip_id, g.inst);
3694 rc = sysctlbyname(name, buf, &clip_buf_size, NULL, 0);
3695 if (rc != 0) {
3696 warn("sysctl %s", name);
3697 free(buf);
3698 return (errno);
3699 }
3700
3701 printf("%s\n", buf);
3702 free(buf);
3703 return (0);
3704 }
3705
3706 static int
clip_cmd(int argc,const char * argv[])3707 clip_cmd(int argc, const char *argv[])
3708 {
3709 int rc, af = AF_INET6, add;
3710 struct t4_clip_addr ca = {0};
3711
3712 if (argc == 1 && !strcmp(argv[0], "list")) {
3713 rc = display_clip();
3714 return (rc);
3715 }
3716
3717 if (argc != 2) {
3718 warnx("incorrect number of arguments.");
3719 return (EINVAL);
3720 }
3721
3722 if (!strcmp(argv[0], "hold")) {
3723 add = 1;
3724 } else if (!strcmp(argv[0], "rel") || !strcmp(argv[0], "release")) {
3725 add = 0;
3726 } else {
3727 warnx("first argument must be \"hold\" or \"release\"");
3728 return (EINVAL);
3729 }
3730
3731 rc = parse_ipaddr(argv[0], argv, &af, &ca.addr[0], &ca.mask[0], 1);
3732 if (rc != 0)
3733 return (rc);
3734
3735 if (add)
3736 rc = doit(CHELSIO_T4_HOLD_CLIP_ADDR, &ca);
3737 else
3738 rc = doit(CHELSIO_T4_RELEASE_CLIP_ADDR, &ca);
3739
3740 return (rc);
3741 }
3742
3743 static int
run_cmd(int argc,const char * argv[])3744 run_cmd(int argc, const char *argv[])
3745 {
3746 int rc = -1;
3747 const char *cmd = argv[0];
3748
3749 /* command */
3750 argc--;
3751 argv++;
3752
3753 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32"))
3754 rc = register_io(argc, argv, 4);
3755 else if (!strcmp(cmd, "reg64"))
3756 rc = register_io(argc, argv, 8);
3757 else if (!strcmp(cmd, "regdump"))
3758 rc = dump_regs(argc, argv);
3759 else if (!strcmp(cmd, "filter"))
3760 rc = filter_cmd(argc, argv, 0);
3761 else if (!strcmp(cmd, "context"))
3762 rc = get_sge_context(argc, argv);
3763 else if (!strcmp(cmd, "loadfw"))
3764 rc = loadfw(argc, argv);
3765 else if (!strcmp(cmd, "memdump"))
3766 rc = memdump(argc, argv);
3767 else if (!strcmp(cmd, "tcb"))
3768 rc = read_tcb(argc, argv);
3769 else if (!strcmp(cmd, "i2c"))
3770 rc = read_i2c(argc, argv);
3771 else if (!strcmp(cmd, "clearstats"))
3772 rc = clearstats(argc, argv);
3773 else if (!strcmp(cmd, "tracer"))
3774 rc = tracer_cmd(argc, argv);
3775 else if (!strcmp(cmd, "modinfo"))
3776 rc = modinfo(argc, argv);
3777 else if (!strcmp(cmd, "sched-class"))
3778 rc = sched_class(argc, argv);
3779 else if (!strcmp(cmd, "sched-queue"))
3780 rc = sched_queue(argc, argv);
3781 else if (!strcmp(cmd, "loadcfg"))
3782 rc = loadcfg(argc, argv);
3783 else if (!strcmp(cmd, "loadboot"))
3784 rc = loadboot(argc, argv);
3785 else if (!strcmp(cmd, "loadboot-cfg"))
3786 rc = loadbootcfg(argc, argv);
3787 else if (!strcmp(cmd, "dumpstate"))
3788 rc = dumpstate(argc, argv);
3789 else if (!strcmp(cmd, "policy"))
3790 rc = load_offload_policy(argc, argv);
3791 else if (!strcmp(cmd, "hashfilter"))
3792 rc = filter_cmd(argc, argv, 1);
3793 else if (!strcmp(cmd, "clip"))
3794 rc = clip_cmd(argc, argv);
3795 else {
3796 rc = EINVAL;
3797 warnx("invalid command \"%s\"", cmd);
3798 }
3799
3800 return (rc);
3801 }
3802
3803 #define MAX_ARGS 15
3804 static int
run_cmd_loop(void)3805 run_cmd_loop(void)
3806 {
3807 int i, rc = 0;
3808 char buffer[128], *buf;
3809 const char *args[MAX_ARGS + 1];
3810
3811 /*
3812 * Simple loop: displays a "> " prompt and processes any input as a
3813 * cxgbetool command. You're supposed to enter only the part after
3814 * "cxgbetool t4nexX". Use "quit" or "exit" to exit.
3815 */
3816 for (;;) {
3817 fprintf(stdout, "> ");
3818 fflush(stdout);
3819 buf = fgets(buffer, sizeof(buffer), stdin);
3820 if (buf == NULL) {
3821 if (ferror(stdin)) {
3822 warn("stdin error");
3823 rc = errno; /* errno from fgets */
3824 }
3825 break;
3826 }
3827
3828 i = 0;
3829 while ((args[i] = strsep(&buf, " \t\n")) != NULL) {
3830 if (args[i][0] != 0 && ++i == MAX_ARGS)
3831 break;
3832 }
3833 args[i] = 0;
3834
3835 if (i == 0)
3836 continue; /* skip empty line */
3837
3838 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit"))
3839 break;
3840
3841 rc = run_cmd(i, args);
3842 }
3843
3844 /* rc normally comes from the last command (not including quit/exit) */
3845 return (rc);
3846 }
3847
3848 #define A_PL_WHOAMI 0x19400
3849 #define A_PL_REV 0x1943c
3850 #define A_PL_VF_WHOAMI 0x200
3851 #define A_PL_VF_REV 0x204
3852
3853 static void
open_nexus_device(const char * s)3854 open_nexus_device(const char *s)
3855 {
3856 const int len = strlen(s);
3857 long long val;
3858 const char *num;
3859 int rc;
3860 u_int chip_id, whoami;
3861 char buf[128];
3862
3863 if (len < 2 || isdigit(s[0]) || !isdigit(s[len - 1]))
3864 errx(1, "invalid nexus name \"%s\"", s);
3865 for (num = s + len - 1; isdigit(*num); num--)
3866 continue;
3867 g.inst = strtoll(num, NULL, 0);
3868 g.nexus = s;
3869 snprintf(buf, sizeof(buf), "/dev/%s", g.nexus);
3870 if ((g.fd = open(buf, O_RDWR)) < 0)
3871 err(1, "open(%s)", buf);
3872
3873 g.warn_on_ioctl_err = false;
3874 rc = read_reg(A_PL_REV, 4, &val);
3875 if (rc == 0) {
3876 /* PF */
3877 g.vf = false;
3878 whoami = A_PL_WHOAMI;
3879 } else {
3880 rc = read_reg(A_PL_VF_REV, 4, &val);
3881 if (rc != 0)
3882 errx(1, "%s is not a Terminator device.", s);
3883 /* VF */
3884 g.vf = true;
3885 whoami = A_PL_VF_WHOAMI;
3886 }
3887 chip_id = (val >> 4) & 0xf;
3888 if (chip_id == 0)
3889 chip_id = 4;
3890 if (chip_id < 4 || chip_id > 7)
3891 warnx("%s reports chip_id %d.", s, chip_id);
3892 g.chip_id = chip_id;
3893
3894 rc = read_reg(whoami, 4, &val);
3895 if (rc != 0)
3896 errx(rc, "failed to read whoami(0x%x): %d", whoami, rc);
3897 g.pf = g.chip_id > 5 ? (val >> 9) & 7 : (val >> 8) & 7;
3898 g.warn_on_ioctl_err = true;
3899 }
3900
3901 int
main(int argc,const char * argv[])3902 main(int argc, const char *argv[])
3903 {
3904 int rc = -1;
3905
3906 g.progname = argv[0];
3907
3908 if (argc == 2) {
3909 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) {
3910 usage(stdout);
3911 exit(0);
3912 }
3913 }
3914
3915 if (argc < 3) {
3916 usage(stderr);
3917 exit(EINVAL);
3918 }
3919
3920 open_nexus_device(argv[1]);
3921
3922 /* progname and nexus */
3923 argc -= 2;
3924 argv += 2;
3925
3926 if (argc == 1 && !strcmp(argv[0], "stdio"))
3927 rc = run_cmd_loop();
3928 else
3929 rc = run_cmd(argc, argv);
3930
3931 return (rc);
3932 }
3933