| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt7986-apmixed.c | 22 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
35 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
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| H A D | clk-mt7981-apmixed.c | 24 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
37 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
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| H A D | clk-mt8188-apmixedsys.c | 32 _rst_bar_mask, _pcwbits, _pd_reg, _pd_shift, \ argument
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| H A D | clk-mt6735-apmixedsys.c | 49 _tuner_en_bit, _pcw_reg, _pcwbits, _flags) { \ argument
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| H A D | clk-mt6765.c | 670 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
694 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| H A D | clk-mt8195-apmixedsys.c | 33 _rst_bar_mask, _pcwbits, _pd_reg, _pd_shift, \ argument
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| H A D | clk-mt2701.c | 920 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
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| H A D | clk-mt8196-vlpckgen.c | 145 _pcw_reg, _pcw_shift, _pcwbits, \ argument
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