| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PreLegalizerCombiner.cpp | 422 auto ExtOpc = ExtMI->getOpcode(); in matchExtUaddvToUaddlv() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1611 unsigned ExtOpc = MI.getOpcode(); in replaceInstrExact() local
1729 unsigned ExtOpc = MI.getOpcode(); in replaceInstrExpr() local
|
| H A D | HexagonBitSimplify.cpp | 2543 unsigned ExtOpc = 0; in simplifyExtractLow() local
|
| H A D | HexagonISelLoweringHVX.cpp | 1586 return DAG.getNode(ExtOpc, dl, ResTy, VecV); in resizeToWidth() local
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 547 MachineInstrBuilder MachineIRBuilder::buildExtOrTrunc(unsigned ExtOpc, in buildExtOrTrunc()
|
| H A D | LegalizerHelper.cpp | 2460 unsigned ExtOpc = MI.getOpcode() == TargetOpcode::G_CTTZ || in widenScalar() local
2754 unsigned ExtOpc = LI.getExtOpcodeForWideningConstant( in widenScalar() local
|
| H A D | CombinerHelper.cpp | 686 static unsigned getExtLoadOpcForExtend(unsigned ExtOpc) { in getExtLoadOpcForExtend()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4322 unsigned ExtOpc = in lowerScalarSplat() local
4389 unsigned ExtOpc = in lowerScalarInsert() local
8802 unsigned ExtOpc = in lowerVectorIntrinsicScalars() local
9039 unsigned ExtOpc = in promoteVCIXScalar() local
12163 unsigned ExtOpc = ISD::ANY_EXTEND) { in customLegalizeToWOp()
12454 unsigned ExtOpc = ISD::ANY_EXTEND; in ReplaceNodeResults() local
14330 unsigned ExtOpc = getExtOpc(*SupportsExt); in getOrCreateExtendedOp() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 3128 unsigned ExtOpc = in getCastInstrCost() local
|
| H A D | X86ISelLowering.cpp | 20212 static SDValue SplitAndExtendv16i1(unsigned ExtOpc, MVT VT, SDValue In, in SplitAndExtendv16i1()
24469 unsigned ExtOpc = in LowerEXTEND_VECTOR_INREG() local
28443 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerABD() local
29691 unsigned ExtOpc = Opc == ISD::SRA ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerShift() local
32611 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in ReplaceNodeResults() local
48080 unsigned ExtOpc = LHS.getOpcode(); in combineShiftToPMULH() local
48572 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in combineVectorPack() local
58667 ISD::NodeType ExtOpc = IsBool ? getExtendForContent(BCont) in LowerAsmOperandForConstraint() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 3540 Instruction::CastOps ExtOpc = Instruction::CastOps::CastOpsEnd; in visitCallInst() local
|
| H A D | InstCombineCompares.cpp | 7548 unsigned ExtOpc = ExtI->getOpcode(); in visitICmpInst() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1899 unsigned ExtOpc, in extendLow32IntoHigh32()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 1454 unsigned ExtOpc = in PromoteOperand() local
7061 unsigned ExtOpc = N0.getOpcode(); in visitAND() local
12951 unsigned ExtOpc, in ExtendUsesToFormExtLoad()
13288 ISD::NodeType ExtOpc, in tryToFoldExtOfLoad()
13348 ISD::LoadExtType ExtLoadType, ISD::NodeType ExtOpc) { in tryToFoldExtOfMaskedLoad()
|
| H A D | TargetLowering.cpp | 5571 ISD::NodeType ExtOpc = in LowerAsmOperandForConstraint() local
9311 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in expandAVG() local
|
| H A D | LegalizeIntegerTypes.cpp | 5869 unsigned ExtOpc = ISD::ANY_EXTEND; in PromoteIntRes_BUILD_VECTOR() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 2648 unsigned ExtOpc = ISD::ANY_EXTEND) { in customLegalizeToWOp()
|