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Searched refs:msr (Results 1 – 25 of 45) sorted by relevance

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/illumos-gate/usr/src/test/bhyve-tests/tests/kdev/
H A Dpayload_vlapic_msr_access.c111 for (uint32_t msr = MSR_X2APIC_BASE; msr <= MSR_X2APIC_MAX; msr++) { in start() local
114 if (reg_readable(msr)) { in start()
115 val = rdmsr(msr); in start()
118 if (reg_writable(msr)) { in start()
119 if (msr == 0x828) { in start()
126 wrmsr(msr, val); in start()
/illumos-gate/usr/src/cmd/bhyve/
H A Duart_emul.c135 uint8_t msr; /* Modem status register (R/W) */ member
353 uint8_t msr; in modem_status() local
360 msr = 0; in modem_status()
362 msr |= MSR_CTS; in modem_status()
364 msr |= MSR_DSR; in modem_status()
366 msr |= MSR_RI; in modem_status()
368 msr |= MSR_DCD; in modem_status()
374 msr = MSR_DCD | MSR_DSR; in modem_status()
376 assert((msr & MSR_DELTA_MASK) == 0); in modem_status()
378 return (msr); in modem_status()
[all …]
/illumos-gate/usr/src/uts/intel/os/
H A Dhma.c403 uint64_t msr; in hma_vmx_query_details() local
406 msr = rdmsr(MSR_IA32_VMX_BASIC); in hma_vmx_query_details()
407 if ((msr & IA32_VMX_BASIC_INS_OUTS) == 0) { in hma_vmx_query_details()
412 hma_vmx_revision = (uint32_t)msr; in hma_vmx_query_details()
418 query_true_ctl = (msr & IA32_VMX_BASIC_TRUE_CTRLS) != 0; in hma_vmx_query_details()
421 msr = rdmsr(query_true_ctl ? in hma_vmx_query_details()
423 if (VMX_CTL_ONE_SETTING(msr, IA32_VMX_PROCBASED_2ND_CTLS)) { in hma_vmx_query_details()
424 msr = rdmsr(MSR_IA32_VMX_PROCBASED2_CTLS); in hma_vmx_query_details()
425 if (VMX_CTL_ONE_SETTING(msr, IA32_VMX_PROCBASED2_EPT)) { in hma_vmx_query_details()
428 if (VMX_CTL_ONE_SETTING(msr, IA32_VMX_PROCBASED2_VPID)) { in hma_vmx_query_details()
[all …]
/illumos-gate/usr/src/uts/i86pc/io/apix/
H A Dapix_regops.c46 static uint64_t local_x2apic_read(uint32_t msr);
47 static void local_x2apic_write(uint32_t msr, uint64_t value);
80 local_x2apic_read(uint32_t msr) in local_x2apic_read() argument
84 i = (uint64_t)(rdmsr(REG_X2APIC_BASE_MSR + (msr >> 2)) & 0xffffffff); in local_x2apic_read()
89 local_x2apic_write(uint32_t msr, uint64_t value) in local_x2apic_write() argument
93 if (msr != APIC_EOI_REG) { in local_x2apic_write()
94 tmp = rdmsr(REG_X2APIC_BASE_MSR + (msr >> 2)); in local_x2apic_write()
100 wrmsr((REG_X2APIC_BASE_MSR + (msr >> 2)), tmp); in local_x2apic_write()
/illumos-gate/usr/src/test/bhyve-tests/tests/vmm/
H A Ddatarw_msrs.c129 uint32_t msr; in main() member
132 { .msr = MSR_AMD_EFER, .name = "EFER" }, in main()
133 { .msr = REG_TSC, .name = "TSC" }, in main()
134 { .msr = MSR_AMD_CSTAR, .name = "CSTAR" }, in main()
135 { .msr = MSR_AMD_KGSBASE, .name = "KGSBASE" }, in main()
139 if (spot_check[j].msr == entries[i].vfe_ident) { in main()
148 spot_check[j].name, spot_check[j].msr); in main()
/illumos-gate/usr/src/uts/i86pc/os/
H A Dcmi_hw.c307 #define CMI_MSRI_HASHIDX(hdl, msr) \ argument
308 ((((uintptr_t)(hdl) >> 3) + (msr)) % (CMI_MSRI_HASHSZ - 1))
329 msri_addent(cmi_hdl_impl_t *hdl, uint_t msr, uint64_t val) in msri_addent() argument
331 int idx = CMI_MSRI_HASHIDX(hdl, msr); in msri_addent()
338 if (CMI_MSRI_MATCH(hep, hdl, msr)) in msri_addent()
347 hep->msrie_msrnum = msr; in msri_addent()
365 msri_lookup(cmi_hdl_impl_t *hdl, uint_t msr, uint64_t *valp) in msri_lookup() argument
367 int idx = CMI_MSRI_HASHIDX(hdl, msr); in msri_lookup()
383 if (CMI_MSRI_MATCH(hep, hdl, msr)) { in msri_lookup()
398 msri_rment(cmi_hdl_impl_t *hdl, uint_t msr) in msri_rment() argument
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H A Dmp_startup.c704 msr_warning(cpu_t *cp, const char *rw, uint_t msr, int error) in msr_warning() argument
707 cp->cpu_id, rw, msr, error); in msr_warning()
924 const uint_t msr = MSR_AMD_PATCHLEVEL; in workaround_errata() local
927 if ((err = checked_rdmsr(msr, &value)) != 0) { in workaround_errata()
928 msr_warning(cpu, "rd", msr, err); in workaround_errata()
985 const uint_t msr = MSR_AMD_HWCR; in workaround_errata() local
1004 if ((error = checked_rdmsr(msr, &value)) != 0) { in workaround_errata()
1005 msr_warning(cpu, "rd", msr, error); in workaround_errata()
1010 if ((error = checked_wrmsr(msr, value)) != 0) { in workaround_errata()
1011 msr_warning(cpu, "wr", msr, error); in workaround_errata()
[all …]
H A Dmachdep.c1171 checked_rdmsr(uint_t msr, uint64_t *value) in checked_rdmsr() argument
1175 *value = rdmsr(msr); in checked_rdmsr()
1184 checked_wrmsr(uint_t msr, uint64_t value) in checked_wrmsr() argument
1188 wrmsr(msr, value); in checked_wrmsr()
/illumos-gate/usr/src/uts/intel/io/vmm/intel/
H A Dvmx_msr.h64 #define guest_msr_rw(vmx, vcpuid, msr) \ argument
65 vmx_msr_bitmap_change_access((vmx), (vcpuid), (msr), MSR_BITMAP_ACCESS_RW)
67 #define guest_msr_ro(vmx, vcpuid, msr) \ argument
68 vmx_msr_bitmap_change_access((vmx), (vcpuid), (msr), MSR_BITMAP_ACCESS_READ)
H A Dvmx_msr.c163 vmx_msr_bitmap_change_access(struct vmx *vmx, int vcpuid, uint_t msr, int acc) in vmx_msr_bitmap_change_access() argument
168 if (msr <= 0x00001FFF) { in vmx_msr_bitmap_change_access()
169 byte = msr / 8; in vmx_msr_bitmap_change_access()
170 } else if (msr >= 0xC0000000 && msr <= 0xC0001FFF) { in vmx_msr_bitmap_change_access()
171 byte = 1024 + (msr - 0xC0000000) / 8; in vmx_msr_bitmap_change_access()
173 panic("Invalid MSR for bitmap: %x", msr); in vmx_msr_bitmap_change_access()
176 bit = msr & 0x7; in vmx_msr_bitmap_change_access()
H A Dvmcs.c166 vmcs_msr_encoding(uint32_t msr) in vmcs_msr_encoding() argument
168 switch (msr) { in vmcs_msr_encoding()
/illumos-gate/usr/src/test/bhyve-tests/tests/inst_emul/
H A Dwrmsr.c68 if (vexit.u.msr.code != expected_code) { in main()
70 vexit.u.msr.code, expected_code); in main()
72 if (vexit.u.msr.wval != expected_wval) { in main()
74 vexit.u.msr.wval, expected_wval); in main()
H A Drdmsr.c67 if (vexit.u.msr.code != expected_code) { in main()
69 vexit.u.msr.code, expected_code); in main()
/illumos-gate/usr/src/uts/common/io/axf/
H A Daxf_usbgem.c259 uint16_t msr; member
432 lp->msr = MSR_TXABT; in axf_init_chip()
434 lp->msr = 0; in axf_init_chip()
437 lp->msr = MSR_RE | MSR_TXABT; in axf_init_chip()
440 dp->name, __func__, lp->msr, MSR_BITS)); in axf_init_chip()
608 uint16_t msr; in axf_set_media() local
616 msr = lp->msr; in axf_set_media()
624 msr &= ~(MSR_PS | MSR_GM | MSR_ENCK); in axf_set_media()
628 msr |= MSR_GM | MSR_ENCK; in axf_set_media()
632 msr |= MSR_PS; in axf_set_media()
[all …]
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dcpu.h193 #define rdmsr(msr,val1,val2) \ argument
196 : "c" (msr))
198 #define wrmsr(msr,val1,val2) \ argument
201 : "c" (msr), "a" (val1), "d" (val2))
/illumos-gate/usr/src/boot/sys/amd64/include/
H A Dcpufunc.h352 rdmsr(u_int msr) in rdmsr() argument
356 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr)); in rdmsr()
361 rdmsr32(u_int msr) in rdmsr32() argument
365 __asm __volatile("rdmsr" : "=a" (low) : "c" (msr) : "rdx"); in rdmsr32()
409 wrmsr(u_int msr, uint64_t newval) in wrmsr() argument
415 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr)); in wrmsr()
853 uint64_t rdmsr(u_int msr);
854 uint32_t rdmsr32(u_int msr);
868 void wrmsr(u_int msr, uint64_t newval);
875 int rdmsr_safe(u_int msr, uint64_t *val);
[all …]
/illumos-gate/usr/src/boot/sys/i386/include/
H A Dcpufunc.h330 rdmsr(u_int msr) in rdmsr() argument
334 __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr)); in rdmsr()
339 rdmsr32(u_int msr) in rdmsr32() argument
343 __asm __volatile("rdmsr" : "=a" (low) : "c" (msr) : "edx"); in rdmsr32()
387 wrmsr(u_int msr, uint64_t newval) in wrmsr() argument
389 __asm __volatile("wrmsr" : : "A" (newval), "c" (msr)); in wrmsr()
766 uint64_t rdmsr(u_int msr);
788 void wrmsr(u_int msr, uint64_t newval);
795 int rdmsr_safe(u_int msr, uint64_t *val);
796 int wrmsr_safe(u_int msr, uint64_t newval);
/illumos-gate/usr/src/uts/intel/io/vmm/amd/
H A Dsvm.c196 svm_msr_index(uint64_t msr, int *index, int *bit) in svm_msr_index() argument
201 *bit = (msr % 4) * 2; in svm_msr_index()
204 if (msr <= MSR_PENTIUM_END) { in svm_msr_index()
205 *index = msr / 4; in svm_msr_index()
210 if (msr >= MSR_AMD6TH_START && msr <= MSR_AMD6TH_END) { in svm_msr_index()
211 off = (msr - MSR_AMD6TH_START); in svm_msr_index()
217 if (msr >= MSR_AMD7TH_START && msr <= MSR_AMD7TH_END) { in svm_msr_index()
218 off = (msr - MSR_AMD7TH_START); in svm_msr_index()
230 svm_msr_perm(uint8_t *perm_bitmap, uint64_t msr, bool read, bool write) in svm_msr_perm() argument
234 error = svm_msr_index(msr, &index, &bit); in svm_msr_perm()
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H A Dvmcb.c154 vmcb_msr_ptr(struct vmcb *vmcb, uint32_t msr, uint32_t *dirtyp) in vmcb_msr_ptr() argument
160 switch (msr) { in vmcb_msr_ptr()
/illumos-gate/usr/src/compat/bhyve/amd64/machine/
H A Dcpufunc.h119 rdmsr(u_int msr) in rdmsr() argument
123 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr)); in rdmsr()
128 wrmsr(u_int msr, uint64_t newval) in wrmsr() argument
134 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr)); in wrmsr()
/illumos-gate/usr/src/uts/intel/io/vmm/
H A Dvmm_lapic.h47 int lapic_rdmsr(struct vm *vm, int cpu, uint_t msr, uint64_t *rval);
48 int lapic_wrmsr(struct vm *vm, int cpu, uint_t msr, uint64_t wval);
/illumos-gate/usr/src/uts/intel/io/vmm/io/
H A Dvlapic.c1597 vlapic_msr_to_regoff(uint32_t msr) in vlapic_msr_to_regoff() argument
1599 ASSERT3U(msr, >=, MSR_APIC_000); in vlapic_msr_to_regoff()
1600 ASSERT3U(msr, <, (MSR_APIC_000 + 0x100)); in vlapic_msr_to_regoff()
1602 return ((msr - MSR_APIC_000) << 4); in vlapic_msr_to_regoff()
1606 vlapic_owned_msr(uint32_t msr) in vlapic_owned_msr() argument
1608 if (msr == MSR_APICBASE) { in vlapic_owned_msr()
1611 if (msr >= MSR_APIC_000 && in vlapic_owned_msr()
1612 msr < (MSR_APIC_000 + 0x100)) { in vlapic_owned_msr()
1619 vlapic_rdmsr(struct vlapic *vlapic, uint32_t msr, uint64_t *valp) in vlapic_rdmsr() argument
1621 ASSERT(vlapic_owned_msr(msr)); in vlapic_rdmsr()
[all …]
/illumos-gate/usr/src/uts/intel/io/coretemp/
H A Dcoretemp.c109 uint_t msr = (uint_t)arg1; in coretemp_rdmsr_xc() local
116 if (checked_rdmsr(msr, valp) == 0) { in coretemp_rdmsr_xc()
135 coretemp_rdmsr(coretemp_t *ct, cmi_hdl_t hdl, uint_t msr, uint64_t *valp) in coretemp_rdmsr() argument
143 (void) coretemp_rdmsr_xc((xc_arg_t)msr, (xc_arg_t)valp, in coretemp_rdmsr()
147 xc_call((xc_arg_t)msr, (xc_arg_t)valp, (xc_arg_t)&ret, in coretemp_rdmsr()
/illumos-gate/usr/src/uts/sun4/io/
H A Dsu_driver.c131 static void asy_ppsevent(struct asycom *asy, int msr);
1916 asy_ppsevent(struct asycom *asy, int msr) in asy_ppsevent() argument
1920 if ((msr & DCD) == 0) in asy_ppsevent()
1926 } else if (msr & DCD) { in asy_ppsevent()
1979 int msr; in async_msint() local
1981 msr = INB(MSR); /* this resets the interrupt */ in async_msint()
1982 asy->asy_cached_msr = msr; in async_msint()
1987 (msr & DCTS) ? "CTS" : " ", in async_msint()
1988 (msr & DDSR) ? "DSR" : " ", in async_msint()
1989 (msr & DRI) ? "RI " : " ", in async_msint()
[all …]
/illumos-gate/usr/src/uts/intel/pcbe/
H A Dcore_pcbe.c174 #define WRMSR(msr, value) \ argument
175 wrmsr((msr), (value)); \
176 DTRACE_PROBE2(wrmsr, uint64_t, (msr), uint64_t, (value));
178 #define RDMSR(msr, value) \ argument
179 (value) = rdmsr((msr)); \
180 DTRACE_PROBE2(rdmsr, uint64_t, (msr), uint64_t, (value));

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