| /titanic_51/usr/src/uts/common/io/nxge/ |
| H A D | nxge_intr.c | 80 int vector; in nxge_intr_add() local
87 if ((vector = nxge_intr_vec_find(nxge, type, channel)) == -1) { in nxge_intr_add()
89 "nxge_intr_add(%cDC %d): vector not found", c, channel)); in nxge_intr_add()
93 ldvp = &nxge->ldgvp->ldvp[vector]; in nxge_intr_add()
106 if ((status2 = ddi_intr_add_handler(interrupts->htable[vector], in nxge_intr_add()
111 c, channel, vector, nxge_ddi_perror(status2))); in nxge_intr_add()
118 if ((status2 = ddi_intr_enable(interrupts->htable[vector])) in nxge_intr_add()
122 c, channel, vector, nxge_ddi_perror(status2))); in nxge_intr_add()
169 int vector; in nxge_intr_remove() local
176 if ((vector in nxge_intr_remove()
254 int first, limit, vector; nxge_intr_vec_find() local
326 int vector; /* A shorthand variable */ nxge_hio_intr_add() local
426 int vector; /* A shorthand variable */ nxge_hio_intr_remove() local
[all...] |
| /titanic_51/usr/src/uts/i86pc/io/pcplusmp/ |
| H A D | apic_regops.c | 214 uchar_t vector; in apic_send_directed_EOI() local
232 vector = apic_irq->airq_vector; in apic_send_directed_EOI()
233 ioapic_write_eoi(ioapicindex, vector); in apic_send_directed_EOI()
362 int vector; in x2apic_send_ipi() local
381 vector = apic_resv_vector[ipl]; in x2apic_send_ipi()
402 X2APIC_WRITE(X2APIC_SELF_IPI, vector); in x2apic_send_ipi()
405 apic_cpus[cpun].aci_local_id, vector); in x2apic_send_ipi()
423 int vector; in apic_common_send_ipi() local
434 vector = apic_resv_vector[ipl]; in apic_common_send_ipi()
435 ASSERT((vector > in apic_common_send_ipi()
[all...] |
| H A D | apic.c | 104 static int apic_addspl(int ipl, int vector, int min_ipl, int max_ipl);
105 static int apic_delspl(int ipl, int vector, int min_ipl, int max_ipl);
112 * The following vector assignments influence the value of ipltopri and
116 * will share the vector ranges and heavily used IPLs (5 and 6) have
138 * The ipl of an ISR at vector X is apic_vectortoipl[X>>4]
139 * NOTE that this is vector as passed into intr_enter which is
140 * programmed vector - 0x20 (APIC_BASE_VECT)
147 * Correlation of the hardware vector to the IPL in use, initialized
288 /* get to highest vector at the same ipl */ in apic_init()
345 * Presence of an invalid vector wit in apic_init_intr()
546 uchar_t vector; apic_intr_enter() local
797 uchar_t vector; apic_get_ipivect() local
1192 uchar_t vector, irqno; apic_alloc_msix_vectors() local
1271 apic_free_vector(uchar_t vector) apic_free_vector() argument
1320 apic_modify_vector(uchar_t vector,int irq) apic_modify_vector() argument
[all...] |
| H A D | apic_introp.c | 58 apic_pci_msi_enable_vector(apic_irq_t *irq_ptr, int type, int inum, int vector, in apic_pci_msi_enable_vector() argument
71 "\tdriver = %s, inum=0x%x vector=0x%x apicid=0x%x\n", (void *)dip, in apic_pci_msi_enable_vector()
72 ddi_driver_name(dip), inum, vector, target_apic_id)); in apic_pci_msi_enable_vector()
76 msi_regs.mr_data = vector; in apic_pci_msi_enable_vector()
80 irqno = apic_vector_to_irq[vector + i]; in apic_pci_msi_enable_vector()
86 irqno = apic_vector_to_irq[vector + i]; in apic_pci_msi_enable_vector()
113 * Only set vector if not on hypervisor in apic_pci_msi_enable_vector()
209 * starting vector in apic_find_multi_vectors()
218 * starting vector has to be aligned accordingly for in apic_find_multi_vectors()
513 uint32_t vector; in apic_grp_set_cpu() local
[all...] |
| /titanic_51/usr/src/lib/sun_fc/common/ |
| H A D | FCSyseventBridge.cc | 118 typedef vector<AdapterAddEventListener *>::iterator Iter; in removeListener()
137 typedef vector<AdapterEventListener *>::iterator Iter; in removeListener()
156 typedef vector<AdapterPortEventListener *>::iterator Iter; in removeListener()
175 typedef vector<AdapterDeviceEventListener *>::iterator Iter; in removeListener()
194 typedef vector<TargetEventListener *>::iterator Iter; in removeListener()
273 typedef vector<AdapterPortEventListener *>::iterator Iter; in dispatch()
296 typedef vector<AdapterPortEventListener *>::iterator Iter; in dispatch()
315 typedef vector<AdapterDeviceEventListener *>::iterator Iter; in dispatch()
334 typedef vector<AdapterDeviceEventListener *>::iterator Iter; in dispatch()
376 typedef vector<AdapterPortEventListene in dispatch()
[all...] |
| H A D | FCSyseventBridge.h | 37 #include <vector>
87 std::vector<AdapterAddEventListener*> adapterAddEventListeners;
88 std::vector<AdapterEventListener*> adapterEventListeners;
89 std::vector<AdapterPortEventListener*> adapterPortEventListeners;
90 std::vector<AdapterDeviceEventListener*> adapterDeviceEventListeners;
91 std::vector<TargetEventListener*> targetEventListeners;
|
| H A D | Trace.cc | 44 vector<vector<Trace *> > Trace::stacks;
49 vector<string> Trace::indent;
167 for (vector<Trace *>::size_type i = stacks[tid].size() - 1; ; i--) { in stackTrace()
|
| H A D | Trace.h | 33 #include <vector>
109 static std::vector<std::vector<Trace *> > stacks;
110 static std::vector<std::string> indent;
|
| H A D | HBAList.h | 34 #include <vector>
75 std::vector<HBA*> hbas;
76 std::vector<HBA*> tgthbas;
|
| H A D | Listener.cc | 42 vector<Listener*> Listener::listeners;
47 typedef vector<Listener *>::iterator ListenerIterator;
|
| /titanic_51/usr/src/cmd/sgs/rtld/sparc/ |
| H A D | boot.s | 35 * vector at "_rt_boot" used to discriminate between the two.
48 * ! vector !
104 ! Entry vector
123 ! boot attribute value vector. Otherwise, it's already been done and we can
135 ! skip construction of the ELF boot attribute vector.
141 ! %fp points to the root of our ELF bootstrap vector, use it to construct
142 ! the vector and send it to _setup.
147 add %fp, 68, %l0 ! argument vector is at %fp+68
153 st %l0, [%o0 + 12] ! store it in the vector
156 set EB_AUXV, %l1 ! get code for auxiliary vector
[all...] |
| /titanic_51/usr/src/uts/i86pc/io/apix/ |
| H A D | apix_intr.c | 75 * Insert an vector into the tail of the interrupt pending list
94 * Remove and return an vector from the head of hardware interrupt
134 apix_add_pending_hardint(int vector) in apix_add_pending_hardint() argument
138 apix_vector_t *vecp = apixp->x_vectbl[vector]; in apix_add_pending_hardint()
143 * The MSI interrupt not supporting per-vector masking could in apix_add_pending_hardint()
144 * be triggered on a false vector as a result of rebinding in apix_add_pending_hardint()
149 APIX_DO_FAKE_INTR(cpuid, vector); in apix_add_pending_hardint()
173 prevp->av_flags |= (vector & AV_PENTRY_VECTMASK); in apix_add_pending_hardint()
195 uchar_t vector = av->av_flags & AV_PENTRY_VECTMASK; in apix_dispatch_pending_autovect() local
215 if (vector) { in apix_dispatch_pending_autovect()
814 apix_post_hardint(int vector) apix_post_hardint() argument
825 apix_dispatch_by_vector(uint_t vector) apix_dispatch_by_vector() argument
859 apix_dispatch_hilevel(uint_t vector,uint_t arg2) apix_dispatch_hilevel() argument
867 apix_dispatch_lowlevel(uint_t vector,uint_t oldipl) apix_dispatch_lowlevel() argument
887 int vector = rp->r_trapno, newipl, oldipl = cpu->cpu_pri, ret; apix_do_interrupt() local
[all...] |
| H A D | apix_utils.c | 88 * Return vector number or 0 on error
94 uchar_t vector; in apix_alloc_ipi() local
100 vector = apix_get_avail_vector_oncpu(0, APIX_IPI_MIN, APIX_IPI_MAX); in apix_alloc_ipi()
101 if (vector == 0) { in apix_alloc_ipi()
110 vecp = xv_vector(cpun, vector); in apix_alloc_ipi()
117 xv_vector(cpun, vector) = vecp; in apix_alloc_ipi()
122 vecp->v_vector = vector; in apix_alloc_ipi()
126 return (vector); in apix_alloc_ipi()
130 apix_cleanup_vector(xv_vector(cpun, vector)); in apix_alloc_ipi()
139 apix_add_ipi(int ipl, avfunc xxintr, char *name, int vector, in apix_add_ipi() argument
192 int vector; apix_alloc_vector_oncpu() local
301 apix_pci_msi_enable_vector(apix_vector_t * vecp,dev_info_t * dip,int type,int inum,int count,uchar_t vector,int target_apic_id) apix_pci_msi_enable_vector() argument
692 apix_init_vector(processorid_t cpuid,uchar_t vector) apix_init_vector() argument
[all...] |
| H A D | apix.c | 199 * apix_lock is used for cpu selection and vector re-binding
204 * Mapping between device interrupt and the allocated vector. Indexed
453 * Presence of an invalid vector with delivery mode AV_FIXED can in apix_init_intr()
455 * write a valid vector to LVT entries along with the mask bit in apix_init_intr()
577 * On UniSys Model 6520, the BIOS leaves vector 0x20 isr in apix_picinit()
579 * uses vector 0x20 to interrupt itself, so softint will in apix_picinit()
653 uchar_t vector; in apix_intr_enter() local
658 * The real vector delivered is (*vectorp + 0x20), but our caller in apix_intr_enter()
659 * subtracts 0x20 from the vector before passing it to us. in apix_intr_enter()
662 vector in apix_intr_enter()
784 uchar_t vector = (uchar_t)APIX_VIRTVEC_VECTOR(virtvec); apix_addspl() local
817 uchar_t vector = (uchar_t)APIX_VIRTVEC_VECTOR(virtvec); apix_delspl() local
975 uchar_t vector; apix_get_ipivect() local
989 int vector; apix_get_clkvect() local
1748 apix_intx_set_vector(int irqno,uint32_t cpuid,uchar_t vector) apix_intx_set_vector() argument
1765 uchar_t vector; apix_intx_get_vector() local
1879 apix_intx_rebind(int irqno,processorid_t cpuid,uchar_t vector) apix_intx_rebind() argument
[all...] |
| /titanic_51/usr/src/uts/common/io/hxge/ |
| H A D | hpi_vir.c | 83 hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector, in hpi_ldsv_get() argument
94 switch (vector) { in hpi_ldsv_get()
105 " hpi_ldsv_get Invalid Input: ldsv type <0x%x>", vector)); in hpi_ldsv_get()
106 return (HPI_FAILURE | HPI_VIR_LDSV_INVALID(vector)); in hpi_ldsv_get()
216 if (!SID_VECTOR_VALID(sid.vector)) { in hpi_fzc_sid_set()
218 " hpi_fzc_sid_set Invalid Input: vector <0x%x>", in hpi_fzc_sid_set()
219 sid.vector)); in hpi_fzc_sid_set()
221 return (HPI_FAILURE | HPI_VIR_SID_VEC_INVALID(sid.vector)); in hpi_fzc_sid_set()
225 sd.bits.data = sid.vector; in hpi_fzc_sid_set()
|
| /titanic_51/usr/src/uts/common/io/i40e/ |
| H A D | i40e_intr.c | 61 * interrupts is always bound to MSI-X vector zero. Next, we spread out all of
74 * maintain a linked list of queues for each interrupt vector. While it may seem
76 * first queue must be programmed in I40E_QINT_LNKLSTN(%vector) register. Each
80 * Finally, the individual interrupt vector itself has the ability to be enabled
234 * on the given vector. Only vectors 1..N are programmed by these
235 * functions; vector 0 is special and handled by a different register.
236 * We must subtract one from the vector because i40e implicitly adds
237 * one to the vector value. See section 10.2.2.10.13 for more details.
240 i40e_intr_io_enable(i40e_t *i40e, int vector) in i40e_intr_io_enable() argument
245 ASSERT3S(vector, >, in i40e_intr_io_enable()
253 i40e_intr_io_disable(i40e_t * i40e,int vector) i40e_intr_io_disable() argument
385 i40e_set_lnklstn(i40e_t * i40e,uint_t vector,uint_t queue) i40e_set_lnklstn() argument
404 i40e_set_rqctl(i40e_t * i40e,uint_t vector,uint_t queue) i40e_set_rqctl() argument
426 i40e_set_tqctl(i40e_t * i40e,uint_t vector,uint_t queue,uint_t next_queue) i40e_set_tqctl() argument
[all...] |
| /titanic_51/usr/src/uts/i86xpv/io/psm/ |
| H A D | xpv_psm.c | 525 xen_psm_intr_enter(int ipl, int *vector) in xen_psm_intr_enter() argument
531 intno = (*vector); in xen_psm_intr_enter()
543 * vector. We will treat this as a spurious interrupt. in xen_psm_intr_enter()
554 * service a vector that was shared with a higher priority in xen_psm_intr_enter()
577 xen_psm_intr_exit(int ipl, int vector) in xen_psm_intr_exit() argument
579 ec_try_unmask_irq(vector); in xen_psm_intr_exit()
942 * Allocate a free vector for irq at ipl.
949 uchar_t vector; in apic_allocate_vector() local
956 panic("Hypervisor alloc vector failed err: %d", -rc); in apic_allocate_vector()
957 vector in apic_allocate_vector()
969 apic_free_vector(uchar_t vector) apic_free_vector() argument
1110 uchar_t vector; xpv_psm_get_msi_vector() local
1179 uchar_t vector, cpu; apic_alloc_msi_vectors() local
1346 uchar_t vector; apic_alloc_msix_vectors() local
1627 apic_modify_vector(uchar_t vector,int irq) apic_modify_vector() argument
[all...] |
| H A D | mp_platform_xpv.c | 115 * is indexed by IRQ number, NOT by vector number.
197 * Initialise vector->ipl and ipl->pri arrays. level_intr and irqtable
198 * are also set to NULL. vector->irq is set to a value which cannot map
210 * corresponding vector. On some systems, due to hardware errata in apic_init_common()
307 * Add mask bits to disable interrupt vector from happening
325 uchar_t vector; in apic_addspl_common() local
340 "vector=0x%x\n", (void *)irqptr->airq_dip, in apic_addspl_common()
369 * Upgrade vector if max_ipl is not earlier ipl. If we cannot allocate, in apic_addspl_common()
375 vector = apic_allocate_vector(max_ipl, irqindex, 1); in apic_addspl_common()
376 if (vector in apic_addspl_common()
456 uchar_t vector; apic_delspl_common() local
1010 uchar_t ipin, ioapic, ioapicindex, vector; apic_setup_irq_table() local
1348 apic_xlate_vector(uchar_t vector) apic_xlate_vector() argument
[all...] |
| /titanic_51/usr/src/uts/common/io/nxge/npi/ |
| H A D | npi_vir.c | 950 * vector - vector type (0, 1 or 2)
959 npi_ldsv_get(npi_handle_t handle, uint8_t ldg, ldsv_type_t vector, in npi_ldsv_get() argument
973 switch (vector) { in npi_ldsv_get()
990 " ldsv type <0x%x>", vector)); in npi_ldsv_get()
991 return (NPI_FAILURE | NPI_VIR_LDSV_INVALID(vector)); in npi_ldsv_get()
1007 * vector - vector type (0, 1 or 2)
1017 ldsv_type_t vector, ldf_type_t ldf_type, boolean_t *flag_p) in npi_ldsv_ld_get() argument
1031 ((vector ! in npi_ldsv_ld_get()
1096 ldsv_type_t vector; npi_ldsv_ld_ldf0_get() local
1123 ldsv_type_t vector; npi_ldsv_ld_ldf1_get() local
[all...] |
| /titanic_51/usr/src/uts/common/io/igb/ |
| H A D | igb_main.c | 4213 * For MSI interrupt, we have only one vector, in igb_intr_msi()
4250 * Only used via MSI-X vector so don't check cause bits in igb_intr_rx()
4269 * Only used via MSI-X vector so don't check cause bits in igb_intr_tx()
4542 * Get priority for first vector, assume remaining are all the same in igb_alloc_intr_handles()
4579 int vector; in igb_add_intr_handlers() local
4583 vector = 0; in igb_add_intr_handlers()
4589 rc = ddi_intr_add_handler(igb->htable[vector], in igb_add_intr_handlers()
4598 tx_ring->intr_vector = vector; in igb_add_intr_handlers()
4599 vector++; in igb_add_intr_handlers()
4605 rc = ddi_intr_add_handler(igb->htable[vector], in igb_add_intr_handlers()
4705 int i, vector; igb_setup_msix_82575() local
4772 uint32_t ivar, index, vector; igb_setup_msix_82576() local
4863 uint32_t ivar, index, vector; igb_setup_msix_82580() local
[all...] |
| /titanic_51/usr/src/uts/common/io/ixgbe/core/ |
| H A D | ixgbe_vf.c | 285 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
290 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
291 * incoming rx multicast addresses, to determine the bit-vector to check in
298 u32 vector = 0; in ixgbe_mta_vector() local
302 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); in ixgbe_mta_vector()
305 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); in ixgbe_mta_vector()
308 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); in ixgbe_mta_vector()
311 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); in ixgbe_mta_vector()
319 /* vector can only be 12-bits or boundary will be exceeded */ in ixgbe_mta_vector()
320 vector in ixgbe_mta_vector()
386 u32 vector; ixgbe_update_mc_addr_list_vf() local
[all...] |
| /titanic_51/usr/src/uts/i86pc/os/ |
| H A D | intr.c | 173 * mask interrupt levels, and the current vector. Because the pcplusmp module
216 * interrupts, but the notification vector is different. Each CPU has a bitmask
218 * interrupts through a specific trap vector as well as through several
1262 dispatch_hilevel(uint_t vector, uint_t arg2) in dispatch_hilevel() argument
1265 av_dispatch_autovect(vector); in dispatch_hilevel()
1293 dispatch_hardint(uint_t vector, uint_t oldipl) in dispatch_hardint() argument
1298 av_dispatch_autovect(vector); in dispatch_hardint()
1305 intr_thread_epilog(cpu, vector, oldipl); in dispatch_hardint()
1343 uint_t vector; in do_interrupt() local
1381 vector in do_interrupt()
[all...] |
| /titanic_51/usr/src/uts/i86pc/io/ |
| H A D | mp_platform_misc.c | 127 * is indexed by IRQ number, NOT by vector number.
209 * Initialise vector->ipl and ipl->pri arrays. level_intr and irqtable
210 * are also set to NULL. vector->irq is set to a value which cannot map
222 * corresponding vector. On some systems, due to hardware errata in apic_init_common()
351 * Add mask bits to disable interrupt vector from happening
369 uchar_t vector; in apic_addspl_common() local
384 "vector=0x%x\n", (void *)irqptr->airq_dip, in apic_addspl_common()
413 * Upgrade vector if max_ipl is not earlier ipl. If we cannot allocate, in apic_addspl_common()
419 vector = apic_allocate_vector(max_ipl, irqindex, 1); in apic_addspl_common()
420 if (vector in apic_addspl_common()
500 uchar_t vector; apic_delspl_common() local
1056 uchar_t ipin, ioapic, ioapicindex, vector; apic_setup_irq_table() local
1394 apic_xlate_vector(uchar_t vector) apic_xlate_vector() argument
[all...] |
| H A D | immu_intrmap.c | 55 #define IRTE_LOW(dst, vector, dlm, tm, rh, dm, fpd, p) \ argument
57 ((uint64_t)(vector) << 16) | \
757 uchar_t vector, dlm, tm, rh, dm; in immu_intrmap_map() local
782 vector = RDT_VECTOR(irdt->ir_lo); in immu_intrmap_map()
790 vector = mregs->mr_data & 0xff; in immu_intrmap_map()
797 irte.lo = IRTE_LOW(dst, vector, dlm, tm, rh, dm, 0, 1); in immu_intrmap_map()
809 irte.lo = IRTE_LOW(dst, vector, dlm, tm, rh, dm, 0, 1); in immu_intrmap_map()
816 vector++; in immu_intrmap_map()
863 uint32_t rdt_entry, tm, pol, idx, vector; in immu_intrmap_rdt() local
871 vector in immu_intrmap_rdt()
[all...] |
| /titanic_51/usr/src/lib/libc/sparc/crt/ |
| H A D | _rtboot.s | 44 ! vector !
86 ! boot attribute value vector. Otherwise, it's already been done and we can
95 ! the stack. Note that we will call ld.so with an entry vector that causes
104 add %fp, 68, %l0 ! argument vector is at %fp+68
110 st %l0, [%o0 + 12] ! store it in the vector
113 set EB_AUXV, %l1 ! get code for auxiliary vector
120 st %l0, [%o0 + 20] ! store aux vector pointer
|