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/titanic_51/usr/src/uts/sun4u/io/px/
H A Dpx_csr.h50 #define CSR_FR(base, off, bit) \ argument
52 (off ## _ ## bit)) & (off ## _ ## bit ## _MASK))
54 #define CSRA_FR(base, off, index, bit) \ argument
56 (off ## _ ## bit)) & (off ## _ ## bit ## _MASK))
58 #define CSR_FS(base, off, bit, val) \ argument
61 ~(((uint64_t)(off ## _ ## bit ## _MASK)) << \
62 (off ## _ ## bit))) | (((uint64_t)(val)) << (off ## _ ## bit))))
64 CSRA_FS(base,off,index,bit,val) global() argument
70 CSR_FC(base,off,bit) global() argument
75 CSRA_FC(base,off,index,bit) global() argument
81 CSR_BR(base,off,bit) global() argument
85 CSRA_BR(base,off,index,bit) global() argument
89 CSR_BS(base,off,bit) global() argument
94 CSRA_BS(base,off,index,bit) global() argument
99 CSR_BC(base,off,bit) global() argument
104 CSRA_BC(base,off,index,bit) global() argument
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H A Dpx_err.c121 * JBC error bit table
123 #define JBC_BIT_DESC(bit, hdl, erpt) \ argument
124 JBC_INTERRUPT_STATUS_ ## bit ## _P, \
128 PX_ERR_JBC_CLASS(bit) }, \
129 { JBC_INTERRUPT_STATUS_ ## bit ## _S, \
133 PX_ERR_JBC_CLASS(bit)
189 * UBC error bit table
191 #define UBC_BIT_DESC(bit, hdl, erpt) \ argument
192 UBC_INTERRUPT_STATUS_ ## bit ## _P, \
196 PX_ERR_UBC_CLASS(bit) }, \
232 IMU_BIT_DESC(bit,hdl,erpt) global() argument
264 MMU_BIT_DESC(bit,hdl,erpt) global() argument
298 ILU_BIT_DESC(bit,hdl,erpt) global() argument
321 TLU_UC_BIT_DESC(bit,hdl,erpt) global() argument
332 TLU_UC_OB_BIT_DESC(bit,hdl,erpt) global() argument
374 TLU_CE_BIT_DESC(bit,hdl,erpt) global() argument
398 TLU_OE_BIT_DESC(bit,hdl,erpt) global() argument
409 TLU_OE_OB_BIT_DESC(bit,hdl,erpt) global() argument
474 LPUL_BIT_DESC(bit,hdl,erpt) global() argument
487 LPUP_BIT_DESC(bit,hdl,erpt) global() argument
500 LPUR_BIT_DESC(bit,hdl,erpt) global() argument
513 LPUX_BIT_DESC(bit,hdl,erpt) global() argument
526 LPUS_BIT_DESC(bit,hdl,erpt) global() argument
539 LPUG_BIT_DESC(bit,hdl,erpt) global() argument
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/titanic_51/usr/src/cmd/sendmail/include/sm/
H A Dbitops.h22 ** Data structure for bit maps.
24 ** Each bit in this map can be referenced by an ascii character.
25 ** This is 256 possible bits, or 32 8-bit bytes.
28 # define BITMAPBITS 256 /* number of bits in a bit map */
30 # define BITMAPBYTES (BITMAPBITS / BYTEBITS) /* number of bytes in bit map */
36 # define _BITWORD(bit) (((unsigned char)(bit) / (BYTEBITS * sizeof (int))) & BITMAPMAX) argument
37 # define _BITBIT(bit) ((unsigned int)1 << ((unsigned char)(bit) % (BYTEBITS * sizeof (int)))) argument
41 /* properly case and truncate bit */
42 bitidx(bit) global() argument
45 bitnset(bit,map) global() argument
48 setbitn(bit,map) global() argument
51 clrbitn(bit,map) global() argument
57 bitset(bit,word) global() argument
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/titanic_51/usr/src/cmd/dtrace/test/cmd/baddof/
H A Dbaddof.c58 int bit, i; in corrupt() local
67 * We are going iterate through, flipping one bit and attempting in corrupt()
70 for (bit = 0; bit < len * 8; bit++) { in corrupt()
71 saved = buf[bit / 8]; in corrupt()
72 buf[bit / 8] ^= (1 << (bit % 8)); in corrupt()
74 if ((bit % 100) == 0) in corrupt()
75 printf("%d\n", bit); in corrupt()
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/titanic_51/usr/src/lib/libshell/misc/
H A Dbuildksh93.readme33 for { 32bit SPARC, 64bit SPARC, 32bit i386, 64bit AMD64, 32bit S390,
34 64bit S390x }) which are moved later to their matching OS/Net build
54 ## Unpack the sources (32bit SPARC):
60 ## Build ast-ksh for 32bit SPARC
62 # - "build.solaris.sparc.32bit.suncc" - 32bit SPARC
63 # - "build.solaris.sparc.64bit.suncc" - 64bit SPARC
64 # - "build.solaris.i386.32bit.suncc" - 32bit x86/i386
65 # - "build.solaris.i386.64bit.suncc" - 64bit x86/AMD64
66 # - "build.solaris.s390.32bit.gcc" - 32bit SystemZ/S390
67 # - "build.solaris.s390.64bit.gcc" - 64bit SystemZ/S390x
[all …]
/titanic_51/usr/src/uts/sun4/io/px/
H A Dpx_debug.c129 static void px_dbg_print(px_debug_bit_t bit, dev_info_t *dip, char *fmt,
131 static void px_dbg_queue(px_debug_bit_t bit, dev_info_t *dip, char *fmt,
140 px_dbg_print(px_debug_bit_t bit, dev_info_t *dip, char *fmt, va_list args) in px_dbg_print() argument
142 int cont = bit >> DBG_BITS; in px_dbg_print()
149 ddi_get_instance(dip), px_debug_sym[bit]); in px_dbg_print()
151 prom_printf("px: %s: ", px_debug_sym[bit]); in px_dbg_print()
164 px_dbg_queue(px_debug_bit_t bit, dev_info_t *dip, char *fmt, va_list args) in px_dbg_queue() argument
189 msg_p->bit = bit; in px_dbg_queue()
220 px_dbg_print(msg_p->bit, msg_ in px_dbg_drain()
231 px_dbg(px_debug_bit_t bit,dev_info_t * dip,char * fmt,...) px_dbg() argument
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/titanic_51/usr/src/boot/sys/sys/
H A Dbitstring.h41 /* byte of the bitstring bit is in */
42 #define _bit_byte(bit) \ argument
43 ((bit) >> 3)
45 /* mask for the bit within its byte */
46 #define _bit_mask(bit) \ argument
47 (1 << ((bit)&0x7))
62 /* is bit N of bitstring name set? */
63 #define bit_test(name, bit) \ argument
64 ((name)[_bit_byte(bit)] & _bit_mask(bit))
67 bit_set(name,bit) global() argument
71 bit_clear(name,bit) global() argument
[all...]
/titanic_51/usr/src/uts/common/io/nxge/
H A Dnxge_fflp_hash.c115 uint32_t index, bit, byte, crc; in nxge_crc32c_init() local
120 for (bit = 0; bit < 8; bit++) { in nxge_crc32c_init()
141 uint16_t index, bit, byte; in nxge_crc_ccitt_init() local
146 for (bit = 0; bit < 8; bit++) { in nxge_crc_ccitt_init()
203 * Lookup the crc32c for a 32 bit word stream
281 uint32_t crc, bit, byt in nxge_init_h1_table() local
305 int bit, byte; nxge_compute_h1_serial() local
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/titanic_51/usr/src/uts/i86xpv/sys/
H A Devtchn_impl.h81 #define SET_EVTCHN_BIT(bit, arrayp) \ argument
82 ((arrayp)[bit >> EVTCHN_SHIFT] |= \
83 (1ul << ((bit) & ((1ul << EVTCHN_SHIFT) - 1))))
84 #define CLEAR_EVTCHN_BIT(bit, arrayp) \ argument
85 ((arrayp)[bit >> EVTCHN_SHIFT] &= \
86 ~((1ul << ((bit) & ((1ul << EVTCHN_SHIFT) - 1)))))
87 #define TEST_EVTCHN_BIT(bit, arrayp) \ argument
88 ((arrayp)[bit >> EVTCHN_SHIFT] & \
89 (1ul << ((bit) & ((1ul << EVTCHN_SHIFT) - 1))))
/titanic_51/usr/src/cmd/sgs/rtld.4.x/
H A Dumultiply.s47 * 4 or fewer bit multipliers: 19 or 21 instruction cycles
48 * 8 or fewer bit multipliers: 26 or 28 instruction cycles
49 * 12 or fewer bit multipliers: 34 or 36 instruction cycles
50 * 16 or fewer bit multipliers: 42 or 44 instruction cycles
71 be umul_4bit ! 4-bit multiplier
72 sethi %hi(0xffff0000), %o5 ! mask for 16-bit case; have to
77 be,a umul_8bit ! 8-bit multiplier
81 be,a umul_12bit ! 12-bit multiplier
85 be,a umul_16bit ! 16-bit multiplier
130 ! With 32-bit two
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/titanic_51/usr/src/uts/common/io/aggr/
H A Daggr_lacp.c292 pl->ActorAdminPortState.bit.activity = B_FALSE; in aggr_lacp_init_port()
293 pl->ActorAdminPortState.bit.timeout = B_TRUE; in aggr_lacp_init_port()
294 pl->ActorAdminPortState.bit.aggregation = B_TRUE; in aggr_lacp_init_port()
295 pl->ActorAdminPortState.bit.sync = B_FALSE; in aggr_lacp_init_port()
296 pl->ActorAdminPortState.bit.collecting = B_FALSE; in aggr_lacp_init_port()
297 pl->ActorAdminPortState.bit.distributing = B_FALSE; in aggr_lacp_init_port()
298 pl->ActorAdminPortState.bit.defaulted = B_FALSE; in aggr_lacp_init_port()
299 pl->ActorAdminPortState.bit.expired = B_FALSE; in aggr_lacp_init_port()
307 pl->PartnerAdminPortState.bit.timeout = in aggr_lacp_init_port()
308 pl->PartnerOperPortState.bit in aggr_lacp_init_port()
[all...]
/titanic_51/usr/src/uts/common/io/dmfe/
H A Ddmfe_mii.c29 * The bit-twiddling required by the MII interface makes the functions
44 * NB: <romaddr> is a byte address but must be 16-bit aligned.
51 uint16_t bit; in dmfe_read_eeprom() local
61 /* loop over multiple words... rom access in 16-bit increments */ in dmfe_read_eeprom()
74 /* send 3 bit read command */ in dmfe_read_eeprom()
75 for (bit = HIGH_CMD_BIT; bit != 0; bit >>= 1) { in dmfe_read_eeprom()
77 value = (bit & EEPROM_READ_CMD) ? DATA_IN : 0; in dmfe_read_eeprom()
79 /* strobe the bit i in dmfe_read_eeprom()
[all...]
/titanic_51/usr/src/common/mc/mc-amd/
H A Dmcamd_synd.c31 * Indexed by syndrome, value is bit number. If value is -1, a multi-bit
55 * The first dimension of this table is the errored bit pattern, which is the
56 * column dimension of the table in the BKDG. Conveniently, the bit pattern
62 * 0 is not a valid errored bit pattern.
204 char bit; in mcamd_eccsynd_decode() local
211 if ((bit = eccsynd[synd]) == -1) { in mcamd_eccsynd_decode()
213 "synd 0x%x is a multi-bit syndrome\n", synd); in mcamd_eccsynd_decode()
218 "synd 0x%x is single-bit and indicates %s bit in mcamd_eccsynd_decode()
[all...]
/titanic_51/usr/src/uts/common/io/audio/drv/audio1575/
H A Daudio1575.h282 #define M1575_SCR_RECMOD 0x000c0000 /* 0 = 16bit, 1=20 bit */
283 #define M1575_SCR_PCMMOD 0x00030000 /* 0 = 16bit, 1=20 bit */
413 #define SET8(reg, bit) PUT8(reg, GET8(reg) | (bit)) argument
414 #define SET16(reg, bit) PUT16(reg, GET16(reg) | (bit)) argument
415 #define SET32(reg, bit) PUT32(reg, GET32(reg) | (bit)) argument
416 CLR8(reg,bit) global() argument
417 CLR16(reg,bit) global() argument
418 CLR32(reg,bit) global() argument
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/titanic_51/usr/src/lib/libc/i386/gen/
H A Dbyteorder.s66 shrl $16, %eax / moves high 16-bit to low 16-bit
73 shrl $16, %eax / moves high 16-bit to low 16-bit
84 shrl $16, %eax / moves high 16-bit to low 16-bit
106 shrl $16, %eax / moves high 16-bit to low 16-bit
113 shrl $16, %eax / moves high 16-bit to low 16-bit
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/titanic_51/usr/src/grub/grub-0.97/netboot/
H A Dtlan.h456 inline void TLan_ClearBit(u8 bit, u16 port)
458 outb_p(inb_p(port) & ~bit, port);
464 inline int TLan_GetBit(u8 bit, u16 port)
466 return ((int) (inb_p(port) & bit));
472 inline void TLan_SetBit(u8 bit, u16 port)
474 outb_p(inb_p(port) | bit, port);
478 #define TLan_ClearBit( bit, port ) outb_p(inb_p(port) & ~bit, port) argument
479 #define TLan_GetBit( bit, port ) ((int) (inb_p(port) & bit)) argument
480 TLan_SetBit(bit,port) global() argument
507 DA(a,bit) global() argument
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/titanic_51/usr/src/common/atomic/sparc/
H A Datomic.s93 sll %g1, 3, %g1 ! %g1 = bit offset, right-to-left
95 sll %o3, %g1, %o3 ! %o3 = shifted to bit offset
96 sll %o1, %g1, %o1 ! %o1 = shifted to bit offset
165 sll %o4, 3, %o4 ! %o4 = bit offset, left-to-right
166 sll %g1, 3, %g1 ! %g1 = bit offset, right-to-left
168 srl %o3, %o4, %o3 ! %o3 = shifted to bit offset
169 sll %o1, %g1, %o1 ! %o1 = shifted to bit offset
172 ! if low-order bit is 1, we will properly get an alignment fault here
303 add %o1, %o2, %o1 ! convert 2 32-bit args into 1 64-bit
[all...]
/titanic_51/usr/src/uts/sun4u/sys/i2c/clients/
H A Dpcf8574_impl.h39 * PCF8574_BIT_READ_MASK takes in a byte from the device and the bit that
40 * the user wants to read. I shifts the byte over so that the bit that we
41 * want is in the 1's bit and masks out the rest of the byte.
43 #define PCF8574_BIT_READ_MASK(byte, bit) ((byte >> bit) & 0x01) argument
46 * PCF8574_BIT_WRITE_MASK takes in a byte from the device, the bit that the
48 * bit. It zero's out the bit that we are writing to in the byte and then or's
49 * the value(which was shifted to the bit location we wanted) to fill in only
50 * that bit i
52 PCF8574_BIT_WRITE_MASK(byte,bit,value) global() argument
[all...]
H A Dssc100_impl.h39 * SSC100_BIT_READ_MASK takes in a byte from the device and the bit that
40 * the user wants to read. I shifts the byte over so that the bit that we
41 * want is in the 1's bit and masks out the rest of the byte.
43 #define SSC100_BIT_READ_MASK(byte, bit) ((byte >> bit) & 0x01) argument
46 * SSC100_BIT_WRITE_MASK takes in a byte from the device, the bit that the
48 * bit. It zero's out the bit that we are writing to in the byte and then or's
49 * the value(which was shifted to the bit location we wanted) to fill in only
50 * that bit i
52 SSC100_BIT_WRITE_MASK(byte,bit,value) global() argument
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/titanic_51/usr/src/uts/sun4v/io/n2rng/
H A Dn2rng_entp_algs.c51 * returns the position of the MSB of x. The 1 bit is position 0. An
57 int bit; in msb() local
63 bit = 0; in msb()
64 MSBSTEP(x, 32, bit); in msb()
65 MSBSTEP(x, 16, bit); in msb()
66 MSBSTEP(x, 8, bit); in msb()
67 MSBSTEP(x, 4, bit); in msb()
68 MSBSTEP(x, 2, bit); in msb()
69 MSBSTEP(x, 1, bit); in msb()
71 return (bit); in msb()
[all...]
/titanic_51/usr/src/boot/lib/libc/string/
H A Dstrcspn.c41 * NB: idx and bit are temporaries whose use causes gcc 3.4.2 to in strcspn()
45 u_long bit; in strcspn() local
52 #if LONG_BIT == 64 /* always better to unroll on 64-bit architectures */ in strcspn()
61 bit = BIT(*charset); in strcspn()
62 tbl[idx] |= bit; in strcspn()
67 bit = BIT(*s1); in strcspn()
68 if ((tbl[idx] & bit) != 0) in strcspn()
H A Dstrspn.c41 * NB: idx and bit are temporaries whose use causes gcc 3.4.2 to in strspn()
45 u_long bit; in strspn() local
52 #if LONG_BIT == 64 /* always better to unroll on 64-bit architectures */ in strspn()
60 bit = BIT(*charset); in strspn()
61 tbl[idx] |= bit; in strspn()
66 bit = BIT(*s1); in strspn()
67 if ((tbl[idx] & bit) == 0) in strspn()
H A Dfls.c36 * Find Last Set bit
41 int bit; in fls() local
45 for (bit = 1; mask != 1; bit++) in fls()
47 return (bit); in fls()
H A Dffs.c39 * Find First Set bit
44 int bit; in ffs() local
48 for (bit = 1; !(mask & 1); bit++) in ffs()
50 return (bit); in ffs()
/titanic_51/usr/src/common/atomic/sparcv9/
H A Datomic.s214 sll %g1, 3, %g1 ! %g1 = bit offset, right-to-left
216 sll %o3, %g1, %o3 ! %o3 = shifted to bit offset
217 sll %o1, %g1, %o1 ! %o1 = shifted to bit offset
286 sll %o4, 3, %o4 ! %o4 = bit offset, left-to-right
287 sll %g1, 3, %g1 ! %g1 = bit offset, right-to-left
289 srl %o3, %o4, %o3 ! %o3 = shifted to bit offset
290 sll %o1, %g1, %o1 ! %o1 = shifted to bit offset
293 ! if low-order bit is 1, we will properly get an alignment fault here
455 sll %g1, 3, %g1 ! %g1 = bit offset, right-to-left
457 sll %o3, %g1, %o3 ! %o3 = shifted to bit offse
[all...]

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