| /titanic_50/usr/src/uts/sun4u/io/i2c/clients/ |
| H A D | ssc050.c | 320 uchar_t reg, val8; in ssc050_ioctl() local
354 err = ssc050_get(unitp, reg, &val8, I2C_SLEEP); in ssc050_ioctl()
359 if (val8 != ioctl_port.dir_mask) { in ssc050_ioctl()
362 ioctl_port.dir_mask, val8)); in ssc050_ioctl()
372 err = ssc050_get(unitp, port, &val8, I2C_SLEEP); in ssc050_ioctl()
376 ioctl_port.value = val8; in ssc050_ioctl()
392 err = ssc050_get(unitp, reg, &val8, I2C_SLEEP); in ssc050_ioctl()
398 "contains %x", unitp->name, val8)); in ssc050_ioctl()
401 val8 = val8 & inverted_mask; in ssc050_ioctl()
404 "NOW contains %x", unitp->name, val8)); in ssc050_ioctl()
[all …]
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| H A D | pic16f819.c | 286 uchar_t val8; in pic16f819_ioctl() local
308 err = pic16f819_get(unitp, ioctl_reg.reg_num, &val8, in pic16f819_ioctl()
314 ioctl_reg.reg_value = val8; in pic16f819_ioctl()
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| /titanic_50/usr/src/uts/common/io/rtls/ |
| H A D | rtls.c | 1643 uint8_t val8; in rtls_chip_reset() local
1648 val8 = rtls_reg_get8(rtlsp, RT_COMMAND_REG); in rtls_chip_reset()
1649 val8 &= ~(RT_COMMAND_RX_ENABLE | RT_COMMAND_TX_ENABLE); in rtls_chip_reset()
1650 rtls_reg_set8(rtlsp, RT_COMMAND_REG, val8); in rtls_chip_reset()
1668 val8 = rtls_reg_get8(rtlsp, RT_COMMAND_REG); in rtls_chip_reset()
1669 rtls_reg_set8(rtlsp, RT_COMMAND_REG, val8 | RT_COMMAND_RESET); in rtls_chip_reset()
1702 uint8_t val8; in rtls_chip_init() local
1728 val8 = rtls_reg_get8(rtlsp, RT_COMMAND_REG); in rtls_chip_init()
1730 val8 | RT_COMMAND_RX_ENABLE | RT_COMMAND_TX_ENABLE); in rtls_chip_init()
1779 uint8_t val8; in rtls_chip_start() local
[all …]
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| /titanic_50/usr/src/uts/sun4u/excalibur/os/ |
| H A D | excalibur.c | 54 int8_t val8; member
268 fv = xcalfans[i].val8; in plat_fan_blast()
284 xcalfans[i].val8, xcalfans[i].pathname); in plat_fan_blast()
288 xcalfans[i].val8, xcalfans[i].pathname); in plat_fan_blast()
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| /titanic_50/usr/src/lib/libcpc/sparc/ |
| H A D | event_ultra.c | 99 uint8_t val8; in picbits() local
109 if (__cpc_name_to_reg(cpuver, regno, value, &val8) != 0) { in picbits()
114 *bits |= (((uint64_t)val8 & kv->kv_mask) << kv->kv_shift); in picbits()
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| /titanic_50/usr/src/lib/libcpc/i386/ |
| H A D | event_pentium.c | 133 uint8_t val8; in picbits() local
144 if (__cpc_name_to_reg(cpuver, regno, value, &val8) != 0) { in picbits()
163 bits[kv->kv_regno] |= (val8 & kv->kv_mask) << kv->kv_shift; in picbits()
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| /titanic_50/usr/src/uts/intel/io/pci/ |
| H A D | pci_boot.c | 1791 uint8_t val8; in undo_amd8111_pci_fix() local
1793 val8 = pci_getb(bus, dev, fn, LPC_IO_CONTROL_REG_1); in undo_amd8111_pci_fix()
1798 val8 |= AMD8111_ENABLENMI; in undo_amd8111_pci_fix()
1799 pci_putb(bus, dev, fn, LPC_IO_CONTROL_REG_1, val8); in undo_amd8111_pci_fix()
1805 uint8_t val8; in pci_fix_amd8111() local
1807 val8 = pci_getb(bus, dev, fn, LPC_IO_CONTROL_REG_1); in pci_fix_amd8111()
1809 if ((val8 & AMD8111_ENABLENMI) == 0) in pci_fix_amd8111()
1817 val8 &= ~AMD8111_ENABLENMI; in pci_fix_amd8111()
1819 pci_putb(bus, dev, fn, LPC_IO_CONTROL_REG_1, val8); in pci_fix_amd8111()
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| /titanic_50/usr/src/grub/grub-0.97/netboot/ |
| H A D | r8169.c | 121 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) argument
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| /titanic_50/usr/src/uts/common/io/rge/ |
| H A D | rge_chip.c | 840 uint8_t val8; in rge_chip_reset() local
869 val8 = rge_reg_get8(rgep, RT_COMMAND_REG); in rge_chip_reset()
870 if (!(val8 & RT_COMMAND_RESET)) { in rge_chip_reset()
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