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/titanic_50/usr/src/uts/intel/io/drm/
H A Dradeon_state.c2770 drm_radeon_tcl_prim_t tclprim; in radeon_cp_vertex2() local
2790 tclprim.start = prim.start; in radeon_cp_vertex2()
2791 tclprim.finish = prim.finish; in radeon_cp_vertex2()
2792 tclprim.prim = prim.prim; in radeon_cp_vertex2()
2793 tclprim.vc_format = prim.vc_format; in radeon_cp_vertex2()
2796 tclprim.offset = prim.numverts * 64; in radeon_cp_vertex2()
2797 tclprim.numverts = RADEON_MAX_VB_VERTS; /* duh */ in radeon_cp_vertex2()
2799 radeon_cp_dispatch_indices(dev, buf, &tclprim); in radeon_cp_vertex2()
2801 tclprim.numverts = prim.numverts; in radeon_cp_vertex2()
2802 tclprim.offset = 0; /* not used */ in radeon_cp_vertex2()
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