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Searched refs:regspec_addr (Results 1 – 25 of 31) sorted by relevance

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/titanic_50/usr/src/uts/intel/os/
H A Dddi_arch.c103 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, in i_ddi_bus_map()
115 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { in i_ddi_bus_map()
119 rp->regspec_addr, rp->regspec_size); in i_ddi_bus_map()
123 if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { in i_ddi_bus_map()
132 rp->regspec_addr += (uint_t)offset; in i_ddi_bus_map()
143 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, in i_ddi_bus_map()
199 if (rp->regspec_addr < rangep->rng_coffset) in reg_is_enclosed_in_range()
205 if ((rp->regspec_addr + rp->regspec_size - 1) <= in reg_is_enclosed_in_range()
251 rp->regspec_addr, rp->regspec_size); in i_ddi_apply_range()
258 rp->regspec_addr += rangep->rng_offset - rangep->rng_coffset; in i_ddi_apply_range()
[all …]
/titanic_50/usr/src/uts/sparc/os/
H A Dddi_arch.c108 rp->regspec_addr += (uintptr_t)offset; in i_ddi_bus_map()
183 if (rp->regspec_addr < rangep->rng_coffset) in reg_is_enclosed_in_range()
189 if ((rp->regspec_addr + rp->regspec_size - 1) <= in reg_is_enclosed_in_range()
234 rp->regspec_addr, rp->regspec_size); in i_ddi_apply_range()
241 rp->regspec_addr += rangep->rng_offset - rangep->rng_coffset; in i_ddi_apply_range()
245 rp->regspec_addr, rp->regspec_size); in i_ddi_apply_range()
/titanic_50/usr/src/uts/sun4u/io/
H A Dmach_rootnex.c262 rp->regspec_addr, (n > 1 ? "" : " ...")); in rootnex_ctl_reportdev_impl()
276 rp->regspec_addr & in rootnex_ctl_reportdev_impl()
355 rp->regspec_bustype, rp->regspec_addr); in rootnex_name_child_impl()
389 rp->regspec_addr & root_phys_addr_lo_mask); in rootnex_name_child_impl()
447 addr |= (uint64_t)rp->regspec_addr; in rootnex_ctl_initchild_impl()
478 addr |= (unsigned long long) rp->regspec_addr; in rootnex_ctl_uninitchild_impl()
H A Dupa64s.c1022 rp->regspec_addr = LO32(addr); in xlate_reg_prop()
1030 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, i); in xlate_reg_prop()
H A Dsysiosbus.c1002 pdptr->offset = ((struct regspec *)reg_prop)->regspec_addr; in make_sbus_ppd()
1082 r.regspec_addr = 0; in sbusmem_initchild()
1491 rp->regspec_bustype, rp->regspec_addr); in sbus_ctlops()
/titanic_50/usr/src/uts/i86pc/io/
H A Disa.c439 if (isa_reg_p->regspec_addr < rng_p->child_low) in isa_apply_range()
441 if ((isa_reg_p->regspec_addr + isa_reg_p->regspec_size - 1) > in isa_apply_range()
445 offset = isa_reg_p->regspec_addr - rng_p->child_low; in isa_apply_range()
476 if (isa_reg_p->regspec_addr < reg_p->regspec_addr) in isa_apply_range()
478 if ((isa_reg_p->regspec_addr + isa_reg_p->regspec_size) > in isa_apply_range()
479 (reg_p->regspec_addr + reg_p->regspec_size)) in isa_apply_range()
484 pci_reg_p->pci_phys_low = isa_reg_p->regspec_addr; in isa_apply_range()
493 isa_reg_p->regspec_addr, isa_reg_p->regspec_size); in isa_apply_range()
538 rp->regspec_addr += (uint_t)offset; in isa_bus_map()
1071 (uint_t)sparc_pd_getreg(child, 0)->regspec_addr); in isa_name_child()
[all …]
H A Drootnex.c766 "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); in rootnex_ctl_reportdev()
771 "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); in rootnex_ctl_reportdev()
777 rp->regspec_bustype, rp->regspec_addr); in rootnex_ctl_reportdev()
880 rp.regspec_addr = orp->regspec_addr; in rootnex_map()
901 rp.regspec_bustype, rp.regspec_addr, rp.regspec_size, offset, in rootnex_map()
913 if (rp.regspec_bustype > 1 && rp.regspec_addr != 0) { in rootnex_map()
917 rp.regspec_addr, rp.regspec_size); in rootnex_map()
921 if (rp.regspec_bustype > 1 && rp.regspec_addr == 0) { in rootnex_map()
930 rp.regspec_addr += offset; in rootnex_map()
940 rp.regspec_addr, rp.regspec_size, offset, len, mp->map_handlep); in rootnex_map()
[all …]
H A Dimmu_dmar.c653 reg.regspec_addr = drhd->dr_regs; in drhd_devi_create()
687 pdptr->par_reg->regspec_addr = drhd->dr_regs; in drhd_devi_create()
/titanic_50/usr/src/uts/intel/io/acpica/
H A Dacpi_enum.c117 used->start_addr = io[i].regspec_addr; in add_used_io_mem()
173 io[*io_count].regspec_addr = acpi_io.Minimum; in parse_resources_io()
194 io[*io_count].regspec_addr = fixed_io.Address; in parse_resources_fixed_io()
215 io[*io_count].regspec_addr = fixed_mem32.Address; in parse_resources_fixed_mem32()
237 io[*io_count].regspec_addr = mem32.Minimum; in parse_resources_mem32()
306 io[*io_count].regspec_addr = addr16.Address.Minimum; in parse_resources_addr16()
362 io[*io_count].regspec_addr = addr32.Address.Minimum; in parse_resources_addr32()
435 io[*io_count].regspec_addr = addr64.Address.Minimum; in parse_resources_addr64()
562 if ((io[0].regspec_addr == 0x60 && in parse_resources()
563 io[1].regspec_addr == 0x64) || in parse_resources()
[all …]
/titanic_50/usr/src/uts/sun4v/io/
H A Dmach_rootnex.c131 rp->regspec_addr & root_phys_addr_lo_mask); in rootnex_ctl_reportdev_impl()
181 rp->regspec_bustype, rp->regspec_addr); in rootnex_name_child_impl()
212 addrlow = rp->regspec_addr & root_phys_addr_lo_mask; in rootnex_name_child_impl()
/titanic_50/usr/src/uts/i86pc/io/pci/
H A Dpci.c439 reg.regspec_addr = (uint64_t)pci_rp->pci_phys_mid << 32 | in pci_bus_map()
448 if (reg.regspec_addr + offset < MAX(reg.regspec_addr, offset)) in pci_bus_map()
450 reg.regspec_addr += offset; in pci_bus_map()
513 reg.regspec_addr = (uint64_t)pci_rp->pci_phys_mid << 32 | in pci_bus_map()
521 if (reg.regspec_addr + offset < MAX(reg.regspec_addr, offset)) in pci_bus_map()
523 reg.regspec_addr += offset; in pci_bus_map()
/titanic_50/usr/src/uts/i86pc/io/pciex/
H A Dnpe.c529 reg.regspec_addr = (uint64_t)pci_rp->pci_phys_mid << 32 | in npe_bus_map()
538 if (reg.regspec_addr + offset < MAX(reg.regspec_addr, offset)) in npe_bus_map()
540 reg.regspec_addr += offset; in npe_bus_map()
653 reg.regspec_addr = (uint64_t)pci_rp->pci_phys_mid << 32 | in npe_bus_map()
661 if (reg.regspec_addr + offset < MAX(reg.regspec_addr, offset)) in npe_bus_map()
663 reg.regspec_addr += offset; in npe_bus_map()
/titanic_50/usr/src/uts/sun4/io/
H A Drootnex.c338 base = (uint64_t)rp->regspec_addr & (~MMU_PAGEOFFSET); /* base addr */ in rootnex_map_regspec()
362 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; in rootnex_map_regspec()
476 hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & (~MMU_PAGEOFFSET)); in rootnex_map_handle()
478 (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); in rootnex_map_handle()
545 rp->regspec_addr += (uint_t)offset; in rootnex_map()
/titanic_50/usr/src/uts/sun4/io/px/
H A Dpx_util.c250 new_rp->regspec_addr = (uint32_t)addr; in px_xlate_reg()
255 n, new_rp->regspec_bustype, new_rp->regspec_addr, reg_sz); in px_xlate_reg()
H A Dpx_tools.c497 xlated_regspec.regspec_addr; in pxtool_get_phys_addr()
500 xlated_regspec.regspec_bustype, xlated_regspec.regspec_addr, in pxtool_get_phys_addr()
/titanic_50/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_util.c227 new_rp->regspec_addr = reg_begin - rng_begin + rng_p->parent_low; in pcmu_xlate_reg()
232 n, new_rp->regspec_bustype, new_rp->regspec_addr, sz); in pcmu_xlate_reg()
/titanic_50/usr/src/uts/sun4u/starcat/io/
H A Dfcgp2.c272 r.regspec_addr = fc_cell2uint(fc_arg(cp, 2)); in gfc_map_in()
280 r.regspec_addr, r.regspec_size); in gfc_map_in()
287 r.regspec_addr, r.regspec_size); in gfc_map_in()
/titanic_50/usr/src/uts/sun4u/io/pci/
H A Dpci_util.c246 new_rp->regspec_addr = reg_begin - rng_begin + rng_p->parent_low; in pci_xlate_reg()
251 n, new_rp->regspec_bustype, new_rp->regspec_addr, sz); in pci_xlate_reg()
/titanic_50/usr/src/uts/i86pc/io/gfx_private/
H A Dgfxp_vgatext.c1359 if (reg[index].regspec_addr > addr) in vgatext_get_isa_reg_index()
1361 if (reg[index].regspec_addr + reg[index].regspec_size <= addr) in vgatext_get_isa_reg_index()
1364 *offset = addr - reg[index].regspec_addr; in vgatext_get_isa_reg_index()
/titanic_50/usr/src/uts/sun4u/serengeti/io/
H A Dssm.c559 regbase = rp->regspec_addr & root_phys_addr_lo_mask; in name_child()
653 rp->regspec_addr, in ssm_ctlops()
/titanic_50/usr/src/uts/intel/io/vgatext/
H A Dvgatext.c1527 if (reg[index].regspec_addr > addr) in vgatext_get_isa_reg_index()
1529 if (reg[index].regspec_addr + reg[index].regspec_size <= addr) in vgatext_get_isa_reg_index()
1532 *offset = addr - reg[index].regspec_addr; in vgatext_get_isa_reg_index()
/titanic_50/usr/src/uts/common/sys/
H A Dddi_impldefs.h633 uint_t regspec_addr; /* address of reg relative to bus */ member
644 uint64_t regspec_addr; /* address of reg relative to bus */ member
/titanic_50/usr/src/cmd/prtconf/
H A Dprt_xxx.c153 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size); in obio_printregs()
/titanic_50/usr/src/uts/sun4v/io/niumx/
H A Dniumx.c438 p_regspec.regspec_addr = reg_begin - rng_begin + rng_p->parent_lo; in niumx_map()
441 p_regspec.regspec_bustype, p_regspec.regspec_addr, in niumx_map()
/titanic_50/usr/src/uts/sun4/os/
H A Dddi_impl.c158 rp->regspec_addr = r64_rp->addr_lo; in init_regspec_64()
318 rp->regspec_bustype, rp->regspec_addr); in impl_sunbus_name_child()

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