Home
last modified time | relevance | path

Searched refs:regsize (Results 1 – 11 of 11) sorted by relevance

/titanic_50/usr/src/uts/common/io/drm/
H A Ddrm_memory.c110 uint_t base, regsize; in drm_get_pci_index_reg() local
129 regsize = (uint_t)regs[i].pci_size_low; in drm_get_pci_index_reg()
131 (uint_t)physical < (base + regsize)) { in drm_get_pci_index_reg()
/titanic_50/usr/src/uts/intel/io/agpgart/
H A Dagptarget.c215 size_t size, regsize; in agp_target_get_apsize() local
280 AGP_TARGET_BAR1, (off_t *)&regsize) == DDI_FAILURE) in agp_target_get_apsize()
283 if (MB2BYTES(size) != regsize) { in agp_target_get_apsize()
286 regsize)); in agp_target_get_apsize()
288 size = BYTES2MB(regsize); in agp_target_get_apsize()
/titanic_50/usr/src/uts/common/io/ntxn/
H A Dunm_gem.c897 off_t regsize, dbsize = UNM_DB_MAPSIZE_BYTES; in unm_pci_map_setup() local
904 ret = ddi_dev_regsize(dip, 1, &regsize); in unm_pci_map_setup()
912 regsize, &unm_dev_attr, &adapter->regs_handle); in unm_pci_map_setup()
921 if (regsize == UNM_PCI_128MB_SIZE) { in unm_pci_map_setup()
928 } else if (regsize == UNM_PCI_32MB_SIZE) { in unm_pci_map_setup()
936 } else if (regsize == UNM_PCI_2MB_SIZE) { in unm_pci_map_setup()
952 adapter->name, adapter->instance, regsize); in unm_pci_map_setup()
/titanic_50/usr/src/uts/intel/io/dktp/controller/ata/
H A Data_common.c1910 off_t regsize; in ata_setup_ioaddr() local
1916 rc = ddi_dev_regsize(dip, 0, &regsize); in ata_setup_ioaddr()
1917 if (rc != DDI_SUCCESS || regsize <= AT_CMD) { in ata_setup_ioaddr()
1919 rc, (long long)regsize)); in ata_setup_ioaddr()
1923 rc = ddi_dev_regsize(dip, 1, &regsize); in ata_setup_ioaddr()
1924 if (rc != DDI_SUCCESS || regsize <= AT_ALTSTATUS) { in ata_setup_ioaddr()
1926 rc, (long long)regsize)); in ata_setup_ioaddr()
1972 rc = ddi_dev_regsize(dip, 2, &regsize); in ata_setup_ioaddr()
1973 if (rc != DDI_SUCCESS || regsize < 8) { in ata_setup_ioaddr()
1975 rc, (long long)regsize)); in ata_setup_ioaddr()
/titanic_50/usr/src/uts/common/io/nxge/
H A Dnxge_main.c1194 off_t regsize; in nxge_map_regs() local
1267 (void) ddi_dev_regsize(nxgep->dip, 0, &regsize); in nxge_map_regs()
1269 "nxge_map_regs: pci config size 0x%x", regsize)); in nxge_map_regs()
1300 (void) ddi_dev_regsize(nxgep->dip, 1, &regsize); in nxge_map_regs()
1302 "nxge_map_regs: pio size 0x%x", regsize)); in nxge_map_regs()
1314 (void) ddi_dev_regsize(nxgep->dip, 2, &regsize); in nxge_map_regs()
1316 "nxge_map_regs: msix size 0x%x", regsize)); in nxge_map_regs()
1327 (void) ddi_dev_regsize(nxgep->dip, 3, &regsize); in nxge_map_regs()
1329 "nxge_map_regs: vio size 0x%x", regsize)); in nxge_map_regs()
1367 (void) ddi_dev_regsize(nxgep->dip, 1, &regsize); in nxge_map_regs()
[all …]
H A Dnxge_hio_guest.c64 off_t regsize; in nxge_guest_regs_map() local
76 if ((rv = ddi_dev_regsize(nxge->dip, 0, &regsize)) != DDI_SUCCESS) { in nxge_guest_regs_map()
/titanic_50/usr/src/uts/common/io/skd/
H A Dskd.c4665 off_t regsize; in skd_attach() local
4769 if (ddi_dev_regsize(dip, 1, &regsize) != DDI_SUCCESS || in skd_attach()
4770 ddi_regs_map_setup(dip, 1, &skdev->iobase, 0, regsize, in skd_attach()
4783 (void *)skdev->iomap_iobase, 1, regsize); in skd_attach()
4785 if (ddi_dev_regsize(dip, 2, &regsize) != DDI_SUCCESS || in skd_attach()
4786 ddi_regs_map_setup(dip, 2, &skdev->dev_iobase, 0, regsize, in skd_attach()
4794 skdev->dev_memsize = (int)regsize; in skd_attach()
/titanic_50/usr/src/uts/common/io/tpm/
H A Dtpm.c1466 off_t regsize; in tpm_attach() local
1468 if ((ret = ddi_dev_regsize(tpm->dip, idx, &regsize)) != in tpm_attach()
1472 if (regsize == 0x5000) in tpm_attach()
/titanic_50/usr/src/uts/common/io/hxge/
H A Dhxge_main.c753 off_t regsize; in hxge_map_regs() local
770 (void) ddi_dev_regsize(hxgep->dip, 0, &regsize); in hxge_map_regs()
772 "hxge_map_regs: pci config size 0x%x", regsize)); in hxge_map_regs()
788 (void) ddi_dev_regsize(hxgep->dip, 1, &regsize); in hxge_map_regs()
790 "hxge_map_regs: pio size 0x%x", regsize)); in hxge_map_regs()
804 (void) ddi_dev_regsize(hxgep->dip, 2, &regsize); in hxge_map_regs()
806 "hxge_map_regs: msix size 0x%x", regsize)); in hxge_map_regs()
/titanic_50/usr/src/uts/common/io/nvme/
H A Dnvme.c2812 off_t regsize; in nvme_attach() local
2911 ddi_dev_regsize(dip, 1, &regsize) == DDI_FAILURE) in nvme_attach()
2914 if (ddi_regs_map_setup(dip, 1, &nvme->n_regs, 0, regsize, in nvme_attach()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_api.c811 off_t regsize; in ql_attach() local
999 if (ddi_dev_regsize(dip, size, &regsize) != in ql_attach()
1002 0, regsize, &ql_dev_acc_attr, &ha->dev_handle) != in ql_attach()
1020 if (ddi_dev_regsize(dip, 1, &regsize) != in ql_attach()
1023 &ha->iomap_iobase, 0, regsize, in ql_attach()
1192 if (ddi_dev_regsize(dip, 2, &regsize) != DDI_SUCCESS || in ql_attach()
1194 0, regsize, &ql_dev_acc_attr, &ha->db_dev_handle) != in ql_attach()