Home
last modified time | relevance | path

Searched refs:read_reg (Results 1 – 23 of 23) sorted by relevance

/titanic_50/usr/src/uts/common/io/e1000api/
H A De1000_phy.c86 phy->ops.read_reg = e1000_null_read_reg; in e1000_init_phy_ops_generic()
227 if (!phy->ops.read_reg) in e1000_get_phy_id()
231 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in e1000_get_phy_id()
237 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in e1000_get_phy_id()
1014 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data); in e1000_set_master_slave_mode()
1064 ret_val = hw->phy.ops.read_reg(hw, I82577_CFG_REG, &phy_data); in e1000_copper_link_setup_82577()
1078 ret_val = hw->phy.ops.read_reg(hw, I82577_PHY_CTRL_2, &phy_data); in e1000_copper_link_setup_82577()
1122 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_copper_link_setup_m88()
1195 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in e1000_copper_link_setup_m88()
1240 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in e1000_copper_link_setup_m88()
[all …]
H A De1000_82541.c103 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_82541()
391 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO, in e1000_init_hw_82541()
466 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data); in e1000_get_link_up_info_82541()
473 ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data); in e1000_get_link_up_info_82541()
705 ret_val = phy->ops.read_reg(hw, in e1000_config_dsp_after_link_change_82541()
729 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data); in e1000_config_dsp_after_link_change_82541()
735 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, in e1000_config_dsp_after_link_change_82541()
762 ret_val = phy->ops.read_reg(hw, 0x2F5B, in e1000_config_dsp_after_link_change_82541()
779 ret_val = phy->ops.read_reg(hw, in e1000_config_dsp_after_link_change_82541()
820 ret_val = phy->ops.read_reg(hw, 0x2F5B, &phy_saved_data); in e1000_config_dsp_after_link_change_82541()
[all …]
H A De1000_80003es2lan.c121 phy->ops.read_reg = e1000_read_phy_reg_gg82563_80003es2lan; in e1000_init_phy_params_80003es2lan()
670 if (!(hw->phy.ops.read_reg)) in e1000_phy_force_speed_duplex_80003es2lan()
676 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
687 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
726 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, in e1000_phy_force_speed_duplex_80003es2lan()
765 if (!(hw->phy.ops.read_reg)) in e1000_get_cable_length_80003es2lan()
768 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data); in e1000_get_cable_length_80003es2lan()
1050 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &data); in e1000_copper_link_setup_gg82563_80003es2lan()
1069 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL, &data); in e1000_copper_link_setup_gg82563_80003es2lan()
1126 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL_2, &data); in e1000_copper_link_setup_gg82563_80003es2lan()
[all …]
H A De1000_82571.c126 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_82571()
139 phy->ops.read_reg = e1000_read_phy_reg_m88; in e1000_init_phy_params_82571()
155 phy->ops.read_reg = e1000_read_phy_reg_bm2; in e1000_init_phy_params_82571()
487 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in e1000_get_phy_id_82571()
493 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in e1000_get_phy_id_82571()
994 if (!(phy->ops.read_reg)) in e1000_set_d0_lplu_state_82571()
997 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in e1000_set_d0_lplu_state_82571()
1009 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82571()
1028 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82571()
1041 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82571()
[all …]
H A De1000_82540.c82 phy->ops.read_reg = e1000_read_phy_reg_m88; in e1000_init_phy_params_82540()
430 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, in e1000_setup_copper_link_82540()
539 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_PAGE_SELECT, in e1000_set_vco_speed_82540()
548 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed_82540()
563 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed_82540()
H A De1000_ich8lan.c464 phy->ops.read_reg = e1000_read_phy_reg_hv; in e1000_init_phy_params_pchlan()
555 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_ich8lan()
570 phy->ops.read_reg = e1000_read_phy_reg_bm; in e1000_init_phy_params_ich8lan()
610 phy->ops.read_reg = e1000_read_phy_reg_bm; in e1000_init_phy_params_ich8lan()
1054 ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, &reg); in e1000_k1_workaround_lpt_lp()
1752 hw->phy.ops.read_reg(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg); in e1000_check_for_copper_link_ich8lan()
2592 ret_val = hw->phy.ops.read_reg(hw, HV_KMRN_MODE_CTRL, &data); in e1000_set_mdio_slow_mode_hv()
2766 hw->phy.ops.read_reg(hw, PHY_REG(769, 20), &phy_reg); in e1000_lv_jumbo_workaround_ich8lan()
2832 hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data); in e1000_lv_jumbo_workaround_ich8lan()
2838 hw->phy.ops.read_reg(hw, PHY_REG(769, 16), &data); in e1000_lv_jumbo_workaround_ich8lan()
[all …]
H A De1000_82575.c206 phy->ops.read_reg = e1000_read_phy_reg_sgmii_82575; in e1000_init_phy_params_82575()
213 phy->ops.read_reg = e1000_read_phy_reg_82580; in e1000_init_phy_params_82575()
218 phy->ops.read_reg = e1000_read_phy_reg_gs40g; in e1000_init_phy_params_82575()
222 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_82575()
263 ret_val = phy->ops.read_reg(hw, in e1000_init_phy_params_82575()
819 if (!(hw->phy.ops.read_reg)) in e1000_set_d0_lplu_state_82575()
822 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in e1000_set_d0_lplu_state_82575()
834 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82575()
852 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82575()
865 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82575()
[all …]
H A De1000_82543.c110 phy->ops.read_reg = (hw->mac.type == e1000_82543) in e1000_init_phy_params_82543()
802 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround_82543()
806 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_polarity_reversal_workaround_82543()
1411 if (!(hw->phy.ops.read_reg)) in e1000_config_mac_to_phy_82543()
1423 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in e1000_config_mac_to_phy_82543()
H A De1000_mac.c1389 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up_generic()
1392 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up_generic()
1407 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV, in e1000_config_fc_after_link_up_generic()
1411 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY, in e1000_config_fc_after_link_up_generic()
H A De1000_api.c980 if (hw->phy.ops.read_reg) in e1000_read_phy_reg()
981 return hw->phy.ops.read_reg(hw, offset, data); in e1000_read_phy_reg()
H A De1000_i210.c777 ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data); in __e1000_access_xmdio_reg()
H A De1000_hw.h743 s32 (*read_reg)(struct e1000_hw *, u32, u16 *); member
/titanic_50/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_x550.c646 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_EEE_ADVT, in ixgbe_setup_eee_X550()
684 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_EEE_ADVT, in ixgbe_setup_eee_X550()
1249 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG, in ixgbe_get_lasi_ext_t_x550em()
1258 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG, in ixgbe_get_lasi_ext_t_x550em()
1268 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1, in ixgbe_get_lasi_ext_t_x550em()
1282 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG, in ixgbe_get_lasi_ext_t_x550em()
1298 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG, in ixgbe_get_lasi_ext_t_x550em()
1306 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2, in ixgbe_get_lasi_ext_t_x550em()
1338 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK, in ixgbe_enable_lasi_ext_t_x550em()
1353 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK, in ixgbe_enable_lasi_ext_t_x550em()
[all …]
H A Dixgbe_phy.c325 phy->ops.read_reg = ixgbe_read_phy_reg_generic; in ixgbe_init_phy_ops_generic()
384 hw->phy.ops.read_reg(hw, in ixgbe_identify_phy_generic()
459 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, in ixgbe_validate_phy_addr()
481 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, in ixgbe_get_phy_id()
487 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW, in ixgbe_get_phy_id()
577 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, in ixgbe_reset_phy_generic()
820 hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_generic()
836 hw->phy.ops.read_reg(hw, in ixgbe_setup_phy_link_generic()
854 hw->phy.ops.read_reg(hw, in ixgbe_setup_phy_link_generic()
873 hw->phy.ops.read_reg(hw, in ixgbe_setup_phy_link_generic()
[all …]
H A Dixgbe_82598.c614 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS, in ixgbe_validate_link_ready()
658 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); in ixgbe_check_mac_link_82598()
659 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); in ixgbe_check_mac_link_82598()
660 hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV, in ixgbe_check_mac_link_82598()
672 hw->phy.ops.read_reg(hw, 0xC79F, in ixgbe_check_mac_link_82598()
675 hw->phy.ops.read_reg(hw, 0xC00C, in ixgbe_check_mac_link_82598()
1240 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_get_supported_physical_layer_82598()
H A Dixgbe_common.c261 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_setup_fc_generic()
579 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL, in ixgbe_clear_hw_cntrs_generic()
581 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH, in ixgbe_clear_hw_cntrs_generic()
583 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL, in ixgbe_clear_hw_cntrs_generic()
585 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH, in ixgbe_clear_hw_cntrs_generic()
2985 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_fc_autoneg_copper()
2988 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP, in ixgbe_fc_autoneg_copper()
H A Dixgbe_x540.c327 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_get_supported_physical_layer_X540()
H A Dixgbe_api.c536 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, in ixgbe_read_phy_reg()
H A Dixgbe_82599.c2178 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_get_supported_physical_layer_82599()
H A Dixgbe_type.h3753 s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *); member
/titanic_50/usr/src/uts/common/io/audio/drv/audiols/
H A Daudiols.c175 read_reg(audigyls_dev_t *dev, int reg) in read_reg() function
255 tmp = read_reg(dev, I2C_A) & ~0x6fe; in audigyls_i2c_write()
262 tmp = read_reg(dev, I2C_A); in audigyls_i2c_write()
285 tmp = read_reg(dev, SPI); in audigyls_spi_write()
292 tmp = read_reg(dev, SPI); in audigyls_spi_write()
355 tmp = read_reg(dev, SA); in audigyls_start()
366 tmp = read_reg(dev, SA); in audigyls_start()
387 tmp = read_reg(dev, SA); in audigyls_stop()
395 tmp = read_reg(dev, SA); in audigyls_stop()
/titanic_50/usr/src/uts/common/io/audio/drv/audiop16x/
H A Daudiop16x.c132 read_reg(p16x_dev_t *dev, int reg, int chn) in read_reg() function
319 offset = read_reg(dev, CPFA, 0); in p16x_count()
321 offset = read_reg(dev, CRFA, 0); in p16x_count()
/titanic_50/usr/src/uts/common/io/e1000g/
H A De1000g_workarounds.c237 ret_val = hw->phy.ops.read_reg(hw, in e1000_igp_ttl_workaround_82547()