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Searched refs:rax (Results 1 – 25 of 105) sorted by relevance

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/titanic_50/usr/src/common/bignum/amd64/
H A Dbignum_amd64_asm.s238 xorq %rax, %rax / if (len == 0) return (0)
248 movq 0(%rsi), %rax / rax = a[0]
252 addq %r10, %rax
255 addq %r9, %rax
257 movq %rax, 0(%rdi) / r[0] = lo(p)
260 movq %r11, %rax
263 addq %r10, %rax
266 addq %r9, %rax
268 movq %rax, 8(%rdi) / r[1] = lo(p)
271 movq %r11, %rax
[all …]
/titanic_50/usr/src/uts/intel/kdi/amd64/
H A Dkdi_asm.s58 movq %rbx, %rax; \
63 addq (%rdx), %rax
76 movq %r11, KRS_IDT(%rax); \
78 movq %r11, KRS_GDT(%rax); \
92 orq %rax, %rdx; \
97 movq %rdx, %rax; \
116 movq %rax, REG_OFF(KDIREG_RAX)(base); \
126 movq REG_OFF(KDIREG_RIP)(base), %rax; \
127 movq %rax, REG_OFF(KDIREG_SAVPC)(base); \
128 clrq %rax; \
[all …]
/titanic_50/usr/src/lib/libc/amd64/unwind/
H A Dunwind_frame.s69 movq %rsi,%rax
70 movq 40(%rax),%rdi /* set handler parameters */
71 movq 32(%rax),%rsi
72 movq 8(%rax),%rdx
73 movq 16(%rax),%rcx
74 movq 24(%rax),%rbx /* restore preserved registers */
75 movq 96(%rax),%r12
76 movq 104(%rax),%r13
77 movq 112(%rax),%r14
78 movq 120(%rax),%r15
[all …]
/titanic_50/usr/src/lib/libc/amd64/gen/
H A Dmemcmp.s103 mov (%rsi), %rax
104 cmp (%rdi), %rax
138 mov (%rsi), %rax
142 sub (%rdi), %rax
147 or %rax, %r8
213 mov (%rsi), %rax
215 sub (%rdi), %rax
217 or %r8, %rax
225 or %r9, %rax
228 mov 32 (%rsi), %rax
[all …]
H A Dabs.s51 movq %rdi, %rax
52 testq %rax, %rax /* arg < 0? */
54 negq %rax /* yes, return -arg */
60 movq %rdi, %rax
61 testq %rax, %rax /* arg < 0? */
63 negq %rax /* yes, return -arg */
H A Dbyteorder.s46 movq %rdi, %rax /* %rax = hll */
47 bswapq %rax /* reverses the byte order of %rax */
52 movq %rdi, %rax /* %rax = hll */
53 bswapq %rax /* reverses the byte order of %rax */
117 movq %rdi, %rax /* %rax = hll */
118 bswapq %rax /* reverses the byte order of %rax */
170 movq %rdi, %rax /* %rax = hll */
171 bswapq %rax /* reverses the byte order of %rax */
176 movq %rdi, %rax /* %rax = hll */
177 bswapq %rax /* reverses the byte order of %rax */
H A Dwschr.s43 movq %rdi,%rax
45 movl (%rax),%edx / %edx = wchar of string
51 movl 4(%rax),%edx / %edx = wchar of string
57 movl 8(%rax),%edx / %edx = wchar of string
63 movl 12(%rax),%edx / %edx = wchar of string
66 addq $16,%rax
71 xorl %eax,%eax / %rax = NULL
75 addq $12,%rax
78 addq $8,%rax
81 addq $4,%rax
H A Dstrlen.s102 lea -16(%rdi, %rsi), %rax /* calculate exact offset */
104 lea (%rax, %rcx),%rax
112 lea -16(%rdi, %rsi), %rax
136 add $7, %rax
141 add $8, %rax
162 add $7, %rax
172 add $1, %rax
177 add $2, %rax
182 add $3, %rax
187 add $4, %rax
[all …]
H A Dsetjmp.s67 movq %fs:UL_SIGLINK, %rax
69 testq %rax, %rax /* are we in a signal handler? */
86 movq 48(%rdi), %rax /* test low-order bit in the saved %rsp */
87 testq $1, %rax
91 subq $1, %rax /* clear the flag bit */
92 1: movq %rax, %rsp
/titanic_50/usr/src/lib/commpage/amd64/
H A Dcp_subr.s55 orq %rdx, %rax
68 addq %rdx, %rax
128 orq %rdx, %rax
142 addq %rdx, %rax
189 movq CP_TSC_LAST(%rdi), %rax
191 movq %rax, (%rsp)
228 subq %rdx, %rax /* delta = tsc - tsc_last */
241 shrdq $_CONST(32 - NSEC_SHIFT), %rdx, %rax
243 addq %r8, %rax
249 movq %rax, %r9 /* save (tsc - tsc_last) in r9 */
[all …]
/titanic_50/usr/src/lib/libc/amd64/threads/
H A Dasm_subr.s39 movq %rax, %rdi
141 xorq %rax, %rax
143 movq %rax, REGOFF(REG_CS) (%rsp)
146 movq %rax, REGOFF(REG_SS) (%rsp)
148 movq %rax, REGOFF(REG_FS) (%rsp)
150 movq %rax, REGOFF(REG_GS) (%rsp)
152 movq %rax, REGOFF(REG_ES) (%rsp)
154 movq %rax, REGOFF(REG_DS) (%rsp)
155 movq %fs:0, %rax
156 movq %rax, REGOFF(REG_FSBASE) (%rsp)
[all …]
H A Dtls_get_addr.s55 movq %fs:UL_TLSENT, %rax
61 movq TLS_DATA (%rax,%rdx), %rax
62 testq %rax, %rax
64 addq TI_TLSOFFSET (%rdi), %rax
/titanic_50/usr/src/lib/libm/amd64/src/
H A Dilogbl.s40 movq 16(%rsp),%rax / eax <-- sign and bexp of x
41 andq $0x7fff,%rax / eax <-- bexp(x)
46 cmpq $0x7fff,%rax
48 subq $16383,%rax / unbias exponent by 16383 = 0x3fff
52 movq $0x7fffffff,%rax / x is NaN/inf/unsup
56 movq 8(%rsp),%rax / rax <-- sgnfcnd(x)
57 orq %rax,%rax
59 movq $-2147483647,%rax / x is +/-0, so return 1-2^31
80 movq $0x7fff,%rax
81 andq 8(%rsp),%rax / eax <-- sign and bexp of x*2**63
[all …]
H A Dlocallibm.il61 andq $0x3,%rax
83 andq $0x3,%rax
95 movq $0x7fffffffffffffff,%rax
96 movdq %rax,%xmm2
103 movq $0x7fffffffffffffff,%rax
104 movdq %rax,%xmm1
118 movq $0x7fffffffffffffff,%rax
119 andq %rcx,%rax
121 subq %rcx,%rax
122 shrq $63,%rax
[all …]
H A Drndintl.s34 movq %rsp,%rax
36 fstcw -8(%rax)
37 fldt 8(%rax)
38 movw -8(%rax),%cx
40 movw %cx,-4(%rax)
41 fldcw -4(%rax) / set RD = to_zero
43 fstcw -4(%rax)
44 movw -4(%rax),%dx
46 movw -8(%rax),%cx
49 movw %cx,-8(%rax)
[all …]
H A Dieee_funcl.s36 andq $0x7fff,%rax
38 movq $0,%rax
47 movq $1,%rax
63 andq $0x7fff,%rax / eax <-- zero_xtnd(not(bexp(x)))
65 xorq $0x7fff,%rax / treat pseudo-denormal as subnormal
67 movq $1,%rax
/titanic_50/usr/src/uts/intel/ia32/ml/
H A Dcopy.s217 movq (src, cnt, 8), %rax; \
219 movnti %rax, (dst, cnt, 8); \
1180 L(P0Q9): mov %rax, -0x48(%rdi)
1181 L(P0Q8): mov %rax, -0x40(%rdi)
1182 L(P0Q7): mov %rax, -0x38(%rdi)
1183 L(P0Q6): mov %rax, -0x30(%rdi)
1184 L(P0Q5): mov %rax, -0x28(%rdi)
1185 L(P0Q4): mov %rax, -0x20(%rdi)
1186 L(P0Q3): mov %rax, -0x18(%rdi)
1187 L(P0Q2): mov %rax, -0x10(%rdi)
[all …]
H A Dexception.s174 movq %rax, %r15 /* %db6 -> %r15 */
181 movq %rax, %db6
219 movq %rax, REGOFF_RAX(%rsp); \
231 movq (%rdx, %rbx, CLONGSIZE), %rax; /* get cpu[i] */ \
232 cmpq $0x0, %rax; /* cpu[i] == NULL ? */ \
234 cmpq %rcx, CPU_GDT(%rax); /* gdt == cpu[i]->cpu_gdt ? */ \
248 movq %rax, %rdx; /* write base register */ \
254 movq REGOFF_RAX(%rbp), %rax; \
286 TRACE_PTR(%r12, %rax, %eax, %rdx, $TT_TRAP)
287 TRACE_REGS(%r12, %rsp, %rax, %rbx)
[all …]
H A Dswtch.s135 movq %rax, %r14;
150 movq T_INTR_START(thread_t), %rax; \
238 movq %gs:CPU_THREAD, %rax
247 SAVE_REGS(%rax, %r11)
281 movq CPU_IDLE_THREAD(%r15), %rax /* idle thread pointer */
286 movq T_SP(%rax), %rsp /* It is safe to set rsp */
287 movq %rax, CPU_THREAD(%r15)
349 movq T_STACK(%r12), %rax
350 addq $REGSIZE+MINFRAME, %rax /* to the bottom of thread stack */
352 movq %rax, TSS_RSP0(%r14)
[all …]
/titanic_50/usr/src/lib/libc/amd64/sys/
H A Dgetcontext.s60 movq offset+0(%rsp), %rax; \
62 movq %rax, RIP_OFF (%rdx); \
64 leaq offset+8(%rsp), %rax; \
66 movq %rax, RSP_OFF (%rdx); \
68 xorq %rax, %rax; /* return 0 */ \
69 movq %rax, RAX_OFF (%rdx); \
/titanic_50/usr/src/uts/i86pc/ml/
H A Damd64.il36 movq %cr3, %rax
58 movq %cr8, %rax
88 popq %rax
94 popq %rax
102 popq %rax
127 xorq %rax, %rax
133 xorq %rax, %rax
139 xorq %rax, %rax
145 movq %rsi, %rax
151 movq %rsi, %rax
[all …]
H A Dbios_call_src.s48 #define MOVCR(x, y) movq x,%rax; movq %rax, y
49 #define LOAD_XAX(sym) leaq sym, %rax
158 movq %cr8, %rax
159 movq %rax, save_cr8
212 movq %rsp, %rax
214 pushq %rax
396 movzwq save_tr, %rax
397 addq save_gdt+2, %rax
398 btcl $1, 5(%rax)
437 movq save_cr8, %rax
[all …]
/titanic_50/usr/src/common/atomic/amd64/
H A Datomic.s111 xorq %rax, %rax / %rax = 0
112 incq %rax / %rax = 1
114 xaddq %rax, (%rdi) / %rax = old value, (%rdi) = new value
115 incq %rax / return new value
187 xorq %rax, %rax / %rax = 0
188 decq %rax / %rax = -1
190 xaddq %rax, (%rdi) / %rax = old value, (%rdi) = new value
191 decq %rax / return new value
327 mov %rsi, %rax / %rax = delta addend
330 addq %rsi, %rax / new value = original value + delta
[all …]
/titanic_50/usr/src/uts/i86xpv/ml/
H A Dpanic_asm.s67 movq %cr3, %rax
87 movq %rax, REGOFF_RAX(%rsp)
89 movq %rsp, %rax
90 addq $REGSIZE, %rax
91 movq (%rax), %rbx
93 movq 8(%rax), %rbx
95 movq 16(%rax), %rbx
97 movq 24(%rax), %rbx
99 movq 32(%rax), %rbx
101 movq 40(%rax), %rbx
[all …]
/titanic_50/usr/src/lib/libc/amd64/inc/
H A DSYS.h93 xorq %rax, %rax; \
128 xorq %rax, %rax; \
214 movq %rdx, %rax; \
221 xorq %rax, %rax; \

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