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Searched refs:pipestat (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/intel/io/drm/
H A Di915_irq.c150 if ((dev_priv->pipestat[pipe] & mask) != mask) { in i915_enable_pipestat()
153 dev_priv->pipestat[pipe] |= mask; in i915_enable_pipestat()
155 I915_WRITE(reg, dev_priv->pipestat[pipe] | (mask >> 16)); in i915_enable_pipestat()
163 if ((dev_priv->pipestat[pipe] & mask) != 0) { in i915_disable_pipestat()
166 dev_priv->pipestat[pipe] &= ~mask; in i915_disable_pipestat()
167 I915_WRITE(reg, dev_priv->pipestat[pipe]); in i915_disable_pipestat()
991 dev_priv->pipestat[0] = 0; in i915_driver_irq_postinstall()
992 dev_priv->pipestat[1] = 0; in i915_driver_irq_postinstall()
H A Di915_drv.h247 uint32_t pipestat[2]; member