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Searched refs:pcie_ue_hdr (Results 1 – 10 of 10) sorted by relevance

/titanic_50/usr/src/cmd/fm/modules/common/fabric-xlate/
H A Dfx_fire.c212 data->pcie_ue_hdr[0] = (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
213 data->pcie_ue_hdr[1] = (uint32_t)(reg); in fab_xlate_fire_ue()
216 data->pcie_ue_hdr[2] = (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
217 data->pcie_ue_hdr[3] = (uint32_t)(reg); in fab_xlate_fire_ue()
220 hdr = (pcie_tlp_hdr_t *)(&data->pcie_ue_hdr[0]); in fab_xlate_fire_ue()
229 data->pcie_ue_tgt_addr = data->pcie_ue_hdr[2]; in fab_xlate_fire_ue()
235 data->pcie_ue_tgt_bdf = data->pcie_ue_hdr[2] >> 16; in fab_xlate_fire_ue()
242 data->pcie_ue_hdr[0] = (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
243 data->pcie_ue_hdr[1] = (uint32_t)(reg); in fab_xlate_fire_ue()
246 data->pcie_ue_hdr[2] = (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
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H A Dfx_epkt.c187 data.pcie_ue_hdr[0] = (uint32_t)(epkt.hdr[0] >> 32); in fab_xlate_epkt_erpts()
188 data.pcie_ue_hdr[1] = (uint32_t)epkt.hdr[0]; in fab_xlate_epkt_erpts()
189 data.pcie_ue_hdr[2] = (uint32_t)(epkt.hdr[1] >> 32); in fab_xlate_epkt_erpts()
190 data.pcie_ue_hdr[3] = (uint32_t)(epkt.hdr[1]); in fab_xlate_epkt_erpts()
192 tlp_hdr = (pcie_tlp_hdr_t *)&data.pcie_ue_hdr[0]; in fab_xlate_epkt_erpts()
193 ptr = &data.pcie_ue_hdr[1]; in fab_xlate_epkt_erpts()
229 fmd_hdl_debug(hdl, "HEADER 0 0x%x", data.pcie_ue_hdr[0]); in fab_xlate_epkt_erpts()
230 fmd_hdl_debug(hdl, "HEADER 1 0x%x", data.pcie_ue_hdr[1]); in fab_xlate_epkt_erpts()
231 fmd_hdl_debug(hdl, "HEADER 2 0x%x", data.pcie_ue_hdr[2]); in fab_xlate_epkt_erpts()
232 fmd_hdl_debug(hdl, "HEADER 3 0x%x", data.pcie_ue_hdr[3]); in fab_xlate_epkt_erpts()
H A Dfx_fabric.c242 FAB_LOOKUP(32, "pcie_ue_hdr0", &data->pcie_ue_hdr[0]); in fab_pci_fabric_to_data()
243 FAB_LOOKUP(32, "pcie_ue_hdr1", &data->pcie_ue_hdr[1]); in fab_pci_fabric_to_data()
244 FAB_LOOKUP(32, "pcie_ue_hdr2", &data->pcie_ue_hdr[2]); in fab_pci_fabric_to_data()
245 FAB_LOOKUP(32, "pcie_ue_hdr3", &data->pcie_ue_hdr[3]); in fab_pci_fabric_to_data()
H A Dfabric-xlate.h103 uint32_t pcie_ue_hdr[4]; /* pcie ue header log */ member
/titanic_50/usr/src/uts/sun4v/io/px/
H A Dpx_err.c184 adv_reg.pcie_ue_hdr[0] = (uint32_t)(pec_p->hdr[0] >>32); in px_err_fill_pfd()
185 adv_reg.pcie_ue_hdr[1] = (uint32_t)(pec_p->hdr[0]); in px_err_fill_pfd()
186 adv_reg.pcie_ue_hdr[2] = (uint32_t)(pec_p->hdr[1] >>32); in px_err_fill_pfd()
187 adv_reg.pcie_ue_hdr[3] = (uint32_t)(pec_p->hdr[1]); in px_err_fill_pfd()
700 adv_reg.pcie_ue_hdr[0] = (uint32_t)(epkt->hdr[0] >> 32); in px_port_handle_errors()
701 adv_reg.pcie_ue_hdr[1] = (uint32_t)(epkt->hdr[0]); in px_port_handle_errors()
702 adv_reg.pcie_ue_hdr[2] = (uint32_t)(epkt->hdr[1] >> 32); in px_port_handle_errors()
703 adv_reg.pcie_ue_hdr[3] = (uint32_t)(epkt->hdr[1]); in px_port_handle_errors()
765 adv_reg.pcie_ue_hdr[0] = (uint32_t)(pec_p->hdr[0] >> 32); in px_pcie_epkt_severity()
766 adv_reg.pcie_ue_hdr[1] = (uint32_t)(pec_p->hdr[0]); in px_pcie_epkt_severity()
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/titanic_50/usr/src/uts/sun4/io/px/
H A Dpx_fm.c681 adv_reg.pcie_ue_hdr[0] = regs->rx_hdr1; in px_pcie_ptlp()
682 adv_reg.pcie_ue_hdr[1] = regs->rx_hdr2; in px_pcie_ptlp()
683 adv_reg.pcie_ue_hdr[2] = regs->rx_hdr3; in px_pcie_ptlp()
684 adv_reg.pcie_ue_hdr[3] = regs->rx_hdr4; in px_pcie_ptlp()
687 tlp_cmd = ((pcie_tlp_hdr_t *)(adv_reg.pcie_ue_hdr))->type; in px_pcie_ptlp()
704 adv_reg.pcie_ue_hdr[0] = regs->tx_hdr1; in px_pcie_ptlp()
705 adv_reg.pcie_ue_hdr[1] = regs->tx_hdr2; in px_pcie_ptlp()
706 adv_reg.pcie_ue_hdr[2] = regs->tx_hdr3; in px_pcie_ptlp()
707 adv_reg.pcie_ue_hdr[3] = regs->tx_hdr4; in px_pcie_ptlp()
/titanic_50/usr/src/uts/sun4u/io/px/
H A Dpx_err.c1890 adv_reg.pcie_ue_hdr[0] = (uint32_t)(data >> 32); in px_err_wuc_ruc_handle()
1891 adv_reg.pcie_ue_hdr[1] = (uint32_t)(data & 0xFFFFFFFF); in px_err_wuc_ruc_handle()
1893 adv_reg.pcie_ue_hdr[2] = (uint32_t)(data >> 32); in px_err_wuc_ruc_handle()
1894 adv_reg.pcie_ue_hdr[3] = (uint32_t)(data & 0xFFFFFFFF); in px_err_wuc_ruc_handle()
2218 adv_reg.pcie_ue_hdr[0] = (uint32_t)(rx_h1 >> 32); in PX_ERPT_SEND_DEC()
2219 adv_reg.pcie_ue_hdr[1] = (uint32_t)rx_h1; in PX_ERPT_SEND_DEC()
2220 adv_reg.pcie_ue_hdr[2] = (uint32_t)(rx_h2 >> 32); in PX_ERPT_SEND_DEC()
2221 adv_reg.pcie_ue_hdr[3] = (uint32_t)rx_h2; in PX_ERPT_SEND_DEC()
2224 cpl = (pcie_cpl_t *)&adv_reg.pcie_ue_hdr[1]; in PX_ERPT_SEND_DEC()
2232 adv_reg.pcie_ue_hdr[0] = (uint32_t)(tx_h1 >> 32); in PX_ERPT_SEND_DEC()
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/titanic_50/usr/src/uts/common/io/pciex/
H A Dpcie_fault.c2541 pcie_tlp_hdr_t *tlp_hdr = (pcie_tlp_hdr_t *)adv_reg_p->pcie_ue_hdr; in pf_tlp_decode()
2557 flt_addr = ((uint64_t)adv_reg_p->pcie_ue_hdr[2] << 32); in pf_tlp_decode()
2558 flt_addr |= adv_reg_p->pcie_ue_hdr[3]; in pf_tlp_decode()
2560 flt_addr = adv_reg_p->pcie_ue_hdr[2]; in pf_tlp_decode()
2563 tlp_bdf = (pcie_req_id_t)(adv_reg_p->pcie_ue_hdr[1] >> 16); in pf_tlp_decode()
2586 flt_bdf = (pcie_req_id_t)(adv_reg_p->pcie_ue_hdr[2] >> 16); in pf_tlp_decode()
2592 pcie_cpl_t *cpl_tlp = (pcie_cpl_t *)&adv_reg_p->pcie_ue_hdr[1]; in pf_tlp_decode()
2841 PCIE_ADV_REG(pfd_p)->pcie_ue_hdr[0], in pf_send_ereport()
2843 PCIE_ADV_REG(pfd_p)->pcie_ue_hdr[1], in pf_send_ereport()
2845 PCIE_ADV_REG(pfd_p)->pcie_ue_hdr[2], in pf_send_ereport()
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/titanic_50/usr/src/uts/common/sys/
H A Dpciev.h53 uint32_t pcie_ue_hdr[4]; /* pcie ue header log */ member
H A Dpcie_impl.h161 #define PCIE_ADV_HDR(pfd_p, n) PCIE_ADV_REG(pfd_p)->pcie_ue_hdr[n]
238 uint32_t pcie_ue_hdr[4]; /* pcie ue header log */ member