Home
last modified time | relevance | path

Searched refs:nchannels (Results 1 – 11 of 11) sorted by relevance

/titanic_50/usr/src/lib/fm/topo/modules/i86pc/chip/
H A Dchip_intel.c349 uint_t nchannels; in mc_nb_create() local
352 &nchannels) != 0) { in mc_nb_create()
362 nchannels = nchannels / nmc; in mc_nb_create()
370 nmc = nchannels / 2; in mc_nb_create()
371 nchannels = nchannels / nmc; in mc_nb_create()
404 channel + nchannels - 1) < 0) { in mc_nb_create()
409 for (j = 0; j < nchannels; j++) { in mc_nb_create()
/titanic_50/usr/src/uts/intel/io/intel_nhm/
H A Ddimm_topo.c195 int nchannels = CHANNELS_PER_MEMORY_CONTROLLER; in inhm_dimmlist() local
203 newchannel = kmem_zalloc(sizeof (nvlist_t *) * nchannels, KM_SLEEP); in inhm_dimmlist()
210 for (i = 0; i < nchannels; i++) { in inhm_dimmlist()
239 nchannels); in inhm_dimmlist()
240 for (i = 0; i < nchannels; i++) in inhm_dimmlist()
243 kmem_free(newchannel, sizeof (nvlist_t *) * nchannels); in inhm_dimmlist()
/titanic_50/usr/src/uts/intel/io/intel_nb5000/
H A Dintel_nbdrv.c226 int nchannels = nb_number_memory_controllers * nb_channels_per_branch; in inb_dimmlist() local
234 newchannel = kmem_zalloc(sizeof (nvlist_t *) * nchannels, KM_SLEEP); in inb_dimmlist()
236 for (i = 0; i < nchannels; i++) { in inb_dimmlist()
255 nchannels); in inb_dimmlist()
256 for (i = 0; i < nchannels; i++) in inb_dimmlist()
259 kmem_free(newchannel, sizeof (nvlist_t *) * nchannels); in inb_dimmlist()
H A Dnb5000_init.c245 int nchannels = nb_number_memory_controllers * nb_channels_per_branch; in nb_fini() local
250 for (i = 0; i < nchannels; i++) { in nb_fini()
1557 int nchannels = nb_number_memory_controllers * 2; in nb_dev_reinit() local
1585 for (i = 0; i < nchannels; i++) { in nb_dev_reinit()
/titanic_50/usr/src/uts/common/sys/
H A Dbscv_impl.h176 int nchannels; member
/titanic_50/usr/src/uts/common/io/
H A Dbscv.c862 ssp->nchannels = 0; in bscv_map_regs()
895 ssp->nchannels = nelements / LOMBUS_REGSPEC_SIZE; in bscv_map_regs()
901 for (i = 0; i < ssp->nchannels; i++) { in bscv_map_regs()
928 ssp->nchannels = 0; in bscv_map_regs()
939 for (i = 0; i < ssp->nchannels; i++) { in bscv_unmap_regs()
966 if (ssp->nchannels > 2) in bscv_map_chan_logical_physical()
968 if (ssp->nchannels > 3) in bscv_map_chan_logical_physical()
970 if (ssp->nchannels > 4) in bscv_map_chan_logical_physical()
1532 } else if (ssp->nchannels == 0) { in bscv_put8_once()
1590 } else if (ssp->nchannels == 0) { in bscv_get8_once()
[all …]
/titanic_50/usr/src/uts/common/io/mwl/
H A Dmwl.c1318 ci->nchannels = j; in get2Ghz()
1351 ci->nchannels = j; in get5Ghz()
1490 for (i = 0; i < ci->nchannels; i++) { in addht40channels()
1524 for (i = 0; i < ci->nchannels; i++) { in addchannels()
2593 hc = ((unsigned)i < ci->nchannels) ? &ci->channels[i] : NULL; in findhalchannel()
2603 for (i = 0; i < ci->nchannels; i++) in findhalchannel()
2606 hc = (i < ci->nchannels) ? &ci->channels[i] : NULL; in findhalchannel()
H A Dmwl_var.h248 int nchannels; member
/titanic_50/usr/src/uts/sun4u/starfire/io/
H A Didn.c1113 if (idn.nchannels > 0) in idn_size_check()
1115 ((idn.nchannels - 1) * IDN_WINDOW_INCR); in idn_size_check()
1393 idn.nchannels = 0; in idn_deinit()
2659 idn.nchannels); in idn_get_net_binding()
2661 if (idn.nchannels == 0) in idn_get_net_binding()
4125 if (!idn.nchannels) { in idn_mboxtbl_report()
4401 idn.nchannels, nactive, IDN_MAX_NETS); in idn_global_report()
H A Didn_proto.c12236 idn.nchannels++; in idn_open_channel()
12246 ASSERT(idn.nchannels > 0); in idn_open_channel()
12248 ((idn.nchannels - 1) * IDN_WINDOW_INCR); in idn_open_channel()
12251 proc, channel, idn.nchannels); in idn_open_channel()
12301 idn.nchannels--; in idn_close_channel()
12307 if (idn.nchannels <= 0) in idn_close_channel()
12311 ((idn.nchannels - 1) * IDN_WINDOW_INCR); in idn_close_channel()
12318 idn.nchannels); in idn_close_channel()
/titanic_50/usr/src/uts/sun4u/starfire/sys/
H A Didn.h2785 int nchannels; /* grwlock */ member