1 2 /* 3 * CDDL HEADER START 4 * 5 * The contents of this file are subject to the terms of the 6 * Common Development and Distribution License (the "License"). 7 * You may not use this file except in compliance with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 * 22 * Copyright 2014 QLogic Corporation 23 * The contents of this file are subject to the terms of the 24 * QLogic End User License (the "License"). 25 * You may not use this file except in compliance with the License. 26 * 27 * You can obtain a copy of the License at 28 * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/ 29 * QLogic_End_User_Software_License.txt 30 * See the License for the specific language governing permissions 31 * and limitations under the License. 32 * 33 * 34 * Generated On Date: 02/17/2011 13:14 35 * 36 */ 37 #ifndef MCP_FIO_H 38 #define MCP_FIO_H 39 40 /* 41 * mcp_fio definition 42 * offset: 0x80000000 43 */ 44 typedef struct mcp_fio 45 { 46 u32_t mcpf_events_bits; 47 #define MCPF_EVENTS_BITS_FTQ0_VALID (1L<<0) 48 #define MCPF_EVENTS_BITS_FTQ1_VALID (1L<<1) 49 #define MCPF_EVENTS_BITS_UMP_EVENT (1L<<2) 50 #define MCPF_EVENTS_BITS_SMBUS_EVENT (1L<<3) 51 #define MCPF_EVENTS_BITS_FLASH_EVENT (1L<<4) 52 #define MCPF_EVENTS_BITS_MCP_DOORBELL (1L<<5) 53 #define MCPF_EVENTS_BITS_HFTQ0_VALID (1L<<6) 54 #define MCPF_EVENTS_BITS_HFTQ1_VALID (1L<<7) 55 #define MCPF_EVENTS_BITS_EXP_ROM (1L<<8) 56 #define MCPF_EVENTS_BITS_VPD (1L<<9) 57 #define MCPF_EVENTS_BITS_FLASH (1L<<10) 58 #define MCPF_EVENTS_BITS_SMB0 (1L<<11) 59 #define MCPF_EVENTS_BITS_NIG (1L<<12) 60 #define MCPF_EVENTS_BITS_RESERVED0 (1L<<13) 61 #define MCPF_EVENTS_BITS_RESERVED1 (1L<<14) 62 #define MCPF_EVENTS_BITS_GPIO0 (1L<<15) 63 #define MCPF_EVENTS_BITS_GPIO1 (1L<<16) 64 #define MCPF_EVENTS_BITS_GPIO2 (1L<<17) 65 #define MCPF_EVENTS_BITS_GPIO3 (1L<<18) 66 #define MCPF_EVENTS_BITS_SW_TMR_1 (1L<<19) 67 #define MCPF_EVENTS_BITS_SW_TMR_2 (1L<<20) 68 #define MCPF_EVENTS_BITS_SW_TMR_3 (1L<<21) 69 #define MCPF_EVENTS_BITS_SW_TMR_4 (1L<<22) 70 #define MCPF_EVENTS_BITS_MSI (1L<<23) 71 #define MCPF_EVENTS_BITS_RESERVED2 (1L<<24) 72 #define MCPF_EVENTS_BITS_RESERVED3 (1L<<25) 73 #define MCPF_EVENTS_BITS_RESERVED4 (1L<<26) 74 #define MCPF_EVENTS_BITS_MAIN_PWR_INT (1L<<27) 75 #define MCPF_EVENTS_BITS_NOT_ENABLED (1L<<30) 76 #define MCPF_EVENTS_BITS_ATTENTIONS_VALID (1L<<31) 77 78 u32_t mcpf_attentions_bits; 79 #define MCPF_ATTENTIONS_BITS_GRC_TIMEOUT (1L<<0) 80 #define MCPF_ATTENTIONS_BITS_PERST_ASSERTION (1L<<1) 81 #define MCPF_ATTENTIONS_BITS_SPAD_PARITY_ERR (1L<<2) 82 #define MCPF_ATTENTIONS_BITS_SPIO5 (1L<<3) 83 #define MCPF_ATTENTIONS_BITS_RSV_ACCESS (1L<<4) 84 #define MCPF_ATTENTIONS_BITS_PFC_PORT_0 (1L<<5) 85 #define MCPF_ATTENTIONS_BITS_PFC_PORT_1 (1L<<6) 86 87 u32_t mcpf_event_enable; 88 u32_t mcpf_attention_enable; 89 u32_t mcpf_fio_status; 90 #define MCPF_FIO_STATUS_ENABLED (1L<<0) 91 #define MCPF_FIO_STATUS_FORCE_ENA (1L<<1) 92 93 u32_t mcpf_interrupt_status; 94 #define MCPF_INTERRUPT_STATUS_EVENT0_E0 (1L<<0) 95 #define MCPF_INTERRUPT_STATUS_ATTN0_E0 (1L<<1) 96 #define MCPF_INTERRUPT_STATUS_EVENT1_E0 (1L<<2) 97 #define MCPF_INTERRUPT_STATUS_ATTN1_E0 (1L<<3) 98 #define MCPF_INTERRUPT_STATUS_EVENT0_E1 (1L<<4) 99 #define MCPF_INTERRUPT_STATUS_ATTN0_E1 (1L<<5) 100 #define MCPF_INTERRUPT_STATUS_EVENT1_E1 (1L<<6) 101 #define MCPF_INTERRUPT_STATUS_ATTN1_E1 (1L<<7) 102 103 u32_t mcpf_unused_a[2]; 104 u32_t mcpf_unused_b[8]; 105 u32_t mcpf_mcp_hc_inc_stat[8]; 106 u32_t mcpf_unused_c[4]; 107 u32_t mcpf_free_counter_value; 108 u32_t mcpf_unused_d[18]; 109 u32_t mcpf_mcp_vfid; 110 #define MCPF_MCP_VFID_VFID (0x3fL<<0) 111 #define MCPF_MCP_VFID_VFID_VALID (1L<<16) 112 #define MCPF_MCP_VFID_PATHID (1L<<20) 113 #define MCPF_MCP_VFID_FIO_REG_EN (1L<<30) 114 #define MCPF_MCP_VFID_PATH_FORCE (1L<<31) 115 116 u32_t mcpf_unused1[16]; 117 u32_t mcpf_mcpq_bits_status1; 118 #define MCPF_MCPQ_BITS_STATUS1_BRCST (1L<<0) 119 #define MCPF_MCPQ_BITS_STATUS1_MLCST (1L<<1) 120 #define MCPF_MCPQ_BITS_STATUS1_UNCST (1L<<2) 121 #define MCPF_MCPQ_BITS_STATUS1_MAC0 (1L<<3) 122 #define MCPF_MCPQ_BITS_STATUS1_MAC1 (1L<<4) 123 #define MCPF_MCPQ_BITS_STATUS1_MAC2 (1L<<5) 124 #define MCPF_MCPQ_BITS_STATUS1_ARP (1L<<6) 125 #define MCPF_MCPQ_BITS_STATUS1_IP0 (1L<<7) 126 #define MCPF_MCPQ_BITS_STATUS1_IP1 (1L<<8) 127 #define MCPF_MCPQ_BITS_STATUS1_IP2 (1L<<9) 128 #define MCPF_MCPQ_BITS_STATUS1_NTBS_U_SRC (1L<<10) 129 #define MCPF_MCPQ_BITS_STATUS1_NTBS_T_SRC (1L<<11) 130 #define MCPF_MCPQ_BITS_STATUS1_RMCP (1L<<12) 131 #define MCPF_MCPQ_BITS_STATUS1_DHCP (1L<<13) 132 #define MCPF_MCPQ_BITS_STATUS1_NTBS_U_DST (1L<<14) 133 #define MCPF_MCPQ_BITS_STATUS1_UDP0 (1L<<15) 134 #define MCPF_MCPQ_BITS_STATUS1_UDP1 (1L<<16) 135 #define MCPF_MCPQ_BITS_STATUS1_UDP2 (1L<<17) 136 #define MCPF_MCPQ_BITS_STATUS1_NTBS_T_DST (1L<<18) 137 #define MCPF_MCPQ_BITS_STATUS1_TCP0 (1L<<19) 138 #define MCPF_MCPQ_BITS_STATUS1_TCP1 (1L<<20) 139 #define MCPF_MCPQ_BITS_STATUS1_TCP2 (1L<<21) 140 #define MCPF_MCPQ_BITS_STATUS1_VLAN_ID0 (1L<<22) 141 #define MCPF_MCPQ_BITS_STATUS1_VLAN_ID1 (1L<<23) 142 #define MCPF_MCPQ_BITS_STATUS1_VLAN_ID2 (1L<<24) 143 #define MCPF_MCPQ_BITS_STATUS1_VLAN (1L<<25) 144 #define MCPF_MCPQ_BITS_STATUS1_NO_VLAN (1L<<26) 145 #define MCPF_MCPQ_BITS_STATUS1_L2_CRC (1L<<27) 146 147 u16_t mcpf_mcpq_pkt_len; 148 #define MCPF_MCPQ_PKT_LEN_MASK (0x3fff<<0) 149 150 u16_t mcpf_mcpq_vlan_tag; 151 u32_t mcpf_mcpq_bits_status2; 152 #define MCPF_MCPQ_BITS_STATUS2_CLUSTER_MASK (0x3L<<0) 153 #define MCPF_MCPQ_BITS_STATUS2_MF_OUTER_VLAN (1L<<2) 154 #define MCPF_MCPQ_BITS_STATUS2_MF_NO_OUTER_VLAN (1L<<3) 155 #define MCPF_MCPQ_BITS_STATUS2_MF_OUTER_VLAN_ID (1L<<4) 156 #define MCPF_MCPQ_BITS_STATUS2_MF_MAC3 (1L<<5) 157 #define MCPF_MCPQ_BITS_STATUS2_MF_IPV6_MLCST (1L<<6) 158 #define MCPF_MCPQ_BITS_STATUS2_OUTER_VLAN_MASK (0xffffL<<7) 159 #define MCPF_MCPQ_BITS_STATUS2_MAC4 (1L<<23) 160 #define MCPF_MCPQ_BITS_STATUS2_MAC5 (1L<<24) 161 162 u32_t mcpf_mcpq_bits_status3; 163 #define MCPF_MCPQ_BITS_STATUS3_ETYPE0 (1L<<1) 164 #define MCPF_MCPQ_BITS_STATUS3_ETYPE1 (1L<<2) 165 #define MCPF_MCPQ_BITS_STATUS3_ALL_MLCST (1L<<3) 166 #define MCPF_MCPQ_BITS_STATUS3_ARP (1L<<7) 167 #define MCPF_MCPQ_BITS_STATUS3_ICMPV4 (1L<<8) 168 #define MCPF_MCPQ_BITS_STATUS3_ICMPV6 (1L<<9) 169 #define MCPF_MCPQ_BITS_STATUS3_LLDP (1L<<11) 170 #define MCPF_MCPQ_BITS_STATUS3_VNTAG0 (1L<<12) 171 #define MCPF_MCPQ_BITS_STATUS3_VNTAG1 (1L<<13) 172 #define MCPF_MCPQ_BITS_STATUS3_PF0_VLAN (1L<<16) 173 #define MCPF_MCPQ_BITS_STATUS3_PF1_VLAN (1L<<18) 174 175 u32_t mcpf_unused_h[10]; 176 u32_t mcpf_mcpq_cmd; 177 #define MCPF_MCPQ_CMD_MCPQ_CMD_POP (1L<<30) 178 179 u32_t mcpf_unused_hh[1]; 180 u32_t mcpf_hmcpq_bits_status1; 181 #define MCPF_HMCPQ_BITS_STATUS1_BRCST (1L<<0) 182 #define MCPF_HMCPQ_BITS_STATUS1_MLCST (1L<<1) 183 #define MCPF_HMCPQ_BITS_STATUS1_UNCST (1L<<2) 184 #define MCPF_HMCPQ_BITS_STATUS1_MAC0 (1L<<3) 185 #define MCPF_HMCPQ_BITS_STATUS1_MAC1 (1L<<4) 186 #define MCPF_HMCPQ_BITS_STATUS1_MAC2 (1L<<5) 187 #define MCPF_HMCPQ_BITS_STATUS1_ARP (1L<<6) 188 #define MCPF_HMCPQ_BITS_STATUS1_IP0 (1L<<7) 189 #define MCPF_HMCPQ_BITS_STATUS1_IP1 (1L<<8) 190 #define MCPF_HMCPQ_BITS_STATUS1_IP2 (1L<<9) 191 #define MCPF_HMCPQ_BITS_STATUS1_NTBS_U_SRC (1L<<10) 192 #define MCPF_HMCPQ_BITS_STATUS1_NTBS_T_SRC (1L<<11) 193 #define MCPF_HMCPQ_BITS_STATUS1_RMCP (1L<<12) 194 #define MCPF_HMCPQ_BITS_STATUS1_DHCP (1L<<13) 195 #define MCPF_HMCPQ_BITS_STATUS1_NTBS_U_DST (1L<<14) 196 #define MCPF_HMCPQ_BITS_STATUS1_UDP0 (1L<<15) 197 #define MCPF_HMCPQ_BITS_STATUS1_UDP1 (1L<<16) 198 #define MCPF_HMCPQ_BITS_STATUS1_UDP2 (1L<<17) 199 #define MCPF_HMCPQ_BITS_STATUS1_NTBS_T_DST (1L<<18) 200 #define MCPF_HMCPQ_BITS_STATUS1_TCP0 (1L<<19) 201 #define MCPF_HMCPQ_BITS_STATUS1_TCP1 (1L<<20) 202 #define MCPF_HMCPQ_BITS_STATUS1_TCP2 (1L<<21) 203 #define MCPF_HMCPQ_BITS_STATUS1_VLAN_ID0 (1L<<22) 204 #define MCPF_HMCPQ_BITS_STATUS1_VLAN_ID1 (1L<<23) 205 #define MCPF_HMCPQ_BITS_STATUS1_VLAN_ID2 (1L<<24) 206 #define MCPF_HMCPQ_BITS_STATUS1_VLAN (1L<<25) 207 #define MCPF_HMCPQ_BITS_STATUS1_NO_VLAN (1L<<26) 208 #define MCPF_HMCPQ_BITS_STATUS1_L2_CRC (1L<<27) 209 210 u16_t mcpf_hmcpq_pkt_len; 211 #define MCPF_HMCPQ_PKT_LEN_MASK (0x3fff<<0) 212 213 u16_t mcpf_hmcpq_vlan_tag; 214 u32_t mcpf_hmcpq_bits_status2; 215 #define MCPF_HMCPQ_BITS_STATUS2_CLUSTER_MASK (0x3L<<0) 216 #define MCPF_HMCPQ_BITS_STATUS2_MF_OUTER_VLAN (1L<<2) 217 #define MCPF_HMCPQ_BITS_STATUS2_MF_NO_OUTER_VLAN (1L<<3) 218 #define MCPF_HMCPQ_BITS_STATUS2_MF_OUTER_VLAN_ID (1L<<4) 219 #define MCPF_HMCPQ_BITS_STATUS2_MF_MAC3 (1L<<5) 220 #define MCPF_HMCPQ_BITS_STATUS2_MF_IPV6_MLCST (1L<<6) 221 #define MCPF_HMCPQ_BITS_STATUS2_OUTER_VLAN_MASK (0xffffL<<7) 222 #define MCPF_HMCPQ_BITS_STATUS2_MAC4 (1L<<23) 223 #define MCPF_HMCPQ_BITS_STATUS2_MAC5 (1L<<24) 224 225 u32_t mcpf_hmcpq_bits_status3; 226 #define MCPF_HMCPQ_BITS_STATUS3_ETYPE0 (1L<<1) 227 #define MCPF_HMCPQ_BITS_STATUS3_ETYPE1 (1L<<2) 228 #define MCPF_HMCPQ_BITS_STATUS3_ALL_MLCST (1L<<3) 229 #define MCPF_HMCPQ_BITS_STATUS3_ARP (1L<<7) 230 #define MCPF_HMCPQ_BITS_STATUS3_ICMPV4 (1L<<8) 231 #define MCPF_HMCPQ_BITS_STATUS3_ICMPV6 (1L<<9) 232 #define MCPF_HMCPQ_BITS_STATUS3_LLDP (1L<<11) 233 #define MCPF_HMCPQ_BITS_STATUS3_VNTAG0 (1L<<12) 234 #define MCPF_HMCPQ_BITS_STATUS3_VNTAG1 (1L<<13) 235 #define MCPF_HMCPQ_BITS_STATUS3_PF0_VLAN (1L<<16) 236 #define MCPF_HMCPQ_BITS_STATUS3_PF1_VLAN (1L<<18) 237 238 u32_t mcpf_unused_hj[10]; 239 u32_t mcpf_hmcpq_cmd; 240 #define MCPF_HMCPQ_CMD_HMCPQ_CMD_POP (1L<<30) 241 242 u32_t mcpf_unused_i[39073]; 243 u32_t mcpf_nvm_command; 244 #define MCPF_NVM_COMMAND_RST (1L<<0) 245 #define MCPF_NVM_COMMAND_DONE (1L<<3) 246 #define MCPF_NVM_COMMAND_DOIT (1L<<4) 247 #define MCPF_NVM_COMMAND_WR (1L<<5) 248 #define MCPF_NVM_COMMAND_ERASE (1L<<6) 249 #define MCPF_NVM_COMMAND_FIRST (1L<<7) 250 #define MCPF_NVM_COMMAND_LAST (1L<<8) 251 #define MCPF_NVM_COMMAND_WREN (1L<<16) 252 #define MCPF_NVM_COMMAND_WRDI (1L<<17) 253 #define MCPF_NVM_COMMAND_RD_ID (1L<<20) 254 #define MCPF_NVM_COMMAND_RD_STATUS (1L<<21) 255 #define MCPF_NVM_COMMAND_MODE_256 (1L<<22) 256 257 u32_t mcpf_nvm_status; 258 #define MCPF_NVM_STATUS_SPI_FSM_STATE (0x1fL<<0) 259 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_IDLE (0L<<0) 260 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_CMD0 (1L<<0) 261 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_CMD1 (2L<<0) 262 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_CMD_FINISH0 (3L<<0) 263 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_CMD_FINISH1 (4L<<0) 264 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_ADDR0 (5L<<0) 265 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA0 (6L<<0) 266 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA1 (7L<<0) 267 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_WRITE_DATA2 (8L<<0) 268 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA0 (9L<<0) 269 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA1 (10L<<0) 270 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_READ_DATA2 (11L<<0) 271 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID0 (12L<<0) 272 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID1 (13L<<0) 273 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID2 (14L<<0) 274 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID3 (15L<<0) 275 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_READ_STATUS_RDID4 (16L<<0) 276 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_CHECK_BUSY0 (17L<<0) 277 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_ST_WREN (18L<<0) 278 #define MCPF_NVM_STATUS_SPI_FSM_STATE_SPI_WAIT (19L<<0) 279 280 u32_t mcpf_nvm_write; 281 #define MCPF_NVM_WRITE_NVM_WRITE_VALUE (0xffffffffL<<0) 282 #define MCPF_NVM_WRITE_NVM_WRITE_VALUE_BIT_BANG (0L<<0) 283 #define MCPF_NVM_WRITE_NVM_WRITE_VALUE_SI (1L<<0) 284 #define MCPF_NVM_WRITE_NVM_WRITE_VALUE_SO (2L<<0) 285 #define MCPF_NVM_WRITE_NVM_WRITE_VALUE_CS_B (4L<<0) 286 #define MCPF_NVM_WRITE_NVM_WRITE_VALUE_SCLK (8L<<0) 287 288 u32_t mcpf_nvm_addr; 289 #define MCPF_NVM_ADDR_NVM_ADDR_VALUE (0xffffffL<<0) 290 #define MCPF_NVM_ADDR_NVM_ADDR_VALUE_BIT_BANG (0L<<0) 291 #define MCPF_NVM_ADDR_NVM_ADDR_VALUE_SI (1L<<0) 292 #define MCPF_NVM_ADDR_NVM_ADDR_VALUE_SO (2L<<0) 293 #define MCPF_NVM_ADDR_NVM_ADDR_VALUE_CS_B (4L<<0) 294 #define MCPF_NVM_ADDR_NVM_ADDR_VALUE_SCLK (8L<<0) 295 296 u32_t mcpf_nvm_read; 297 #define MCPF_NVM_READ_NVM_READ_VALUE (0xffffffffL<<0) 298 #define MCPF_NVM_READ_NVM_READ_VALUE_BIT_BANG (0L<<0) 299 #define MCPF_NVM_READ_NVM_READ_VALUE_SI (1L<<0) 300 #define MCPF_NVM_READ_NVM_READ_VALUE_SO (2L<<0) 301 #define MCPF_NVM_READ_NVM_READ_VALUE_CS_B (4L<<0) 302 #define MCPF_NVM_READ_NVM_READ_VALUE_SCLK (8L<<0) 303 304 u32_t mcpf_nvm_cfg1; 305 #define MCPF_NVM_CFG1_FLASH_MODE (1L<<0) 306 #define MCPF_NVM_CFG1_BUFFER_MODE (1L<<1) 307 #define MCPF_NVM_CFG1_PASS_MODE (1L<<2) 308 #define MCPF_NVM_CFG1_BITBANG_MODE (1L<<3) 309 #define MCPF_NVM_CFG1_STATUS_BIT (0x7L<<4) 310 #define MCPF_NVM_CFG1_SPI_CLK_DIV (0xfL<<7) 311 #define MCPF_NVM_CFG1_SEE_CLK_DIV (0x7ffL<<11) 312 #define MCPF_NVM_CFG1_STRAP_CONTROL_0 (1L<<23) 313 #define MCPF_NVM_CFG1_PROTECT_MODE (1L<<24) 314 #define MCPF_NVM_CFG1_FLASH_SIZE (1L<<25) 315 #define MCPF_NVM_CFG1_FW_USTRAP_1 (1L<<26) 316 #define MCPF_NVM_CFG1_FW_USTRAP_0 (1L<<27) 317 #define MCPF_NVM_CFG1_FW_USTRAP_2 (1L<<28) 318 #define MCPF_NVM_CFG1_FW_USTRAP_3 (1L<<29) 319 #define MCPF_NVM_CFG1_FW_FLASH_TYPE_EN (1L<<30) 320 #define MCPF_NVM_CFG1_COMPAT_BYPASSS (1L<<31) 321 322 u32_t mcpf_nvm_cfg2; 323 #define MCPF_NVM_CFG2_ERASE_CMD (0xffL<<0) 324 #define MCPF_NVM_CFG2_CSB_W (0xffL<<8) 325 #define MCPF_NVM_CFG2_STATUS_CMD (0xffL<<16) 326 #define MCPF_NVM_CFG2_READ_ID (0xffL<<24) 327 328 u32_t mcpf_nvm_cfg3; 329 #define MCPF_NVM_CFG3_BUFFER_RD_CMD (0xffL<<0) 330 #define MCPF_NVM_CFG3_WRITE_CMD (0xffL<<8) 331 #define MCPF_NVM_CFG3_FAST_READ_CMD (0xffL<<16) 332 #define MCPF_NVM_CFG3_READ_CMD (0xffL<<24) 333 334 u32_t mcpf_nvm_sw_arb; 335 #define MCPF_NVM_SW_ARB_ARB_REQ_SET0 (1L<<0) 336 #define MCPF_NVM_SW_ARB_ARB_REQ_SET1 (1L<<1) 337 #define MCPF_NVM_SW_ARB_ARB_REQ_SET2 (1L<<2) 338 #define MCPF_NVM_SW_ARB_ARB_REQ_SET3 (1L<<3) 339 #define MCPF_NVM_SW_ARB_ARB_REQ_CLR0 (1L<<4) 340 #define MCPF_NVM_SW_ARB_ARB_REQ_CLR1 (1L<<5) 341 #define MCPF_NVM_SW_ARB_ARB_REQ_CLR2 (1L<<6) 342 #define MCPF_NVM_SW_ARB_ARB_REQ_CLR3 (1L<<7) 343 #define MCPF_NVM_SW_ARB_ARB_ARB0 (1L<<8) 344 #define MCPF_NVM_SW_ARB_ARB_ARB1 (1L<<9) 345 #define MCPF_NVM_SW_ARB_ARB_ARB2 (1L<<10) 346 #define MCPF_NVM_SW_ARB_ARB_ARB3 (1L<<11) 347 #define MCPF_NVM_SW_ARB_REQ0 (1L<<12) 348 #define MCPF_NVM_SW_ARB_REQ1 (1L<<13) 349 #define MCPF_NVM_SW_ARB_REQ2 (1L<<14) 350 #define MCPF_NVM_SW_ARB_REQ3 (1L<<15) 351 352 u32_t mcpf_nvm_access_enable; 353 #define MCPF_NVM_ACCESS_ENABLE_EN (1L<<0) 354 #define MCPF_NVM_ACCESS_ENABLE_WR_EN (1L<<1) 355 356 u32_t mcpf_nvm_write1; 357 #define MCPF_NVM_WRITE1_WREN_CMD (0xffL<<0) 358 #define MCPF_NVM_WRITE1_WRDI_CMD (0xffL<<8) 359 360 u32_t mcpf_nvm_cfg4; 361 #define MCPF_NVM_CFG4_FLASH_SIZE (0x7L<<0) 362 #define MCPF_NVM_CFG4_FLASH_SIZE_1MBIT (0L<<0) 363 #define MCPF_NVM_CFG4_FLASH_SIZE_2MBIT (1L<<0) 364 #define MCPF_NVM_CFG4_FLASH_SIZE_4MBIT (2L<<0) 365 #define MCPF_NVM_CFG4_FLASH_SIZE_8MBIT (3L<<0) 366 #define MCPF_NVM_CFG4_FLASH_SIZE_16MBIT (4L<<0) 367 #define MCPF_NVM_CFG4_FLASH_SIZE_32MBIT (5L<<0) 368 #define MCPF_NVM_CFG4_FLASH_SIZE_64MBIT (6L<<0) 369 #define MCPF_NVM_CFG4_FLASH_SIZE_128MBIT (7L<<0) 370 #define MCPF_NVM_CFG4_FLASH_VENDOR (1L<<3) 371 #define MCPF_NVM_CFG4_FLASH_VENDOR_ST (0L<<3) 372 #define MCPF_NVM_CFG4_FLASH_VENDOR_ATMEL (1L<<3) 373 #define MCPF_NVM_CFG4_MODE_256_EMPTY_BIT_LOC (0x3L<<4) 374 #define MCPF_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT8 (0L<<4) 375 #define MCPF_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT9 (1L<<4) 376 #define MCPF_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT10 (2L<<4) 377 #define MCPF_NVM_CFG4_MODE_256_EMPTY_BIT_LOC_BIT11 (3L<<4) 378 #define MCPF_NVM_CFG4_STATUS_BIT_POLARITY (1L<<6) 379 #define MCPF_NVM_CFG4_FAST (1L<<7) 380 #define MCPF_NVM_CFG4_SI_INPUT_RELAXED_TIMING (1L<<8) 381 #define MCPF_NVM_CFG4_PASS_MODE_RELAXED_TIMING (1L<<9) 382 #define MCPF_NVM_CFG4_SR_TURNAROUND (1L<<10) 383 #define MCPF_NVM_CFG4_RESERVED (0x1fffffL<<11) 384 385 u32_t mcpf_nvm_reconfig; 386 #define MCPF_NVM_RECONFIG_ORIG_STRAP_VALUE (0xfL<<0) 387 #define MCPF_NVM_RECONFIG_ORIG_STRAP_VALUE_ST (0L<<0) 388 #define MCPF_NVM_RECONFIG_ORIG_STRAP_VALUE_ATMEL (1L<<0) 389 #define MCPF_NVM_RECONFIG_RECONFIG_STRAP_VALUE (0xfL<<4) 390 #define MCPF_NVM_RECONFIG_RESERVED (0x7fffffL<<8) 391 #define MCPF_NVM_RECONFIG_RECONFIG_DONE (1L<<31) 392 393 u32_t mcpf_unused2[243]; 394 u32_t mcpf_unused_j[1536]; 395 u32_t mcpf_smbus_config; 396 #define MCPF_SMBUS_CONFIG_HW_ARP_ASSIGN_ADDR (1L<<7) 397 #define MCPF_SMBUS_CONFIG_ARP_EN0 (1L<<8) 398 #define MCPF_SMBUS_CONFIG_ARP_EN1 (1L<<9) 399 #define MCPF_SMBUS_CONFIG_MASTER_RTRY_CNT (0xfL<<16) 400 #define MCPF_SMBUS_CONFIG_TIMESTAMP_CNT_EN (1L<<26) 401 #define MCPF_SMBUS_CONFIG_PROMISCOUS_MODE (1L<<27) 402 #define MCPF_SMBUS_CONFIG_EN_NIC_SMB_ADDR_0 (1L<<28) 403 #define MCPF_SMBUS_CONFIG_BIT_BANG_EN (1L<<29) 404 #define MCPF_SMBUS_CONFIG_SMB_EN (1L<<30) 405 #define MCPF_SMBUS_CONFIG_RESET (1L<<31) 406 407 u32_t mcpf_smbus_timing_config; 408 #define MCPF_SMBUS_TIMING_CONFIG_SMBUS_IDLE_TIME (0xffL<<8) 409 #define MCPF_SMBUS_TIMING_CONFIG_PERIODIC_SLAVE_STRETCH (0xffL<<16) 410 #define MCPF_SMBUS_TIMING_CONFIG_RANDOM_SLAVE_STRETCH (0x7fL<<24) 411 #define MCPF_SMBUS_TIMING_CONFIG_MODE_400 (1L<<31) 412 413 u32_t mcpf_smbus_address; 414 #define MCPF_SMBUS_ADDRESS_NIC_SMB_ADDR0 (0x7fL<<0) 415 #define MCPF_SMBUS_ADDRESS_EN_NIC_SMB_ADDR0 (1L<<7) 416 #define MCPF_SMBUS_ADDRESS_NIC_SMB_ADDR1 (0x7fL<<8) 417 #define MCPF_SMBUS_ADDRESS_EN_NIC_SMB_ADDR1 (1L<<15) 418 #define MCPF_SMBUS_ADDRESS_NIC_SMB_ADDR2 (0x7fL<<16) 419 #define MCPF_SMBUS_ADDRESS_EN_NIC_SMB_ADDR2 (1L<<23) 420 #define MCPF_SMBUS_ADDRESS_NIC_SMB_ADDR3 (0x7fL<<24) 421 #define MCPF_SMBUS_ADDRESS_EN_NIC_SMB_ADDR3 (1L<<31) 422 423 u32_t mcpf_smbus_master_fifo_control; 424 #define MCPF_SMBUS_MASTER_FIFO_CONTROL_MASTER_RX_FIFO_THRESHOLD (0x7fL<<8) 425 #define MCPF_SMBUS_MASTER_FIFO_CONTROL_MASTER_RX_PKT_COUNT (0x7fL<<16) 426 #define MCPF_SMBUS_MASTER_FIFO_CONTROL_MASTER_TX_FIFO_FLUSH (1L<<30) 427 #define MCPF_SMBUS_MASTER_FIFO_CONTROL_MASTER_RX_FIFO_FLUSH (1L<<31) 428 429 u32_t mcpf_smbus_slave_fifo_control; 430 #define MCPF_SMBUS_SLAVE_FIFO_CONTROL_SLAVE_RX_FIFO_THRESHOLD (0x7fL<<8) 431 #define MCPF_SMBUS_SLAVE_FIFO_CONTROL_SLAVE_RX_PKT_COUNT (0x7fL<<16) 432 #define MCPF_SMBUS_SLAVE_FIFO_CONTROL_SLAVE_TX_FIFO_FLUSH (1L<<30) 433 #define MCPF_SMBUS_SLAVE_FIFO_CONTROL_SLAVE_RX_FIFO_FLUSH (1L<<31) 434 435 u32_t mcpf_smbus_bit_bang_control; 436 #define MCPF_SMBUS_BIT_BANG_CONTROL_SMBDAT_OUT_EN (1L<<28) 437 #define MCPF_SMBUS_BIT_BANG_CONTROL_SMBDAT_IN (1L<<29) 438 #define MCPF_SMBUS_BIT_BANG_CONTROL_SMBCLK_OUT_EN (1L<<30) 439 #define MCPF_SMBUS_BIT_BANG_CONTROL_SMBCLK_IN (1L<<31) 440 441 u32_t mcpf_smbus_watchdog; 442 #define MCPF_SMBUS_WATCHDOG_WATCHDOG (0xffffL<<0) 443 444 u32_t mcpf_smbus_heartbeat; 445 #define MCPF_SMBUS_HEARTBEAT_HEARTBEAT (0xffffL<<0) 446 447 u32_t mcpf_smbus_poll_asf; 448 #define MCPF_SMBUS_POLL_ASF_POLL_ASF (0xffffL<<0) 449 450 u32_t mcpf_smbus_poll_legacy; 451 #define MCPF_SMBUS_POLL_LEGACY_POLL_LEGACY (0xffffL<<0) 452 453 u32_t mcpf_smbus_retran; 454 #define MCPF_SMBUS_RETRAN_RETRAN (0xffL<<0) 455 456 u32_t mcpf_smbus_timestamp; 457 #define MCPF_SMBUS_TIMESTAMP_TIMESTAMP (0xffffffffL<<0) 458 459 u32_t mcpf_smbus_master_command; 460 #define MCPF_SMBUS_MASTER_COMMAND_RD_BYTE_COUNT (0xffL<<0) 461 #define MCPF_SMBUS_MASTER_COMMAND_PEC (1L<<8) 462 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL (0xfL<<9) 463 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_0000 (0L<<9) 464 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_0001 (1L<<9) 465 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_0010 (2L<<9) 466 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_0011 (3L<<9) 467 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_0100 (4L<<9) 468 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_0101 (5L<<9) 469 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_0110 (6L<<9) 470 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_0111 (7L<<9) 471 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_1000 (8L<<9) 472 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_1001 (9L<<9) 473 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_1010 (10L<<9) 474 #define MCPF_SMBUS_MASTER_COMMAND_SMBUS_PROTOCOL_1011 (11L<<9) 475 #define MCPF_SMBUS_MASTER_COMMAND_STATUS (0x7L<<25) 476 #define MCPF_SMBUS_MASTER_COMMAND_STATUS_000 (0L<<25) 477 #define MCPF_SMBUS_MASTER_COMMAND_STATUS_001 (1L<<25) 478 #define MCPF_SMBUS_MASTER_COMMAND_STATUS_010 (2L<<25) 479 #define MCPF_SMBUS_MASTER_COMMAND_STATUS_011 (3L<<25) 480 #define MCPF_SMBUS_MASTER_COMMAND_STATUS_100 (4L<<25) 481 #define MCPF_SMBUS_MASTER_COMMAND_STATUS_101 (5L<<25) 482 #define MCPF_SMBUS_MASTER_COMMAND_STATUS_110 (6L<<25) 483 #define MCPF_SMBUS_MASTER_COMMAND_STATUS_111 (7L<<25) 484 #define MCPF_SMBUS_MASTER_COMMAND_ABORT (1L<<30) 485 #define MCPF_SMBUS_MASTER_COMMAND_START_BUSY (1L<<31) 486 487 u32_t mcpf_smbus_slave_command; 488 #define MCPF_SMBUS_SLAVE_COMMAND_PEC (1L<<8) 489 #define MCPF_SMBUS_SLAVE_COMMAND_STATUS (0x7L<<23) 490 #define MCPF_SMBUS_SLAVE_COMMAND_STATUS_000 (0L<<23) 491 #define MCPF_SMBUS_SLAVE_COMMAND_STATUS_101 (5L<<23) 492 #define MCPF_SMBUS_SLAVE_COMMAND_STATUS_111 (7L<<23) 493 #define MCPF_SMBUS_SLAVE_COMMAND_ABORT (1L<<30) 494 #define MCPF_SMBUS_SLAVE_COMMAND_START (1L<<31) 495 496 u32_t mcpf_smbus_event_enable; 497 #define MCPF_SMBUS_EVENT_ENABLE_WATCHDOG_TO_EN (1L<<0) 498 #define MCPF_SMBUS_EVENT_ENABLE_HEARTBEAT_TO_EN (1L<<1) 499 #define MCPF_SMBUS_EVENT_ENABLE_POLL_ASF_TO_EN (1L<<2) 500 #define MCPF_SMBUS_EVENT_ENABLE_POLL_LEGACY_TO_EN (1L<<3) 501 #define MCPF_SMBUS_EVENT_ENABLE_RETRANSMIT_TO_EN (1L<<4) 502 #define MCPF_SMBUS_EVENT_ENABLE_SLAVE_ARP_EVENT_EN (1L<<20) 503 #define MCPF_SMBUS_EVENT_ENABLE_SLAVE_RD_EVENT_EN (1L<<21) 504 #define MCPF_SMBUS_EVENT_ENABLE_SLAVE_TX_UNDERRUN_EN (1L<<22) 505 #define MCPF_SMBUS_EVENT_ENABLE_SLAVE_START_BUSY_EN (1L<<23) 506 #define MCPF_SMBUS_EVENT_ENABLE_SLAVE_RX_EVENT_EN (1L<<24) 507 #define MCPF_SMBUS_EVENT_ENABLE_SLAVE_RX_THRESHOLD_HIT_EN (1L<<25) 508 #define MCPF_SMBUS_EVENT_ENABLE_SLAVE_RX_FIFO_FULL_EN (1L<<26) 509 #define MCPF_SMBUS_EVENT_ENABLE_MASTER_TX_UNDERRUN_EN (1L<<27) 510 #define MCPF_SMBUS_EVENT_ENABLE_MASTER_START_BUSY_EN (1L<<28) 511 #define MCPF_SMBUS_EVENT_ENABLE_MASTER_RX_EVENT_EN (1L<<29) 512 #define MCPF_SMBUS_EVENT_ENABLE_MASTER_RX_THRESHOLD_HIT_EN (1L<<30) 513 #define MCPF_SMBUS_EVENT_ENABLE_MASTER_RX_FIFO_FULL_EN (1L<<31) 514 515 u32_t mcpf_smbus_event_status; 516 #define MCPF_SMBUS_EVENT_STATUS_WATCHDOG_TO (1L<<0) 517 #define MCPF_SMBUS_EVENT_STATUS_HEARTBEAT_TO (1L<<1) 518 #define MCPF_SMBUS_EVENT_STATUS_POLL_ASF_TO (1L<<2) 519 #define MCPF_SMBUS_EVENT_STATUS_POLL_LEGACY_TO (1L<<3) 520 #define MCPF_SMBUS_EVENT_STATUS_RETRANSMIT_TO (1L<<4) 521 #define MCPF_SMBUS_EVENT_STATUS_SLAVE_ARP_EVENT (1L<<20) 522 #define MCPF_SMBUS_EVENT_STATUS_SLAVE_RD_EVENT (1L<<21) 523 #define MCPF_SMBUS_EVENT_STATUS_SLAVE_TX_UNDERRUN (1L<<22) 524 #define MCPF_SMBUS_EVENT_STATUS_SLAVE_START_BUSY (1L<<23) 525 #define MCPF_SMBUS_EVENT_STATUS_SLAVE_RX_EVENT (1L<<24) 526 #define MCPF_SMBUS_EVENT_STATUS_SLAVE_RX_THRESHOLD_HIT (1L<<25) 527 #define MCPF_SMBUS_EVENT_STATUS_SLAVE_RX_FIFO_FULL (1L<<26) 528 #define MCPF_SMBUS_EVENT_STATUS_MASTER_TX_UNDERRUN (1L<<27) 529 #define MCPF_SMBUS_EVENT_STATUS_MASTER_START_BUSY (1L<<28) 530 #define MCPF_SMBUS_EVENT_STATUS_MASTER_RX_EVENT (1L<<29) 531 #define MCPF_SMBUS_EVENT_STATUS_MASTER_RX_THRESHOLD_HIT (1L<<30) 532 #define MCPF_SMBUS_EVENT_STATUS_MASTER_RX_FIFO_FULL (1L<<31) 533 534 u32_t mcpf_smbus_master_data_write; 535 #define MCPF_SMBUS_MASTER_DATA_WRITE_MASTER_SMBUS_WR_DATA (0xffL<<0) 536 #define MCPF_SMBUS_MASTER_DATA_WRITE_WR_STATUS (1L<<31) 537 538 u32_t mcpf_smbus_master_data_read; 539 #define MCPF_SMBUS_MASTER_DATA_READ_MASTER_SMBUS_RD_DATA (0xffL<<0) 540 #define MCPF_SMBUS_MASTER_DATA_READ_PEC_ERR (1L<<29) 541 #define MCPF_SMBUS_MASTER_DATA_READ_RD_STATUS (0x3L<<30) 542 #define MCPF_SMBUS_MASTER_DATA_READ_RD_STATUS_00 (0L<<30) 543 #define MCPF_SMBUS_MASTER_DATA_READ_RD_STATUS_01 (1L<<30) 544 #define MCPF_SMBUS_MASTER_DATA_READ_RD_STATUS_10 (2L<<30) 545 #define MCPF_SMBUS_MASTER_DATA_READ_RD_STATUS_11 (3L<<30) 546 547 u32_t mcpf_smbus_slave_data_write; 548 #define MCPF_SMBUS_SLAVE_DATA_WRITE_SLAVE_SMBUS_WR_DATA (0xffL<<0) 549 #define MCPF_SMBUS_SLAVE_DATA_WRITE_WR_STATUS (1L<<31) 550 #define MCPF_SMBUS_SLAVE_DATA_WRITE_WR_STATUS_0 (0L<<31) 551 #define MCPF_SMBUS_SLAVE_DATA_WRITE_WR_STATUS_1 (1L<<31) 552 553 u32_t mcpf_smbus_slave_data_read; 554 #define MCPF_SMBUS_SLAVE_DATA_READ_SLAVE_SMBUS_RD_DATA (0xffL<<0) 555 #define MCPF_SMBUS_SLAVE_DATA_READ_ERR_STATUS (0x3L<<28) 556 #define MCPF_SMBUS_SLAVE_DATA_READ_ERR_STATUS_00 (0L<<28) 557 #define MCPF_SMBUS_SLAVE_DATA_READ_ERR_STATUS_01 (1L<<28) 558 #define MCPF_SMBUS_SLAVE_DATA_READ_ERR_STATUS_10 (2L<<28) 559 #define MCPF_SMBUS_SLAVE_DATA_READ_ERR_STATUS_11 (3L<<28) 560 #define MCPF_SMBUS_SLAVE_DATA_READ_RD_STATUS (0x3L<<30) 561 #define MCPF_SMBUS_SLAVE_DATA_READ_RD_STATUS_00 (0L<<30) 562 #define MCPF_SMBUS_SLAVE_DATA_READ_RD_STATUS_01 (1L<<30) 563 #define MCPF_SMBUS_SLAVE_DATA_READ_RD_STATUS_10 (2L<<30) 564 #define MCPF_SMBUS_SLAVE_DATA_READ_RD_STATUS_11 (3L<<30) 565 566 u32_t mcpf_unused3[12]; 567 u32_t mcpf_smbus_arp_state; 568 #define MCPF_SMBUS_ARP_STATE_AV_FLAG0 (1L<<0) 569 #define MCPF_SMBUS_ARP_STATE_AR_FLAG0 (1L<<1) 570 #define MCPF_SMBUS_ARP_STATE_AV_FLAG1 (1L<<4) 571 #define MCPF_SMBUS_ARP_STATE_AR_FLAG1 (1L<<5) 572 573 u32_t mcpf_unused4[3]; 574 u32_t mcpf_smbus_udid0_3; 575 #define MCPF_SMBUS_UDID0_3_BYTE_12 (0xffL<<0) 576 #define MCPF_SMBUS_UDID0_3_BYTE_13 (0xffL<<8) 577 #define MCPF_SMBUS_UDID0_3_BYTE_14 (0xffL<<16) 578 #define MCPF_SMBUS_UDID0_3_BYTE_15 (0xffL<<24) 579 580 u32_t mcpf_smbus_udid0_2; 581 #define MCPF_SMBUS_UDID0_2_BYTE_8 (0xffL<<0) 582 #define MCPF_SMBUS_UDID0_2_BYTE_9 (0xffL<<8) 583 #define MCPF_SMBUS_UDID0_2_BYTE_10 (0xffL<<16) 584 #define MCPF_SMBUS_UDID0_2_BYTE_11 (0xffL<<24) 585 586 u32_t mcpf_smbus_udid0_1; 587 #define MCPF_SMBUS_UDID0_1_BYTE_4 (0xffL<<0) 588 #define MCPF_SMBUS_UDID0_1_BYTE_5 (0xffL<<8) 589 #define MCPF_SMBUS_UDID0_1_BYTE_6 (0xffL<<16) 590 #define MCPF_SMBUS_UDID0_1_BYTE_7 (0xffL<<24) 591 592 u32_t mcpf_smbus_udid0_0; 593 #define MCPF_SMBUS_UDID0_0_BYTE_0 (0xffL<<0) 594 #define MCPF_SMBUS_UDID0_0_BYTE_1 (0xffL<<8) 595 #define MCPF_SMBUS_UDID0_0_BYTE_2 (0xffL<<16) 596 #define MCPF_SMBUS_UDID0_0_BYTE_3 (0xffL<<24) 597 598 u32_t mcpf_smbus_udid1_3; 599 #define MCPF_SMBUS_UDID1_3_BYTE_12 (0xffL<<0) 600 #define MCPF_SMBUS_UDID1_3_BYTE_13 (0xffL<<8) 601 #define MCPF_SMBUS_UDID1_3_BYTE_14 (0xffL<<16) 602 #define MCPF_SMBUS_UDID1_3_BYTE_15 (0xffL<<24) 603 604 u32_t mcpf_smbus_udid1_2; 605 #define MCPF_SMBUS_UDID1_2_BYTE_8 (0xffL<<0) 606 #define MCPF_SMBUS_UDID1_2_BYTE_9 (0xffL<<8) 607 #define MCPF_SMBUS_UDID1_2_BYTE_10 (0xffL<<16) 608 #define MCPF_SMBUS_UDID1_2_BYTE_11 (0xffL<<24) 609 610 u32_t mcpf_smbus_udid1_1; 611 #define MCPF_SMBUS_UDID1_1_BYTE_4 (0xffL<<0) 612 #define MCPF_SMBUS_UDID1_1_BYTE_5 (0xffL<<8) 613 #define MCPF_SMBUS_UDID1_1_BYTE_6 (0xffL<<16) 614 #define MCPF_SMBUS_UDID1_1_BYTE_7 (0xffL<<24) 615 616 u32_t mcpf_smbus_udid1_0; 617 #define MCPF_SMBUS_UDID1_0_BYTE_0 (0xffL<<0) 618 #define MCPF_SMBUS_UDID1_0_BYTE_1 (0xffL<<8) 619 #define MCPF_SMBUS_UDID1_0_BYTE_2 (0xffL<<16) 620 #define MCPF_SMBUS_UDID1_0_BYTE_3 (0xffL<<24) 621 622 u32_t mcpf_unused5[212]; 623 u32_t mcpf_unused6[256]; 624 u32_t mcpf_legacy_unused_legacy_smb[9]; 625 u32_t mcpf_unused7[247]; 626 u32_t mcpf_unused_k[15616]; 627 u32_t mcpf_ump_cmd; 628 #define MCPF_UMP_CMD_EGRESS_FIFO_ENABLED (1L<<0) 629 #define MCPF_UMP_CMD_INGRESS_FIFO_ENABLED (1L<<1) 630 #define MCPF_UMP_CMD_FC_EN (1L<<2) 631 #define MCPF_UMP_CMD_MAC_LOOPBACK (1L<<3) 632 #define MCPF_UMP_CMD_EGRESS_MAC_DISABLE (1L<<5) 633 #define MCPF_UMP_CMD_INGRESS_MAC_DISABLE (1L<<6) 634 #define MCPF_UMP_CMD_INGRESS_DRIVE (1L<<8) 635 #define MCPF_UMP_CMD_SW_PAUSE (1L<<9) 636 #define MCPF_UMP_CMD_AUTO_DRIVE (1L<<13) 637 #define MCPF_UMP_CMD_INGRESS_RESET (1L<<14) 638 #define MCPF_UMP_CMD_NO_PLUS_TWO (1L<<15) 639 #define MCPF_UMP_CMD_EGRESS_PKT_FLUSH (1L<<16) 640 #define MCPF_UMP_CMD_CMD_IPG (0x1fL<<17) 641 #define MCPF_UMP_CMD_EGRESS_FIO_RESET (1L<<28) 642 #define MCPF_UMP_CMD_INGRESS_FIO_RESET (1L<<29) 643 #define MCPF_UMP_CMD_EGRESS_MAC_RESET (1L<<30) 644 #define MCPF_UMP_CMD_INGRESS_MAC_RESET (1L<<31) 645 646 u32_t mcpf_ump_config; 647 #define MCPF_UMP_CONFIG_RMII_MODE (1L<<4) 648 #define MCPF_UMP_CONFIG_RVMII_MODE (1L<<6) 649 #define MCPF_UMP_CONFIG_INGRESS_MODE (1L<<7) 650 #define MCPF_UMP_CONFIG_INGRESS_WORD_ACCM (0xffL<<8) 651 #define MCPF_UMP_CONFIG_OLD_BCNT_RDY (1L<<24) 652 653 u32_t mcpf_ump_fc_trip; 654 #define MCPF_UMP_FC_TRIP_XON_TRIP (0x1ffL<<0) 655 #define MCPF_UMP_FC_TRIP_XOFF_TRIP (0x1ffL<<16) 656 657 u32_t mcpf_unused_e[33]; 658 u32_t mcpf_ump_egress_frm_rd_status; 659 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_NEW_FRM (1L<<0) 660 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_FRM_IN_PRO (1L<<1) 661 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_FIFO_EMPTY (1L<<2) 662 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_BCNT (0x7ffL<<3) 663 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_EGRESS_FIFO_STATE (0x1fL<<27) 664 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_EGRESS_FIFO_STATE_IDLE (0L<<27) 665 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_EGRESS_FIFO_STATE_READY (1L<<27) 666 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_EGRESS_FIFO_STATE_BUSY (2L<<27) 667 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_EGRESS_FIFO_STATE_EXTRA_RD (3L<<27) 668 #define MCPF_UMP_EGRESS_FRM_RD_STATUS_EGRESS_FIFO_STATE_LATCH_IP_HDR (4L<<27) 669 670 u32_t mcpf_ump_egress_frm_rd_data; 671 u32_t mcpf_ump_ingress_frm_wr_ctl; 672 #define MCPF_UMP_INGRESS_FRM_WR_CTL_NEW_FRM (1L<<0) 673 #define MCPF_UMP_INGRESS_FRM_WR_CTL_FIFO_RDY (1L<<1) 674 #define MCPF_UMP_INGRESS_FRM_WR_CTL_BCNT_RDY (1L<<2) 675 #define MCPF_UMP_INGRESS_FRM_WR_CTL_BCNT (0x7ffL<<3) 676 #define MCPF_UMP_INGRESS_FRM_WR_CTL_INGRESS_FIFO_STATE (0x3L<<30) 677 #define MCPF_UMP_INGRESS_FRM_WR_CTL_INGRESS_FIFO_STATE_IDLE (0L<<30) 678 #define MCPF_UMP_INGRESS_FRM_WR_CTL_INGRESS_FIFO_STATE_WAIT (1L<<30) 679 #define MCPF_UMP_INGRESS_FRM_WR_CTL_INGRESS_FIFO_STATE_BUSY (2L<<30) 680 #define MCPF_UMP_INGRESS_FRM_WR_CTL_INGRESS_FIFO_STATE_EXTRA_WR (3L<<30) 681 682 u32_t mcpf_ump_ingress_frm_wr_data; 683 u32_t mcpf_ump_egress_frame_type; 684 u32_t mcpf_ump_fifo_remaining_words; 685 #define MCPF_UMP_FIFO_REMAINING_WORDS_EGRESS_FIFO_DEPTH (0x7ffL<<0) 686 #define MCPF_UMP_FIFO_REMAINING_WORDS_EGRESS_FIFO_UNDERFLOW (1L<<14) 687 #define MCPF_UMP_FIFO_REMAINING_WORDS_EGRESS_FIFO_OVERFLOW (1L<<15) 688 #define MCPF_UMP_FIFO_REMAINING_WORDS_INGRESS_FIFO_DEPTH (0x3ffL<<16) 689 #define MCPF_UMP_FIFO_REMAINING_WORDS_INGRESS_FIFO_UNDERFLOW (1L<<30) 690 #define MCPF_UMP_FIFO_REMAINING_WORDS_INGRESS_FIFO_OVERFLOW (1L<<31) 691 692 u32_t mcpf_ump_egress_fifo_ptrs; 693 #define MCPF_UMP_EGRESS_FIFO_PTRS_EGRESS_FIFO_RD_PTR (0xfffL<<0) 694 #define MCPF_UMP_EGRESS_FIFO_PTRS_UPDATE_RDPTR (1L<<15) 695 #define MCPF_UMP_EGRESS_FIFO_PTRS_EGRESS_FIFO_WR_PTR (0xfffL<<16) 696 #define MCPF_UMP_EGRESS_FIFO_PTRS_UPDATE_WRPTR (1L<<31) 697 698 u32_t mcpf_ump_ingress_fifo_ptrs; 699 #define MCPF_UMP_INGRESS_FIFO_PTRS_INGRESS_FIFO_RD_PTR (0x7ffL<<0) 700 #define MCPF_UMP_INGRESS_FIFO_PTRS_UPDATE_RDPTR (1L<<15) 701 #define MCPF_UMP_INGRESS_FIFO_PTRS_INGRESS_FIFO_WR_PTR (0x7ffL<<16) 702 #define MCPF_UMP_INGRESS_FIFO_PTRS_UPDATE_WRPTR (1L<<31) 703 704 u32_t mcpf_unused_z[1]; 705 u32_t mcpf_ump_egress_packet_sa_0; 706 #define MCPF_UMP_EGRESS_PACKET_SA_0_EGRESS_SA (0xffffL<<0) 707 708 u32_t mcpf_ump_egress_packet_sa_1; 709 #define MCPF_UMP_EGRESS_PACKET_SA_1_EGRESS_SA (0xffffffffL<<0) 710 711 u32_t mcpf_ump_ingress_burst_command; 712 #define MCPF_UMP_INGRESS_BURST_COMMAND_INGRESS_DMA_START (1L<<0) 713 #define MCPF_UMP_INGRESS_BURST_COMMAND_INGRESS_PORT (1L<<1) 714 #define MCPF_UMP_INGRESS_BURST_COMMAND_DMA_LENGTH (0x7ffL<<2) 715 #define MCPF_UMP_INGRESS_BURST_COMMAND_INGRESS_PORT_EXT (0x3L<<13) 716 #define MCPF_UMP_INGRESS_BURST_COMMAND_RBUF_OFFSET (0x3fffL<<16) 717 718 u32_t mcpf_ump_ingress_rbuf_cluster; 719 #define MCPF_UMP_INGRESS_RBUF_CLUSTER_RBUF_CLUSTER (0x1ffffffL<<0) 720 721 u32_t mcpf_ump_ingress_vlan; 722 #define MCPF_UMP_INGRESS_VLAN_INGRESS_VLAN_TAG (0xffffL<<0) 723 #define MCPF_UMP_INGRESS_VLAN_VLAN_INS (1L<<16) 724 #define MCPF_UMP_INGRESS_VLAN_VLAN_DEL (1L<<17) 725 726 u32_t mcpf_ump_ingress_burst_status; 727 #define MCPF_UMP_INGRESS_BURST_STATUS_RESULT (0x3L<<0) 728 #define MCPF_UMP_INGRESS_BURST_STATUS_RESULT_BUSY (0L<<0) 729 #define MCPF_UMP_INGRESS_BURST_STATUS_RESULT_DONE (1L<<0) 730 #define MCPF_UMP_INGRESS_BURST_STATUS_RESULT_ERR (2L<<0) 731 #define MCPF_UMP_INGRESS_BURST_STATUS_RESULT_ERR1 (3L<<0) 732 733 u32_t mcpf_ump_egress_burst_command; 734 #define MCPF_UMP_EGRESS_BURST_COMMAND_EGRESS_DMA_START (1L<<0) 735 #define MCPF_UMP_EGRESS_BURST_COMMAND_EGRESS_PORT (1L<<1) 736 #define MCPF_UMP_EGRESS_BURST_COMMAND_DMA_LENGTH (0x7ffL<<2) 737 #define MCPF_UMP_EGRESS_BURST_COMMAND_EGRESS_PORT_EXT (1L<<13) 738 #define MCPF_UMP_EGRESS_BURST_COMMAND_TPBUF_OFFSET (0x1fffL<<16) 739 740 u32_t mcpf_ump_egress_vlan; 741 #define MCPF_UMP_EGRESS_VLAN_EGRESS_VLAN_TAG (0xffffL<<0) 742 #define MCPF_UMP_EGRESS_VLAN_VLAN_INS (1L<<16) 743 #define MCPF_UMP_EGRESS_VLAN_VLAN_DEL (1L<<17) 744 745 u32_t mcpf_ump_egress_burst_status; 746 #define MCPF_UMP_EGRESS_BURST_STATUS_RESULT (0x3L<<0) 747 #define MCPF_UMP_EGRESS_BURST_STATUS_RESULT_BUSY (0L<<0) 748 #define MCPF_UMP_EGRESS_BURST_STATUS_RESULT_DONE (1L<<0) 749 #define MCPF_UMP_EGRESS_BURST_STATUS_RESULT_ERR0 (2L<<0) 750 #define MCPF_UMP_EGRESS_BURST_STATUS_RESULT_RSVD (3L<<0) 751 752 u32_t mcpf_ump_egress_statistic; 753 #define MCPF_UMP_EGRESS_STATISTIC_EGRESS_GOOD_CNT (0xffffL<<0) 754 #define MCPF_UMP_EGRESS_STATISTIC_EGRESS_ERROR_CNT (0xffL<<16) 755 #define MCPF_UMP_EGRESS_STATISTIC_EGRESS_DROP_CNT (0xffL<<24) 756 757 u32_t mcpf_ump_ingress_statistic; 758 #define MCPF_UMP_INGRESS_STATISTIC_INGRESS_PKT_CNT (0xffffL<<0) 759 760 u32_t mcpf_ump_arb_cmd; 761 #define MCPF_UMP_ARB_CMD_UMP_ID (0x7L<<0) 762 #define MCPF_UMP_ARB_CMD_UMP_ARB_DISABLE (1L<<4) 763 #define MCPF_UMP_ARB_CMD_UMP_ARB_START (1L<<5) 764 #define MCPF_UMP_ARB_CMD_UMP_ARB_BYPASS (1L<<6) 765 #define MCPF_UMP_ARB_CMD_UMP_ARB_AUTOBYPASS (1L<<7) 766 #define MCPF_UMP_ARB_CMD_UMP_ARB_TOKEN_IPG (0x1fL<<8) 767 #define MCPF_UMP_ARB_CMD_UMP_ARB_TOKEN_VALID (1L<<13) 768 #define MCPF_UMP_ARB_CMD_UMP_ARB_FC_DISABLE (1L<<15) 769 #define MCPF_UMP_ARB_CMD_UMP_ARB_TIMEOUT (0xffffL<<16) 770 771 u32_t mcpf_unused_f[2]; 772 u32_t mcpf_ump_frame_count; 773 #define MCPF_UMP_FRAME_COUNT_EGRESS_FRAME_COUNT (0x7fL<<0) 774 #define MCPF_UMP_FRAME_COUNT_INRESS_FRAME_COUNT (0x1fL<<16) 775 776 u32_t mcpf_ump_egress_statistic_ac; 777 #define MCPF_UMP_EGRESS_STATISTIC_AC_EGRESS_GOOD_CNT (0xffffL<<0) 778 #define MCPF_UMP_EGRESS_STATISTIC_AC_EGRESS_ERROR_CNT (0xffL<<16) 779 #define MCPF_UMP_EGRESS_STATISTIC_AC_EGRESS_DROP_CNT (0xffL<<24) 780 781 u32_t mcpf_ump_ingress_statistic_ac; 782 #define MCPF_UMP_INGRESS_STATISTIC_AC_INGRESS_PKT_CNT (0xffffL<<0) 783 784 u32_t mcpf_ump_event; 785 #define MCPF_UMP_EVENT_INGRESS_RDY_EVENT (1L<<0) 786 #define MCPF_UMP_EVENT_EGRESS_RDY_EVENT (1L<<1) 787 #define MCPF_UMP_EVENT_INGRESSBURST_DONE_EVENT (1L<<2) 788 #define MCPF_UMP_EVENT_EGRESSBURST_DONE_EVENT (1L<<3) 789 #define MCPF_UMP_EVENT_EGRESS_FRAME_DROP_EVENT (1L<<4) 790 #define MCPF_UMP_EVENT_INGRESS_RDY_EVENT_EN (1L<<16) 791 #define MCPF_UMP_EVENT_EGRESS_RDY_EVENT_EN (1L<<17) 792 #define MCPF_UMP_EVENT_INGRESSBURST_DONE_EVENT_EN (1L<<18) 793 #define MCPF_UMP_EVENT_EGRESSBURST_DONE_EVENT_EN (1L<<19) 794 #define MCPF_UMP_EVENT_EGRESS_FRAME_DROP_EVENT_EN (1L<<20) 795 796 u32_t mcpf_unused8[4033]; 797 u32_t mcpf_ump_egress_fifo_flat_space[1920]; 798 u32_t mcpf_unused9[128]; 799 u32_t mcpf_ump_ingress_fifo_flat_space[768]; 800 u32_t mcpf_unused10[1280]; 801 u32_t mcpf_unused11[65536]; 802 } mcp_fio_t; 803 804 #endif /* MCP_FIO_H */ 805