Searched refs:mcamd_prop_t (Results 1 – 5 of 5) sorted by relevance
109 mcamd_prop_t mcd_num; /* dimm number */110 mcamd_prop_t mcd_size; /* dimm size in bytes */123 mcamd_prop_t csp_num; /* Chip-select number */124 mcamd_prop_t csp_base; /* DRAM CS Base */125 mcamd_prop_t csp_mask; /* DRAM CS Mask */126 mcamd_prop_t csp_size; /* Chip-select bank size */127 mcamd_prop_t csp_csbe; /* Chip-select bank enable */128 mcamd_prop_t csp_spare; /* Spare */129 mcamd_prop_t csp_testfail; /* TestFail */130 mcamd_prop_t csp_dimmnums[MC_CHIP_DIMMPERCS]; /* dimm(s) in cs */[all …]
296 mcamd_propcode_t code, mcamd_prop_t *valp) in mcamd_get_numprop()325 mcamd_prop_t *valp; in mcamd_get_numprops()330 valp = va_arg(ap, mcamd_prop_t *); in mcamd_get_numprops()
1520 mcamd_prop_t chipid = *((mcamd_prop_t *)arg2); in mc_attach_cb()
35 mcamd_prop_t num; /* corresponding chip number */36 mcamd_prop_t rev; /* revision */37 mcamd_prop_t width; /* access width */38 mcamd_prop_t base; /* MC base address */39 mcamd_prop_t lim; /* MC limit address */40 mcamd_prop_t csbnkmap_reg; /* chip-select bank map */41 mcamd_prop_t intlven; /* Node-intlv mask */42 mcamd_prop_t intlvsel; /* Node-intlv selection for this node */43 mcamd_prop_t csintlvfctr; /* cs intlv factor on this node */44 mcamd_prop_t bnkswzl; /* bank-swizzle mode */[all …]
69 typedef uint64_t mcamd_prop_t; typedef235 mcamd_propcode_t, mcamd_prop_t *);