| /titanic_50/usr/src/cmd/mdb/intel/modules/genunix/ |
| H A D | gcore_isadep.c | 48 if (mdb_vread(&rgs, sizeof (rgs), lwp->lwp_regs) != sizeof (rgs)) { in gcore_getgregs()
49 mdb_warn("Failed to read regs from %p\n", lwp->lwp_regs); in gcore_getgregs()
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| /titanic_50/usr/src/uts/sparc/v7/sys/ |
| H A D | machpcb.h | 92 ((caddr_t)(lwp)->lwp_regs - REGOFF))
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| /titanic_50/usr/src/uts/sparc/v9/sys/ |
| H A D | machpcb.h | 96 ((caddr_t)(lwp)->lwp_regs - REGOFF))
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| H A D | privregs.h | 79 #define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs))
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| /titanic_50/usr/src/uts/intel/ia32/os/ |
| H A D | sundep.c | 406 bcopy(lwp->lwp_regs, clwp->lwp_regs, sizeof (struct regs)); in lwp_forkregs()
862 caddr_t kstktop = (caddr_t)lwp->lwp_regs; in lwp_installctx()
864 caddr_t kstktop = ((caddr_t)lwp->lwp_regs - MINFRAME) + in lwp_installctx()
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| H A D | sysi86.c | 592 struct regs *rp = lwp->lwp_regs; in setdscr()
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| /titanic_50/usr/src/uts/common/sys/ |
| H A D | klwp.h | 104 void *lwp_regs; /* pointer to saved regs on stack */ member
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| /titanic_50/usr/src/uts/intel/dtrace/ |
| H A D | dtrace_isa.c | 232 if (lwp == NULL || p == NULL || (rp = lwp->lwp_regs) == NULL) in dtrace_getupcstack()
277 if (lwp == NULL || p == NULL || (rp = lwp->lwp_regs) == NULL) in dtrace_getustackdepth()
320 if (lwp == NULL || p == NULL || (rp = lwp->lwp_regs) == NULL) in dtrace_getufpstack()
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| H A D | fasttrap_isa.c | 1691 return (fasttrap_anarg(ttolwp(curthread)->lwp_regs, 1, argno)); in fasttrap_pid_getarg()
1699 return (fasttrap_anarg(ttolwp(curthread)->lwp_regs, 0, argno)); in fasttrap_usdt_getarg()
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| /titanic_50/usr/src/uts/sparc/dtrace/ |
| H A D | dtrace_isa.c | 466 if (lwp == NULL || p == NULL || (rp = lwp->lwp_regs) == NULL) in dtrace_getupcstack()
520 if (lwp == NULL || p == NULL || (rp = lwp->lwp_regs) == NULL) in dtrace_getustackdepth()
557 if (lwp == NULL || p == NULL || (rp = lwp->lwp_regs) == NULL) in dtrace_getufpstack()
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| H A D | fasttrap_isa.c | 1368 return (fasttrap_anarg(ttolwp(curthread)->lwp_regs, argno)); in fasttrap_pid_getarg()
1376 return (fasttrap_anarg(ttolwp(curthread)->lwp_regs, argno)); in fasttrap_usdt_getarg()
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| /titanic_50/usr/src/uts/sun4/os/ |
| H A D | machdep.c | 139 lwp->lwp_regs = (void *)&mpcb->mpcb_regs; in lwp_stk_init()
202 bcopy(lwp->lwp_regs, clwp->lwp_regs, sizeof (struct machpcb) - REGOFF); in lwp_forkregs()
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| H A D | mlsetup.c | 171 lwp0.lwp_regs = (void *)rp; in mlsetup()
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| H A D | trap.c | 205 lwp->lwp_regs == rp); in trap()
1401 ASSERT(lwp->lwp_regs == rp); in fpu_trap()
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| /titanic_50/usr/src/uts/intel/ia32/sys/ |
| H A D | privregs.h | 92 #define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs))
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| /titanic_50/usr/src/cmd/mdb/common/mdb/ |
| H A D | mdb_gcore.h | 175 uintptr_t lwp_regs; member
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| /titanic_50/usr/src/uts/intel/amd64/sys/ |
| H A D | privregs.h | 112 #define lwptoregs(lwp) ((struct regs *)((lwp)->lwp_regs))
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| /titanic_50/usr/src/uts/i86pc/os/ |
| H A D | mlsetup.c | 308 lwp0.lwp_regs = (void *)rp; in mlsetup()
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| H A D | machdep.c | 869 lwp->lwp_regs = (void *)(stk + SA(MINFRAME)); in lwp_stk_init()
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| H A D | trap.c | 1266 lwp->lwp_regs = rp; in trap()
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| /titanic_50/usr/src/uts/i86pc/ml/ |
| H A D | offsets.in | 152 lwp_regs
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| /titanic_50/usr/src/uts/sun4/ml/ |
| H A D | offsets.in | 244 lwp_regs
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| /titanic_50/usr/src/uts/common/os/ |
| H A D | lwp.c | 1833 tregs = clwp->lwp_regs; in forklwp()
1861 clwp->lwp_regs = tregs; in forklwp()
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| /titanic_50/usr/src/uts/sparc/v9/os/ |
| H A D | v9dep.c | 228 fp_runq(lwp->lwp_regs); in run_fpq()
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| /titanic_50/usr/src/uts/common/dtrace/ |
| H A D | dtrace.c | 3098 return (dtrace_getreg(lwp->lwp_regs, ndx)); in dtrace_dif_variable()
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