Searched refs:link_cfg (Results 1 – 7 of 7) sorted by relevance
101 struct link_config *lc = &pi->link_cfg; in t4_mc_getstat()494 struct link_config lc_copy, *lc = &pi->link_cfg; in t4_mc_setprop()624 &pi->link_cfg); in t4_mc_setprop()658 struct link_config *lc = &pi->link_cfg; in t4_mc_getprop()730 struct link_config *lc = &pi->link_cfg; in t4_mc_propinfo()879 rc = -t4_link_start(sc, sc->mbox, pi->tx_chan, &pi->link_cfg); in t4_init_synchronized()928 pi->link_cfg.link_ok = 0; in t4_uninit_synchronized()929 pi->link_cfg.speed = 0; in t4_uninit_synchronized()940 struct link_config *lc = &pi->link_cfg; in propinfo()970 struct link_config *lc = &pi->link_cfg; in getprop()[all …]
104 return ((pi->link_cfg.supported & FW_PORT_CAP_SPEED_10G) != 0); in is_10G_port()
119 struct link_config link_cfg; member
932 mbx_cmds.mb[1] = new_cfg.link_cfg; in ql_set_mpi_port_config()961 qlge->port_cfg_info.link_cfg &= ~pause_bit_mask; in ql_set_pause_mode()965 qlge->port_cfg_info.link_cfg |= STD_PAUSE; in ql_set_pause_mode()967 qlge->port_cfg_info.link_cfg |= PP_PAUSE; in ql_set_pause_mode()978 qlge->port_cfg_info.link_cfg &= ~loop_back_bit_mask; in ql_set_loop_back_mode()981 qlge->port_cfg_info.link_cfg |= LOOP_INTERNAL_PARALLEL; in ql_set_loop_back_mode()983 qlge->port_cfg_info.link_cfg |= LOOP_INTERNAL_SERIAL; in ql_set_loop_back_mode()985 qlge->port_cfg_info.link_cfg |= LOOP_EXTERNAL_PHY; in ql_set_loop_back_mode()1014 qlge->port_cfg_info.link_cfg = mbx_cmds.mb[1]; in ql_get_port_cfg()
7005 qlge->port_cfg_info.link_cfg |= ENABLE_JUMBO; in ql_device_initialize()7009 if (qlge->port_cfg_info.link_cfg & STD_PAUSE) in ql_device_initialize()7011 else if (qlge->port_cfg_info.link_cfg & PP_PAUSE) in ql_device_initialize()7017 qlge->port_cfg_info.link_cfg &= ~pause_bit_mask; in ql_device_initialize()7019 qlge->port_cfg_info.link_cfg |= STD_PAUSE; in ql_device_initialize()7021 qlge->port_cfg_info.link_cfg |= PP_PAUSE; in ql_device_initialize()7025 if (qlge->port_cfg_info.link_cfg & DCBX_ENABLE) in ql_device_initialize()7028 qlge->port_cfg_info.link_cfg &= ~dcbx_bit_mask; in ql_device_initialize()7030 qlge->port_cfg_info.link_cfg |= DCBX_ENABLE; in ql_device_initialize()
1679 uint32_t link_cfg; member
4838 lc = &pi->link_cfg; in t4_handle_fw_rpl()5039 init_link_config(&p->link_cfg, ntohs(c.u.info.pcap)); in t4_port_init()