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Searched refs:ldg (Results 1 – 24 of 24) sorted by relevance

/titanic_50/usr/src/uts/common/io/hxge/
H A Dhpi_vir.c36 hpi_fzc_ldg_num_set(hpi_handle_t handle, uint8_t ld, uint8_t ldg) in hpi_fzc_ldg_num_set() argument
46 if (!LDG_VALID(ldg)) { in hpi_fzc_ldg_num_set()
48 " hpi_fzc_ldg_num_set ldg <0x%x>", ldg)); in hpi_fzc_ldg_num_set()
53 gnum.bits.num = ldg; in hpi_fzc_ldg_num_set()
64 hpi_ldsv_ldfs_get(hpi_handle_t handle, uint8_t ldg, uint32_t *vector0_p, in hpi_ldsv_ldfs_get() argument
69 if ((status = hpi_ldsv_get(handle, ldg, VECTOR0, vector0_p))) { in hpi_ldsv_ldfs_get()
72 if ((status = hpi_ldsv_get(handle, ldg, VECTOR1, vector1_p))) { in hpi_ldsv_ldfs_get()
83 hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector, in hpi_ldsv_get() argument
88 if (!LDG_VALID(ldg)) { in hpi_ldsv_get()
90 " hpi_ldsv_get Invalid Input ldg <0x%x>", ldg)); in hpi_ldsv_get()
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H A Dhpi_vir.h70 #define LDSVG_OFFSET(ldg) (ldg * LDSV_STEP) argument
75 #define LDG_SID_OFFSET(ldg) (ldg * LDG_SID_STEP) argument
86 uint8_t ldg; member
93 hpi_status_t hpi_fzc_ldg_num_set(hpi_handle_t handle, uint8_t ld, uint8_t ldg);
94 hpi_status_t hpi_ldsv_ldfs_get(hpi_handle_t handle, uint8_t ldg,
96 hpi_status_t hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector,
100 hpi_status_t hpi_intr_ldg_mgmt_set(hpi_handle_t handle, uint8_t ldg,
H A Dhxge_virtual.c465 int ldg, endldg, ngrps; in hxge_ldgv_init() local
525 ldg = p_cfgp->start_ldg; in hxge_ldgv_init()
531 ptr->ldg = ldg++; in hxge_ldgv_init()
537 maxldvs, maxldgs, ptr->ldg)); in hxge_ldgv_init()
543 ldg = p_cfgp->start_ldg; in hxge_ldgv_init()
549 endldg = ldg + ngrps; in hxge_ldgv_init()
755 ldgp->nldvs, ldgp->ldg)); in hxge_intr_mask_mgmt()
759 "for ldg %d", ldvp->ldv, ldgp->ldg)); in hxge_intr_mask_mgmt()
779 rs = hpi_intr_ldg_mgmt_set(handle, ldgp->ldg, in hxge_intr_mask_mgmt()
785 rs, ldgp->ldg, ldgp->ldg_timer)); in hxge_intr_mask_mgmt()
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H A Dhxge_fzc.c91 ldgp->ldg)); in hxge_fzc_intr_ldg_num_set()
154 sid.ldg = ldgp->ldg; in hxge_fzc_intr_sid_set()
158 i, sid.ldg, sid.vector)); in hxge_fzc_intr_sid_set()
H A Dhxge_hw.c177 rs = hpi_ldsv_ldfs_get(handle, t_ldgp->ldg, &vector0, &vector1); in hxge_intr()
183 "no interrupts on group %d", t_ldgp->ldg)); in hxge_intr()
215 "==> hxge_intr: arm group %d", t_ldgp->ldg)); in hxge_intr()
216 (void) hpi_intr_ldg_mgmt_set(handle, t_ldgp->ldg, in hxge_intr()
412 (void) hpi_intr_ldg_mgmt_set(handle, ldgp->ldg, in hxge_syserr_intr()
H A Dhxge_impl.h252 uint8_t ldg; /* logical group number */ member
H A Dhxge_rxdma.c1181 (void) hpi_intr_ldg_mgmt_set(handle, ldgp->ldg, B_TRUE, in hxge_rx_intr()
1188 (void) hpi_intr_ldg_mgmt_set(handle, ldgp->ldg, B_FALSE, 0); in hxge_rx_intr()
1315 (void) hpi_intr_ldg_mgmt_set(handle, ldgp->ldg, B_TRUE, in hxge_disable_poll()
1323 (void) hpi_intr_ldg_mgmt_set(handle, ldgp->ldg, B_TRUE, in hxge_disable_poll()
H A Dhxge_main.c4063 x, ldgp->ldg, ldgp->ldvp->ldv, arg1, arg2)); in hxge_add_intrs_adv_type_fix()
4070 x, ldgp->nldvs, ldgp->ldg, ldgp->ldvp->ldv, in hxge_add_intrs_adv_type_fix()
H A Dhxge_txdma.c888 (void) hpi_intr_ldg_mgmt_set(handle, ldgp->ldg, in hxge_tx_intr()
/titanic_50/usr/src/uts/common/io/nxge/npi/
H A Dnpi_vir.c175 int num_regs, i, ldg; in npi_vir_dump_ldsv() local
181 for (ldg = 0; ldg < NXGE_INT_MAX_LDGS; ldg++) { in npi_vir_dump_ldsv()
184 offset = pio_ldsv_offset[i] + 8192 * ldg; in npi_vir_dump_ldsv()
189 ldg, offset, in npi_vir_dump_ldsv()
248 int num_regs, i, ldg; in npi_vir_dump_sid() local
254 for (ldg = 0; ldg < NXGE_INT_MAX_LDGS; ldg++) { in npi_vir_dump_sid()
257 offset = fzc_pio_sid_offset[i] + 8 * ldg; in npi_vir_dump_sid()
263 ldg, offset, in npi_vir_dump_sid()
847 npi_fzc_ldg_num_set(npi_handle_t handle, uint8_t ld, uint8_t ldg) in npi_fzc_ldg_num_set() argument
859 ASSERT(LDG_VALID(ldg)); in npi_fzc_ldg_num_set()
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H A Dnpi_vir.h203 #define LDG_NUM_OFFSET(ldg) (ldg * LDG_NUM_STEP) argument
204 #define LDGNUM_OFFSET(ldg) (ldg * LDG_NUM_STEP) argument
206 #define LDSVG_OFFSET(ldg) (ldg * LDSV_STEP) argument
215 #define LDG_SID_OFFSET(ldg) (ldg * LDG_SID_STEP) argument
233 uint8_t ldg; member
/titanic_50/usr/src/uts/common/io/nxge/
H A Dnxge_intr.c132 (void) npi_intr_ldg_mgmt_set(handle, group->ldg, in nxge_intr_add()
189 (void) npi_intr_ldg_mgmt_set(handle, group->ldg, in nxge_intr_remove()
350 vector = dc->ldg.vector; in nxge_hio_intr_add()
458 vector = dc->ldg.vector; in nxge_hio_intr_remove()
554 hardware->ldg[i] = prop_val[i]; in nxge_hio_intr_init()
557 nxge->function_num, i, hardware->ldg[i])); in nxge_hio_intr_init()
793 hv_rv = (*tx->getinfo)(dc->cookie, dc->page, &dc->ldg.index, in nxge_hio_tdsv_add()
794 &dc->ldg.ldsv); in nxge_hio_tdsv_add()
803 (int)dc->ldg.index, (int)dc->ldg.ldsv)); in nxge_hio_tdsv_add()
819 dc->ldg.vector = (dc->ldg.ldsv % 2) + HIO_INTR_BLOCK_SIZE; in nxge_hio_tdsv_add()
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H A Dnxge_virtual.c2049 p_cfgp->ldg[i] = prop_val[i]; in nxge_use_default_dma_config_n2()
2053 nxgep->function_num, i, p_cfgp->ldg[i])); in nxge_use_default_dma_config_n2()
3091 ptr->ldg = p_cfgp->ldg[i]; in nxge_ldgv_init_n2()
3099 maxldvs, maxldgs, ptr->ldg, ptr)); in nxge_ldgv_init_n2()
3126 maxldvs, ldv, ldgp->ldg, ldgp, ldvp)); in nxge_ldgv_init_n2()
3141 maxldvs, ldv, ldgp->ldg, ldgp, ldvp)); in nxge_ldgv_init_n2()
3170 maxldvs, ldv, ldgp->ldg, ldgp, ldvp)); in nxge_ldgv_init_n2()
3208 ldgp->ldg = p_cfgp->ldg[chn_start]; in nxge_ldgv_init_n2()
3213 i, maxldvs, ldv, ldgp->ldg, ldgp, ldvp)); in nxge_ldgv_init_n2()
3242 ldgp->ldg = p_cfgp->ldg[chn_start]; in nxge_ldgv_init_n2()
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H A Dnxge_hw.c253 rs = npi_ldsv_ldfs_get(handle, t_ldgp->ldg, in nxge_intr()
260 "no interrupts on group %d", t_ldgp->ldg)); in nxge_intr()
292 "group %d", t_ldgp->ldg)); in nxge_intr()
293 (void) npi_intr_ldg_mgmt_set(handle, t_ldgp->ldg, in nxge_intr()
507 (void) npi_intr_ldg_mgmt_set(handle, ldgp->ldg, in nxge_syserr_intr()
H A Dnxge_fzc.c177 "in group %d", ldgp->nldvs, ldgp->ldg)); in nxge_fzc_intr_ldg_num_set()
240 sid.ldg = ldgp->ldg; in nxge_fzc_intr_sid_set()
247 i, sid.func, sid.ldg, sid.vector)); in nxge_fzc_intr_sid_set()
H A Dnxge_hio_guest.c424 return (dc->ldg.vector); in nxge_hio_get_dc_htable_idx()
959 ldgp = &nxge->ldgvp->ldgp[dc->ldg.vector]; in nxge_hio_rdc_intr_arm()
H A Dnxge_hio.c2594 group = &control->ldgp[dc->ldg.vector]; in nxge_hio_rxdma_bind_intr()
2595 device = &control->ldvp[dc->ldg.ldsv]; in nxge_hio_rxdma_bind_intr()
H A Dnxge_rxdma.c1846 LDGIMGN_REG + LDSV_OFFSET(ldgp->ldg), in nxge_rx_intr()
1908 LDGIMGN_REG + LDSV_OFFSET(ldgp->ldg), in nxge_rx_intr()
1928 LDGIMGN_REG + LDSV_OFFSET(ldgp->ldg), in nxge_rx_intr()
2860 LDGIMGN_REG + LDSV_OFFSET(ldgp->ldg), in nxge_disable_poll()
H A Dnxge_main.c6354 x, ldgp->ldg, ldgp->ldvp->ldv, in nxge_add_intrs_adv_type_fix()
6362 x, ldgp->nldvs, ldgp->ldg, ldgp->ldvp->ldv, in nxge_add_intrs_adv_type_fix()
H A Dnxge_txdma.c1211 (void) npi_intr_ldg_mgmt_set(handle, ldgp->ldg, in nxge_tx_intr()
H A Dnxge_mac.c6926 "group %d", ldgp->ldg)); in nxge_mac_intr()
7160 (void) npi_intr_ldg_mgmt_set(handle, ldgp->ldg, in nxge_mac_intr()
/titanic_50/usr/src/uts/common/sys/nxge/
H A Dnxge_hio.h295 hio_ldg_t ldg; member
H A Dnxge_common.h409 uint16_t ldg[NXGE_INT_MAX_LDG]; member
H A Dnxge_impl.h633 uint8_t ldg; /* logical group number */ member