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Searched refs:irq_enable_reg (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/intel/io/drm/
H A Dradeon_irq.c88 stat &= dev_priv->irq_enable_reg; in radeon_driver_irq_handler()
279 dev_priv->irq_enable_reg = RADEON_SW_INT_ENABLE; in radeon_enable_interrupt()
282 dev_priv->irq_enable_reg |= RADEON_CRTC_VBLANK_MASK; in radeon_enable_interrupt()
286 dev_priv->irq_enable_reg |= RADEON_CRTC2_VBLANK_MASK; in radeon_enable_interrupt()
289 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); in radeon_enable_interrupt()
H A Dradeon_drv.h296 uint32_t irq_enable_reg; member