Home
last modified time | relevance | path

Searched refs:instructions (Results 1 – 25 of 45) sorted by relevance

12

/titanic_50/usr/src/uts/sun4u/io/
H A Dpanther_asm.s174 ! UNPARK-SIBLING_CORE is 7 instructions, so we cross a cache boundary
175 UNPARK_SIBLING_CORE(%g1, %o3, %o4) ! 7 instructions
287 ! PN-ECACHE-FLUSH_LINE is 30 instructions
372 ! UNPARK-SIBLING_CORE is 7 instructions
373 UNPARK_SIBLING_CORE(%g1, %o3, %o4) ! 7 instructions
429 ! UNPARK-SIBLING_CORE is 7 instructions, so we cross a cache boundary
430 UNPARK_SIBLING_CORE(%g1, %o3, %o4) ! 7 instructions
538 ! PN-ECACHE-FLUSH_LINE is 30 instructions
621 ! UNPARK-SIBLING_CORE is 7 instructions
622 UNPARK_SIBLING_CORE(%g1, %o3, %o4) ! 7 instructions
/titanic_50/usr/src/cmd/fm/dicts/
H A DSTORAGE.po89 …to identify the failed component. If a repair is required, the repair instructions are located in …
105 …to identify the failed component. If a repair is required, the repair instructions are located in …
121 …to identify the failed component. If a repair is required, the repair instructions are located in …
137 …to identify the failed component. If a repair is required, the repair instructions are located in …
153 …to identify the failed component. If a repair is required, the repair instructions are located in …
169 …to identify the failed component. If a repair is required, the repair instructions are located in …
185 …to identify the failed component. If a repair is required, the repair instructions are located in …
201 …to identify the failed component. If a repair is required, the repair instructions are located in …
217 …to identify the failed component. If a repair is required, the repair instructions are located in …
249 …to identify the failed component. If a repair is required, the repair instructions are located in …
[all …]
/titanic_50/usr/src/grub/grub-0.97/
H A Dacinclude.m480 dnl instructions, but implicitly insert addr32 and data32 bytes so
84 dnl instructions,'' which seems right. This requires the programmer
85 dnl to explicitly insert addr32 and data32 instructions when they want
89 dnl major pain, by requiring manual assembly to get 16-bit instructions into
119 dnl appear in the same lines as the instructions they modify, while
H A DREADME18 See the file INSTALL for instructions on how to build and install the
H A DINSTALL5 This file contains instructions for compiling and installing the GRUB.
70 diffs or instructions to the address given in the `README' so they can
/titanic_50/usr/src/cmd/svc/milestone/
H A DREADME.share40 Otherwise, the following instructions describe the direct execution of
68 shell and follow instructions to update the boot archive. On an OBP-
69 based platform, type 'boot -F failsafe' and follow the instructions.
104 svc.configd(1M) will give detailed instructions for recovery if the
/titanic_50/usr/src/uts/common/io/audio/drv/audioemu10k/dsp/
H A Dasm10k.c125 static instruction_t instructions[] = { variable
643 for (i = 0; instructions[i].name != NULL; i++) in compile_asm()
644 if (strcasecmp(tokens[0], instructions[i].name) == 0) { in compile_asm()
647 EMIT_AUDIGY(instructions[i].opcode, in compile_asm()
653 EMIT(instructions[i].opcode, in compile_asm()
/titanic_50/usr/src/lib/libc/sparc/gen/
H A Dsync_instruction_memory.s63 ! when we get here, we have executed 3 instructions after the
/titanic_50/usr/src/lib/udapl/udapl_tavor/amd64/
H A Damd64.il32 / Device registers are in Big Endian byte order, so use bswap* instructions.
/titanic_50/usr/src/lib/udapl/udapl_tavor/i386/
H A Di386.il32 / Device registers are in Big Endian byte order, so use bswap instructions.
/titanic_50/usr/src/stand/lib/sa/sparc/
H A D_setjmp.s91 * We will flush our registers by doing (nwindows-1) save instructions.
/titanic_50/usr/src/cmd/sgs/rtld/i386/
H A Dboot.s100 / safely use SIMD instructions.
/titanic_50/usr/src/lib/libm/i386/src/
H A Dexp.s57 fucom / This and the next 3 instructions
H A Dexpm1f.s59 fucom / This and the next 3 instructions
/titanic_50/usr/src/cmd/perl/
H A DTHIRDPARTYLICENSE77 files, together with instructions (in the manual page or
85 together with instructions on where to get the Standard Version.
/titanic_50/usr/src/lib/libc/capabilities/sun4u/common/
H A Dmemcmp.s166 ! if fprs.fef == 0, set it. Checking it, reqires 2 instructions.
H A Dmemcpy.s105 ! if fprs.fef == 0, set it. Checking it, reqires 2 instructions.
207 ! if fprs.fef == 0, set it. Checking it, reqires 2 instructions.
270 ! if fprs.fef == 0, set it. Checking it, reqires 2 instructions.
/titanic_50/usr/src/lib/libc/sparcv9/crt/
H A D__align_cpy_4.s129 ! aligned. So, use ld and st instructions rather than trying to copy stuff
/titanic_50/usr/src/cmd/sgs/rtld.4.x/
H A Dumultiply.s73 ! wait 3 instructions after wd
/titanic_50/usr/src/tools/opensolaris/
H A DREADME.opensolaris.tmpl28 checkout from the Mercurial repository; please see instructions at:
/titanic_50/usr/src/uts/sun4u/ml/
H A Dmach_copy.s441 set .zinst, %o4 ! address of clr instructions
/titanic_50/usr/src/cmd/sgs/rtld/sparcv9/
H A Dboot_elf.s425 stx %o3, [%o0] ! store instructions into plt[0] plt[1]
548 stx %o3, [%o0] ! store instructions into plt[0] plt[1]
/titanic_50/usr/src/uts/sparc/v9/ml/
H A Dfloat.s664 ! interrupts while emulating floating point instructions
/titanic_50/usr/src/common/bignum/i386/
H A Dbignum_i386_asm.s164 / The other uses no MMX, SSE, or SSE2 instructions, only
175 / Can we use SSE2 instructions? Return value is non-zero
/titanic_50/usr/src/lib/libc/capabilities/sun4u-us3/common/
H A Dmemcpy.s152 ! if fprs.fef == 0, set it. Checking it, requires 2 instructions.
235 ! if fprs.fef == 0, set it. Checking it, requires 2 instructions.

12