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Searched refs:immu (Results 1 – 18 of 18) sorted by relevance

/titanic_50/usr/src/uts/i86pc/io/
H A Dimmu_regs.c38 #define get_reg32(immu, offset) ddi_get32((immu)->immu_regs_handle, \ argument
39 (uint32_t *)(immu->immu_regs_addr + (offset)))
40 #define get_reg64(immu, offset) ddi_get64((immu)->immu_regs_handle, \ argument
41 (uint64_t *)(immu->immu_regs_addr + (offset)))
42 #define put_reg32(immu, offset, val) ddi_put32\ argument
43 ((immu)->immu_regs_handle, \
44 (uint32_t *)(immu->immu_regs_addr + (offset)), val)
45 #define put_reg64(immu, offset, val) ddi_put64\ argument
46 ((immu)->immu_regs_handle, \
47 (uint64_t *)(immu->immu_regs_addr + (offset)), val)
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H A Dimmu_qinv.c161 static void qinv_submit_inv_dsc(immu_t *immu, qinv_dsc_t *dsc);
162 static void qinv_context_common(immu_t *immu, uint8_t function_mask,
164 static void qinv_iotlb_common(immu_t *immu, uint_t domain_id,
166 static void qinv_iec_common(immu_t *immu, uint_t iidx,
169 static void qinv_wait_sync(immu_t *immu, immu_inv_wait_t *iwp);
171 static void qinv_dev_iotlb_common(immu_t *immu, uint16_t sid,
177 qinv_submit_inv_dsc(immu_t *immu, qinv_dsc_t *dsc) in qinv_submit_inv_dsc() argument
186 qinv = (qinv_t *)immu->immu_qinv; in qinv_submit_inv_dsc()
205 immu_regs_get64(immu, IMMU_REG_INVAL_QH)); in qinv_submit_inv_dsc()
214 immu_regs_put64(immu, IMMU_REG_INVAL_QT, in qinv_submit_inv_dsc()
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H A Dimmu.c796 immu_t *immu; in immu_state_alloc() local
806 immu = kmem_zalloc(sizeof (immu_t), KM_SLEEP); in immu_state_alloc()
808 mutex_init(&(immu->immu_lock), NULL, MUTEX_DRIVER, NULL); in immu_state_alloc()
810 mutex_enter(&(immu->immu_lock)); in immu_state_alloc()
812 immu->immu_dmar_unit = dmar_unit; in immu_state_alloc()
813 immu->immu_dip = immu_dmar_unit_dip(dmar_unit); in immu_state_alloc()
815 nodename = ddi_node_name(immu->immu_dip); in immu_state_alloc()
816 instance = ddi_get_instance(immu->immu_dip); in immu_state_alloc()
818 immu->immu_name = immu_alloc_name(nodename, instance); in immu_state_alloc()
819 if (immu->immu_name == NULL) in immu_state_alloc()
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H A Dimmu_intrmap.c302 init_unit(immu_t *immu) in init_unit() argument
334 ASSERT(IMMU_ECAP_GET_QI(immu->immu_regs_excap)); in init_unit()
337 if (!IMMU_ECAP_GET_EIM(immu->immu_regs_excap)) { in init_unit()
348 if (ddi_dma_alloc_handle(immu->immu_dip, in init_unit()
383 immu->immu_intrmap = intrmap; in init_unit()
391 immu_t *immu = NULL; in get_immu() local
394 immu = immu_dmar_ioapic_immu(ioapic_index); in get_immu()
397 immu = immu_dmar_get_immu(dip); in get_immu()
400 return (immu); in get_immu()
479 intrmap_enable(immu_t *immu) in intrmap_enable() argument
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H A Dimmu_dvma.c74 static domain_t *domain_create(immu_t *immu, dev_info_t *ddip,
248 immu_devi_set_spclist(dev_info_t *dip, immu_t *immu) in immu_devi_set_spclist() argument
255 spclist = &(immu->immu_dvma_gfx_list); in immu_devi_set_spclist()
257 spclist = &(immu->immu_dvma_lpc_list); in immu_devi_set_spclist()
261 mutex_enter(&(immu->immu_lock)); in immu_devi_set_spclist()
263 mutex_exit(&(immu->immu_lock)); in immu_devi_set_spclist()
321 get_lpc_devinfo(immu_t *immu, dev_info_t *rdip, immu_flags_t immu_flags) in get_lpc_devinfo() argument
324 dvarg.dva_list = &(immu->immu_dvma_lpc_list); in get_lpc_devinfo()
347 immu_t *immu; in get_gfx_devinfo() local
356 immu = list_head(&immu_list); in get_gfx_devinfo()
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H A Drootnex.conf26 immu-enable="false";
H A Dimmu_dmar.c1233 immu_dmar_set_immu(void *dmar_unit, immu_t *immu) in immu_dmar_set_immu() argument
1238 ASSERT(immu); in immu_dmar_set_immu()
1240 drhd->dr_immu = immu; in immu_dmar_set_immu()
/titanic_50/usr/src/psm/promif/ieee1275/sun4/
H A Dprom_mmu.c41 static ihandle_t immu; in prom_mmu_ihandle() local
43 if (immu != (ihandle_t)0) in prom_mmu_ihandle()
44 return (immu); in prom_mmu_ihandle()
47 return (immu = (ihandle_t)-1); in prom_mmu_ihandle()
49 (void) prom_getprop(prom_chosennode(), "mmu", (caddr_t)(&immu)); in prom_mmu_ihandle()
50 return (immu); in prom_mmu_ihandle()
68 ihandle_t immu = prom_mmu_ihandle(); in prom_map_phys() local
70 if ((immu == (ihandle_t)-1)) in prom_map_phys()
77 ci[4] = p1275_ihandle2cell(immu); /* Arg2: mmu ihandle */ in prom_map_phys()
109 ihandle_t immu = prom_mmu_ihandle(); in prom_allocate_virt() local
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/titanic_50/usr/src/uts/i86pc/sys/
H A Dimmu.h101 struct immu;
131 struct immu *dr_immu;
554 typedef struct immu { struct
865 void immu_dmar_set_immu(void *dmar_unit, immu_t *immu);
880 void immu_regs_startup(immu_t *immu);
881 int immu_regs_resume(immu_t *immu);
882 void immu_regs_suspend(immu_t *immu);
883 void immu_regs_shutdown(immu_t *immu);
886 void immu_regs_intr(immu_t *immu, uint32_t msi_addr, uint32_t msi_data,
889 boolean_t immu_regs_passthru_supported(immu_t *immu);
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/titanic_50/usr/src/psm/promif/ieee1275/sun4u/
H A Dprom_tlb.c42 ihandle_t immu = prom_mmu_ihandle(); in prom_itlb_load() local
44 if ((immu == (ihandle_t)-1)) in prom_itlb_load()
51 ci[4] = p1275_ihandle2cell(immu); /* Arg2: mmu ihandle */ in prom_itlb_load()
72 ihandle_t immu = prom_mmu_ihandle(); in prom_dtlb_load() local
74 if ((immu == (ihandle_t)-1)) in prom_dtlb_load()
81 ci[4] = p1275_ihandle2cell(immu); /* Arg2: mmu ihandle */ in prom_dtlb_load()
/titanic_50/usr/src/psm/stand/cpr/sparcv9/sun4u/
H A Dutil.c244 ihandle_t immu; in prom_remap() local
248 immu = prom_mmu_ihandle(); in prom_remap()
249 if (immu == (ihandle_t)-1) in prom_remap()
256 ci[4] = p1275_ihandle2cell(immu); /* Arg2: memory ihandle */ in prom_remap()
/titanic_50/usr/src/uts/sun4v/promif/
H A Dpromif_emul.c199 ihandle_t immu; in read_prom_mappings() local
207 if ((immu = prom_mmu_ihandle()) == (ihandle_t)-1) { in read_prom_mappings()
211 node = (pnode_t)prom_getphandle(immu); in read_prom_mappings()
/titanic_50/usr/src/uts/i86pc/
H A DMakefile.files229 ROOTNEX_OBJS += rootnex.o immu.o immu_dmar.o immu_dvma.o \
/titanic_50/usr/src/uts/sun4u/ml/
H A Dmach_interrupt.s108 flush %g1 ! flush required by immu
H A Dmach_locore.s1627 flush %o2 ! flush required by immu
1660 flush %o2 ! flush required by immu
H A Dtrap_table.s2805 flush %g1 ! flush required by immu
/titanic_50/usr/src/uts/sun4u/cpu/
H A Dopl_olympus_asm.s275 flush %g5 ! flush required by immu
308 flush %g5 ! flush required by immu
H A Dus3_common_asm.s382 flush %g5 ! flush required by immu
415 flush %g5 ! flush required by immu