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Searched refs:eims (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/common/io/ixgbe/
H A Dixgbe_main.c3730 ixgbe->eims |= IXGBE_EICR_LSC; in ixgbe_driver_link_check()
3731 IXGBE_WRITE_REG(hw, IXGBE_EIMS, ixgbe->eims); in ixgbe_driver_link_check()
4221 ixgbe->eims = IXGBE_EIMS_ENABLE_MASK; /* shared code default */ in ixgbe_enable_adapter_interrupts()
4222 ixgbe->eims &= ~IXGBE_EIMS_TCP_TIMER; /* minus tcp timer */ in ixgbe_enable_adapter_interrupts()
4223 ixgbe->eims |= ixgbe->capab->other_intr; /* "other" interrupt types */ in ixgbe_enable_adapter_interrupts()
4233 eiac = (ixgbe->eims & ~IXGBE_OTHER_INTR); in ixgbe_enable_adapter_interrupts()
4282 IXGBE_WRITE_REG(hw, IXGBE_EIMS, ixgbe->eims); in ixgbe_enable_adapter_interrupts()
4568 ixgbe->eims |= IXGBE_EICR_GPI_SDP1; in ixgbe_intr_other_work()
4668 ixgbe->eims |= IXGBE_EICR_RTX_QUEUE; in ixgbe_intr_legacy()
4697 ixgbe->eims &= ~(eicr & IXGBE_OTHER_INTR); in ixgbe_intr_legacy()
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H A Dixgbe_debug.c56 ixgbe_log(ixgbe, "eims_mask: 0x%x\n", ixgbe->eims); in ixgbe_dump_interrupt()
H A Dixgbe_sw.h628 uint32_t eims; /* interrupt mask setting */ member
/titanic_50/usr/src/uts/common/io/igb/
H A Digb_main.c4704 uint32_t eims = 0; in igb_setup_msix_82575() local
4722 eims = (E1000_EICR_RX_QUEUE0 << i); in igb_setup_msix_82575()
4723 E1000_WRITE_REG(hw, E1000_MSIXBM(vector), eims); in igb_setup_msix_82575()
4729 igb->eims_mask |= eims; in igb_setup_msix_82575()
4738 eims = (E1000_EICR_TX_QUEUE0 << i); in igb_setup_msix_82575()
4739 E1000_WRITE_REG(hw, E1000_MSIXBM(vector), eims); in igb_setup_msix_82575()
4745 igb->eims_mask |= eims; in igb_setup_msix_82575()