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Searched refs:ecc_ce (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/sun4u/io/pci/
H A Dpci_ecc.c75 ecc_p->ecc_ce.ecc_p = ecc_p; in ecc_create()
76 ecc_p->ecc_ce.ecc_type = CBNINTR_CE; in ecc_create()
87 ecc_p->ecc_ce.ecc_afsr_pa = cb_base_pa + COMMON_CE_AFSR_OFFSET; in ecc_create()
88 ecc_p->ecc_ce.ecc_afar_pa = cb_base_pa + COMMON_CE_AFAR_OFFSET; in ecc_create()
94 ecc_p->ecc_ce.ecc_afsr_pa, ecc_p->ecc_ce.ecc_afar_pa); in ecc_create()
116 if ((ret = pci_ecc_add_intr(pci_p, CBNINTR_CE, &ecc_p->ecc_ce)) != in ecc_register_intr()
139 pci_ecc_rem_intr(pci_p, CBNINTR_CE, &ecc_p->ecc_ce); in ecc_destroy()
172 stdphysio(ecc_p->ecc_ce.ecc_afsr_pa, l); in ecc_configure()
640 if (!((ecc_read_afsr(&ecc_p->ecc_ce) >> in ecc_delayed_ce()
642 cb_clear_nintr(cb_p, ecc_p->ecc_ce.ecc_type); in ecc_delayed_ce()
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H A Dpcipsy.c1178 ecc_p->ecc_ce.ecc_errpndg_mask = 0; in pci_ecc_setup()
1179 ecc_p->ecc_ce.ecc_offset_mask = PSYCHO_ECC_CE_AFSR_DW_OFFSET; in pci_ecc_setup()
1180 ecc_p->ecc_ce.ecc_offset_shift = PSYCHO_ECC_CE_AFSR_DW_OFFSET_SHIFT; in pci_ecc_setup()
1181 ecc_p->ecc_ce.ecc_size_log2 = 3; in pci_ecc_setup()
H A Dpcisch.c1163 ecc_p->ecc_ce.ecc_errpndg_mask = SCHIZO_ECC_CE_AFSR_ERRPNDG; in pci_ecc_setup()
1164 ecc_p->ecc_ce.ecc_offset_mask = SCHIZO_ECC_CE_AFSR_QW_OFFSET; in pci_ecc_setup()
1165 ecc_p->ecc_ce.ecc_offset_shift = SCHIZO_ECC_CE_AFSR_QW_OFFSET_SHIFT; in pci_ecc_setup()
1166 ecc_p->ecc_ce.ecc_size_log2 = 4; in pci_ecc_setup()
/titanic_50/usr/src/uts/sun4u/sys/pci/
H A Dpci_ecc.h70 struct ecc_intr_info ecc_ce; member