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Searched refs:data32 (Results 1 – 20 of 20) sorted by relevance

/titanic_50/usr/src/uts/common/io/chxge/com/
H A Dch_mac.c177 u32 data32; in mac_reset() local
181 data32 = t1_read_reg_4(mac->adapter, MAC_REG_CSR(idx)); in mac_reset()
183 data32 | F_MAC_RESET); in mac_reset()
186 data32 = t1_read_reg_4(mac->adapter, in mac_reset()
188 mac_in_reset = data32 & F_MAC_RESET; in mac_reset()
220 u32 data32; in mac_set_speed_duplex_fc() local
222 data32 = t1_read_reg_4(mac->adapter, in mac_set_speed_duplex_fc()
224 data32 &= ~(F_MAC_HALF_DUPLEX | V_MAC_SPEED(M_MAC_SPEED) | in mac_set_speed_duplex_fc()
231 data32 |= V_INTERFACE(MAC_CSR_INTERFACE_MII); in mac_set_speed_duplex_fc()
232 data32 |= V_MAC_SPEED(speed == SPEED_10 ? 0 : 1); in mac_set_speed_duplex_fc()
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H A Dmv88e1xxx.c178 u32 data32; in mv88e1xxx_crossover_set() local
180 (void) simple_mdio_read(cphy, MV88E1XXX_SPECIFIC_CNTRL_REGISTER, &data32); in mv88e1xxx_crossover_set()
181 data32 &= ~V_PSCR_MDI_XOVER_MODE(M_PSCR_MDI_XOVER_MODE); in mv88e1xxx_crossover_set()
182 data32 |= V_PSCR_MDI_XOVER_MODE(crossover); in mv88e1xxx_crossover_set()
183 (void) simple_mdio_write(cphy, MV88E1XXX_SPECIFIC_CNTRL_REGISTER, data32); in mv88e1xxx_crossover_set()
H A Dpm3393.c95 static int pmread(struct cmac *cmac, u32 reg, u32 * data32) in pmread() argument
97 (void) t1_tpi_read(cmac->adapter, OFFSET(reg), data32); in pmread()
101 static int pmwrite(struct cmac *cmac, u32 reg, u32 data32) in pmwrite() argument
103 (void) t1_tpi_write(cmac->adapter, OFFSET(reg), data32); in pmwrite()
/titanic_50/usr/src/uts/common/io/drm/
H A Ddrm_scatter.c126 drm_scatter_gather_32_t data32; in drm_sg_alloc() local
128 data32.size = (uint32_t)request.size; in drm_sg_alloc()
129 data32.handle = (uint32_t)request.handle; in drm_sg_alloc()
131 DRM_COPYTO_WITH_RETURN((void *)data, &data32, in drm_sg_alloc()
132 sizeof (data32)); in drm_sg_alloc()
/titanic_50/usr/src/uts/common/rpc/sec/
H A Dsec_clnt.c175 struct des_clnt_data32 data32; in dh_k4_clnt_loadinfo() local
177 if (copyin(usrdata, &data32, sizeof (data32)) == -1) { in dh_k4_clnt_loadinfo()
180 data->syncaddr.maxlen = data32.syncaddr.maxlen; in dh_k4_clnt_loadinfo()
181 data->syncaddr.len = data32.syncaddr.len; in dh_k4_clnt_loadinfo()
183 (caddr_t)(uintptr_t)data32.syncaddr.buf; in dh_k4_clnt_loadinfo()
185 (struct knetconfig *)(uintptr_t)data32.knconf; in dh_k4_clnt_loadinfo()
186 data->netname = (caddr_t)(uintptr_t)data32.netname; in dh_k4_clnt_loadinfo()
187 data->netnamelen = data32.netnamelen; in dh_k4_clnt_loadinfo()
/titanic_50/usr/src/uts/sun4u/excalibur/io/
H A Dxcalppm.c740 uint32_t data32, buf32; in xcppm_rio_mode() local
743 data32 = buf32 = XCPPM_GET32(unitp->hndls.rio_mode_auxio, in xcppm_rio_mode()
746 data32 |= RIO_BBC_ESTAR_MODE; in xcppm_rio_mode()
748 data32 &= ~RIO_BBC_ESTAR_MODE; in xcppm_rio_mode()
750 unitp->regs.rio_mode_auxio, data32); in xcppm_rio_mode()
754 (mode == XCPPM_SETBIT) ? "DOWN" : "UP", buf32, data32)); in xcppm_rio_mode()
772 uint32_t data32; in xcppm_change_cpu_power() local
866 data32 = XCPPM_BBC_DELAY(index); in xcppm_change_cpu_power()
868 (caddr_t)unitp->regs.bbc_assert_change, data32); in xcppm_change_cpu_power()
870 "(t1) = 0x%x\n", str, chstr, data32)); in xcppm_change_cpu_power()
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/titanic_50/usr/src/grub/grub-0.97/
H A Dacinclude.m480 dnl instructions, but implicitly insert addr32 and data32 bytes so
85 dnl to explicitly insert addr32 and data32 instructions when they want
118 dnl Later versions of GAS requires that addr32 and data32 prefixes
141 grub_tmp_data32="data32"
144 grub_tmp_data32="data32;"
150 [Define it to \"data32\" or \"data32;\" to make GAS happy])
H A Dconfig.h14 #define DATA32 data32
H A Dconfig.h.in12 /* Define it to \"data32\" or \"data32;\" to make GAS happy */
H A Dconfig.status.solaris893 ${ac_dA}DATA32${ac_dB}DATA32${ac_dC}data32${ac_dD}
935 ${ac_uA}DATA32${ac_uB}DATA32${ac_uC}data32${ac_uD}
H A DChangeLog7913 * stage2/asm.S: Replace addr32 and data32 prefixes with ADDR32
7923 * stage2/asm.S: Make each of the addr32 and data32 prefixes
9183 * shared_src/shared.h: (addr32, data32): Delete definitions.
9191 implicitly inserted addr32 and data32 when .code16 was given.
9193 data32 overrides.
/titanic_50/usr/src/common/crypto/edonr/
H A Dedonr.c491 uint32_t *data32; in EdonRUpdate() local
512 data32 = (uint32_t *)hashState256(state)->LastPart; in EdonRUpdate()
515 data32 = (uint32_t *)data; in EdonRUpdate()
517 bits_processed = Q256(databitlen, data32, in EdonRUpdate()
528 data32 += bits_processed >> 5; /* byte size update */ in EdonRUpdate()
529 bcopy(data32, hashState256(state)->LastPart, LastBytes); in EdonRUpdate()
573 uint32_t *data32; in EdonRFinal() local
616 data32 = (uint32_t *)hashState256(state)->LastPart; in EdonRFinal()
617 state->bits_processed += Q256(databitlen, data32, in EdonRFinal()
/titanic_50/usr/src/uts/common/io/ib/adapters/hermon/
H A Dhermon.c3803 uint32_t data32; /* for devctl & linkctl */ in hermon_sw_reset() local
3920 data32 = state->hs_pci_cap_devctl; in hermon_sw_reset()
3921 pci_config_put32(hdl, offset + HERMON_PCI_CAP_DEV_OFFS, data32); in hermon_sw_reset()
3922 data32 = state->hs_pci_cap_lnkctl; in hermon_sw_reset()
3923 pci_config_put32(hdl, offset + HERMON_PCI_CAP_LNK_OFFS, data32); in hermon_sw_reset()
4088 uint32_t data32; in hermon_pci_capability_list() local
4147 data32 = pci_config_get32(hdl, in hermon_pci_capability_list()
4149 state->hs_pci_cap_devctl = data32; in hermon_pci_capability_list()
4150 data32 = pci_config_get32(hdl, in hermon_pci_capability_list()
4152 state->hs_pci_cap_lnkctl = data32; in hermon_pci_capability_list()
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H A Dhermon_cmd.c3272 uint32_t data32; in hermon_read_mgm_cmd_post() local
3310 data32 = ddi_get32(mbox_info.mbi_out->mb_acchdl, in hermon_read_mgm_cmd_post()
3312 ((uint32_t *)mcg)[i + 8] = data32; in hermon_read_mgm_cmd_post()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_ioctl.c937 uint32_t start_addr, *lptr, data32; in ql_nv_util_load() local
991 data32 = *lptr++; in ql_nv_util_load()
992 LITTLE_ENDIAN_32(&data32); in ql_nv_util_load()
994 data32); in ql_nv_util_load()
1153 uint32_t start_addr, vpd_size, *lptr, data32; in ql_vpd_load() local
1224 data32 = *lptr++; in ql_vpd_load()
1225 LITTLE_ENDIAN_32(&data32); in ql_vpd_load()
1227 data32); in ql_vpd_load()
/titanic_50/usr/src/uts/common/io/1394/adapters/
H A Dhci1394_q.c1483 uint32_t data32; in hci1394_q_ar_get32() local
1498 data32 = ddi_get32(data->qb_buf.bi_handle, in hci1394_q_ar_get32()
1503 data32 = ddi_get32(data->qb_buf.bi_handle, addr); in hci1394_q_ar_get32()
1508 return (data32); in hci1394_q_ar_get32()
H A Dhci1394_async.c2681 uint32_t data32[2]; in hci1394_async_lock() local
2754 data32[0] = HCI1394_ARITH_LOCK_SWAP32( in hci1394_async_lock()
2756 data32[1] = HCI1394_ARITH_LOCK_SWAP32( in hci1394_async_lock()
2758 datap = (uint8_t *)data32; in hci1394_async_lock()
3035 uint32_t data32; in hci1394_async_lock_response() local
3132 data32 = HCI1394_ARITH_LOCK_SWAP32( in hci1394_async_lock_response()
3134 datap = (uint8_t *)&data32; in hci1394_async_lock_response()
/titanic_50/usr/src/uts/common/io/ib/adapters/tavor/
H A Dtavor.c3042 uint32_t data32; in tavor_pci_capability_vpd() local
3067 data32 = vpd.vpd_int[i]; in tavor_pci_capability_vpd()
3069 (uchar_t)((data32 & 0xFF000000) >> 24); in tavor_pci_capability_vpd()
3071 (uchar_t)((data32 & 0x00FF0000) >> 16); in tavor_pci_capability_vpd()
3073 (uchar_t)((data32 & 0x0000FF00) >> 8); in tavor_pci_capability_vpd()
3074 vpd.vpd_char[i << 2] = (uchar_t)(data32 & 0x000000FF); in tavor_pci_capability_vpd()
/titanic_50/usr/src/uts/intel/io/amd8111s/
H A Damd8111s_hw.c217 unsigned int data32; in mdlClearHWConfig() local
260 data32 = READ_REG32(pLayerPointers, MemBaseAddress + INT0); in mdlClearHWConfig()
261 WRITE_REG32(pLayerPointers, MemBaseAddress + INT0, data32); in mdlClearHWConfig()
/titanic_50/usr/src/uts/common/io/urtw/
H A Durtw.c2681 uint32_t data32; in urtw_8225v2_rf_init() local
2744 if (error = urtw_8225_read(sc, 0x6, &data32)) in urtw_8225v2_rf_init()
2746 if (data32 != 0xe6) { in urtw_8225v2_rf_init()
2748 cmn_err(CE_WARN, "expect 0xe6!! (0x%x)\n", data32); in urtw_8225v2_rf_init()
2751 if (!(data32 & 0x80)) { in urtw_8225v2_rf_init()
2758 if (error = urtw_8225_read(sc, 0x6, &data32)) in urtw_8225v2_rf_init()
2760 if (!(data32 & 0x80)) in urtw_8225v2_rf_init()