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Searched refs:ctrl_p (Results 1 – 9 of 9) sorted by relevance

/titanic_50/usr/src/uts/common/io/pciex/hotplug/
H A Dpciehpc.c68 static int pciehpc_hpc_init(pcie_hp_ctrl_t *ctrl_p);
69 static int pciehpc_hpc_uninit(pcie_hp_ctrl_t *ctrl_p);
70 static int pciehpc_slotinfo_init(pcie_hp_ctrl_t *ctrl_p);
71 static int pciehpc_slotinfo_uninit(pcie_hp_ctrl_t *ctrl_p);
72 static int pciehpc_enable_intr(pcie_hp_ctrl_t *ctrl_p);
73 static int pciehpc_disable_intr(pcie_hp_ctrl_t *ctrl_p);
76 static int pciehpc_register_slot(pcie_hp_ctrl_t *ctrl_p);
77 static int pciehpc_unregister_slot(pcie_hp_ctrl_t *ctrl_p);
82 static void pciehpc_issue_hpc_command(pcie_hp_ctrl_t *ctrl_p, uint16_t control);
83 static void pciehpc_attn_btn_handler(pcie_hp_ctrl_t *ctrl_p);
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H A Dpcishpc.c73 static int pcishpc_setup_controller(pcie_hp_ctrl_t *ctrl_p);
75 static pcie_hp_slot_t *pcishpc_create_slot(pcie_hp_ctrl_t *ctrl_p);
76 static int pcishpc_register_slot(pcie_hp_ctrl_t *ctrl_p, int slot);
77 static int pcishpc_destroy_slots(pcie_hp_ctrl_t *ctrl_p);
82 static int pcishpc_issue_command(pcie_hp_ctrl_t *ctrl_p,
84 static int pcishpc_wait_busy(pcie_hp_ctrl_t *ctrl_p);
89 static void pcishpc_set_slot_name(pcie_hp_ctrl_t *ctrl_p, int slot);
100 static uint32_t pcishpc_read_reg(pcie_hp_ctrl_t *ctrl_p, int reg);
101 static void pcishpc_write_reg(pcie_hp_ctrl_t *ctrl_p, int reg,
118 static void pcishpc_dump_regs(pcie_hp_ctrl_t *ctrl_p);
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H A Dpcie_hp.c321 pcie_hp_ctrl_t *ctrl_p = slot_p->hs_ctrl; in pcie_hp_probe() local
322 dev_info_t *dip = ctrl_p->hc_dip; in pcie_hp_probe()
354 pcie_hp_ctrl_t *ctrl_p = slot_p->hs_ctrl; in pcie_hp_unprobe() local
355 dev_info_t *dip = ctrl_p->hc_dip; in pcie_hp_unprobe()
471 pcie_hp_ctrl_t *ctrl_p = (pcie_hp_ctrl_t *)bus_p->bus_hp_ctrl; in pcie_hp_create_occupant_props() local
480 slotp = (ctrl_p && (pci_dev == 0)) ? in pcie_hp_create_occupant_props()
481 ctrl_p->hc_slots[pci_dev] : NULL; in pcie_hp_create_occupant_props()
483 if (ctrl_p) { in pcie_hp_create_occupant_props()
486 slot_num = (ctrl_p->hc_device_increases) ? in pcie_hp_create_occupant_props()
487 (pci_dev - ctrl_p->hc_device_start) : in pcie_hp_create_occupant_props()
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/titanic_50/usr/src/uts/intel/io/pciex/hotplug/
H A Dpciehpc_acpi.c50 static int pciehpc_acpi_hpc_init(pcie_hp_ctrl_t *ctrl_p);
51 static int pciehpc_acpi_hpc_uninit(pcie_hp_ctrl_t *ctrl_p);
52 static int pciehpc_acpi_slotinfo_init(pcie_hp_ctrl_t *ctrl_p);
53 static int pciehpc_acpi_slotinfo_uninit(pcie_hp_ctrl_t *ctrl_p);
54 static int pciehpc_acpi_enable_intr(pcie_hp_ctrl_t *ctrl_p);
55 static int pciehpc_acpi_disable_intr(pcie_hp_ctrl_t *ctrl_p);
60 static void pciehpc_acpi_setup_ops(pcie_hp_ctrl_t *ctrl_p);
62 static ACPI_STATUS pciehpc_acpi_install_event_handler(pcie_hp_ctrl_t *ctrl_p);
63 static void pciehpc_acpi_uninstall_event_handler(pcie_hp_ctrl_t *ctrl_p);
64 static ACPI_STATUS pciehpc_acpi_power_on_slot(pcie_hp_ctrl_t *ctrl_p);
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/titanic_50/usr/src/cmd/nscd/
H A Dnscd_nswstate.c391 nscd_state_ctrl_t *ctrl_p; in _get_nsw_state_int() local
515 ctrl_p = &base->nsw_state; in _get_nsw_state_int()
518 ctrl_p = &base->nsw_state_thr; in _get_nsw_state_int()
525 ctrl_p->free); in _get_nsw_state_int()
527 ctrl_p->allocated); in _get_nsw_state_int()
529 ctrl_p->first); in _get_nsw_state_int()
531 ctrl_p->waiter); in _get_nsw_state_int()
536 if (ctrl_p->first == NULL && ctrl_p->allocated == ctrl_p->max) in _get_nsw_state_int()
543 ctrl_p->waiter++; in _get_nsw_state_int()
561 ctrl_p->first != NULL) in _get_nsw_state_int()
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/titanic_50/usr/src/uts/common/sys/hotplug/pci/
H A Dpciehpc.h42 void pciehpc_set_slot_name(pcie_hp_ctrl_t *ctrl_p);
43 uint8_t pciehpc_reg_get8(pcie_hp_ctrl_t *ctrl_p, uint_t off);
44 uint16_t pciehpc_reg_get16(pcie_hp_ctrl_t *ctrl_p, uint_t off);
45 uint32_t pciehpc_reg_get32(pcie_hp_ctrl_t *ctrl_p, uint_t off);
46 void pciehpc_reg_put8(pcie_hp_ctrl_t *ctrl_p, uint_t off, uint8_t val);
47 void pciehpc_reg_put16(pcie_hp_ctrl_t *ctrl_p, uint_t off, uint16_t val);
48 void pciehpc_reg_put32(pcie_hp_ctrl_t *ctrl_p, uint_t off, uint32_t val);
50 extern void pciehpc_update_ops(pcie_hp_ctrl_t *ctrl_p);
H A Dpcie_hp.h88 #define PCIE_SET_HP_CTRL(dip, ctrl_p) \ argument
89 (PCIE_DIP2BUS(dip)->bus_hp_ctrl) = (pcie_hp_ctrl_t *)ctrl_p
126 int (*init_hpc_hw)(pcie_hp_ctrl_t *ctrl_p);
129 int (*uninit_hpc_hw)(pcie_hp_ctrl_t *ctrl_p);
132 int (*init_hpc_slotinfo)(pcie_hp_ctrl_t *ctrl_p);
135 int (*uninit_hpc_slotinfo)(pcie_hp_ctrl_t *ctrl_p);
147 int (*enable_hpc_intr)(pcie_hp_ctrl_t *ctrl_p);
150 int (*disable_hpc_intr)(pcie_hp_ctrl_t *ctrl_p);
H A Dpcishpc.h36 int pcishpc_enable_irqs(pcie_hp_ctrl_t *ctrl_p);
37 int pcishpc_disable_irqs(pcie_hp_ctrl_t *ctrl_p);
/titanic_50/usr/src/uts/common/io/pciex/
H A Dpcie.c287 pcie_hp_ctrl_t *ctrl_p = PCIE_GET_HP_CTRL(dip); in pcie_hpintr_enable() local
290 (void) (ctrl_p->hc_ops.enable_hpc_intr)(ctrl_p); in pcie_hpintr_enable()
292 (void) pcishpc_enable_irqs(ctrl_p); in pcie_hpintr_enable()
307 pcie_hp_ctrl_t *ctrl_p = PCIE_GET_HP_CTRL(dip); in pcie_hpintr_disable() local
310 (void) (ctrl_p->hc_ops.disable_hpc_intr)(ctrl_p); in pcie_hpintr_disable()
312 (void) pcishpc_disable_irqs(ctrl_p); in pcie_hpintr_disable()