| /titanic_50/usr/src/uts/i86pc/ml/ |
| H A D | fb_swtch_src.s | 176 movq %cr4, %rax
178 movq %rax, %cr4
239 movl %cr4, %eax
241 movl %eax, %cr4
263 movl %cr4, %eax
265 movl %eax, %cr4
300 movl %cr4, %eax
302 movl %eax, %cr4
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| H A D | mpcore.s | 147 movl %cr4, %eax
154 movl %eax, %cr4
362 D16 movl %cr4, %eax
364 D16 movl %eax, %cr4
420 movl %cr4, %ecx
454 D16 mov %cr4, %eax
456 D16 mov %eax, %cr4
511 movl %cr4, %ecx
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| H A D | cpr_wakecode.s | 112 movq %cr4, %rdx
196 movl %cr4, %edx
345 movl %cr4, %eax
352 movl %eax, %cr4
674 movq WC_CR4(%rbx), %rax / restore full cr4 (with Global Enable)
675 movq %rax, %cr4
942 D16 A16 movl %cs:WC_CR4(%ebx), %eax / restore cr4
1062 / By this time GDT and IDT are loaded as is cr0, cr3 and cr4.
1092 movl WC_CR4(%ebx), %eax / restore full cr4 (with Global Enable)
1093 movl %eax, %cr4
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| H A D | bios_call_src.s | 126 MOVCR( %cr4, save_cr4)
350 movl %eax, %cr4
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| /titanic_50/usr/src/cmd/mdb/i86pc/modules/unix/ |
| H A D | unix_sup.s | 47 movq %cr4, %rax
58 movl %cr4, %eax
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| H A D | unix.c | 889 ulong_t cr0, cr4; in crregs_dcmd() local
925 cr4 = kmdb_unix_getcr4(); in crregs_dcmd()
927 mdb_printf("%%cr4 = 0x%08x <%b>\n", cr4, cr4, cr4_flag_bits); in crregs_dcmd()
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| /titanic_50/usr/src/uts/i86pc/dboot/ |
| H A D | dboot_grub.s | 226 movl %cr4, %eax
239 movl %eax, %cr4
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| /titanic_50/usr/src/uts/i86pc/os/ |
| H A D | cmi_hw.c | 1687 ulong_t cr4; in cmi_ntv_hwdisable_mce_xc() local
1689 cr4 = getcr4(); in cmi_ntv_hwdisable_mce_xc()
1690 cr4 = cr4 & (~CR4_MCE); in cmi_ntv_hwdisable_mce_xc()
1691 setcr4(cr4); in cmi_ntv_hwdisable_mce_xc()
1768 ulong_t cr4; in cmi_hdl_enable_mce() local
1774 cr4 = HDLOPS(hdl)->cmio_getcr4(hdl); in cmi_hdl_enable_mce()
1776 HDLOPS(hdl)->cmio_setcr4(hdl, cr4 | CR4_MCE); in cmi_hdl_enable_mce()
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| H A D | startup.c | 2730 ulong_t cr0, cr0_orig, cr4; in pat_sync() local
2735 cr4 = getcr4(); in pat_sync()
2742 if (cr4 & CR4_PGE) { in pat_sync()
2743 setcr4(cr4 & ~(ulong_t)CR4_PGE); in pat_sync()
2744 setcr4(cr4); in pat_sync()
2753 if (cr4 & CR4_PGE) { in pat_sync()
2754 setcr4(cr4 & ~(ulong_t)CR4_PGE); in pat_sync()
2755 setcr4(cr4); in pat_sync()
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| H A D | cpr_impl.c | 89 init_real_mode_platter(int cpun, uint32_t offset, uint_t cr4, wc_desctbr_t gdt);
862 init_real_mode_platter(int cpun, uint32_t offset, uint_t cr4, wc_desctbr_t gdt) in init_real_mode_platter() argument
876 real_mode_platter->rm_cr4 = cr4; in init_real_mode_platter()
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| /titanic_50/usr/src/uts/intel/ia32/ml/ |
| H A D | i86_subr.s | 558 movq %cr4, %rax
563 movq %rdi, %cr4
640 movl %cr4, %eax
646 movl %eax, %cr4
3079 movq %cr4, %rax
3105 movq %cr4, %rax
3145 movl %cr4, %eax
3165 movl %cr4, %eax
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| /titanic_50/usr/src/uts/i86pc/vm/ |
| H A D | hat_i86.c | 1971 ulong_t cr4 = getcr4(); in flush_all_tlb_entries() local
1973 if (cr4 & CR4_PGE) { in flush_all_tlb_entries()
1974 setcr4(cr4 & ~(ulong_t)CR4_PGE); in flush_all_tlb_entries()
1975 setcr4(cr4); in flush_all_tlb_entries()
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