Searched refs:cpu_intr_actv (Results 1 – 20 of 20) sorted by relevance
511 uint16_t active = (uint16_t)cpu->cpu_intr_actv; in set_base_spl()551 mask = cpu->cpu_intr_actv & CPU_INTR_ACTV_HIGH_LEVEL_MASK; in hilevel_intr_prolog()593 ASSERT((cpu->cpu_intr_actv & (1 << pil)) == 0); in hilevel_intr_prolog()602 uint16_t *refcntp = (uint16_t *)&cpu->cpu_intr_actv + 1; in hilevel_intr_prolog()606 mask = cpu->cpu_intr_actv; in hilevel_intr_prolog()608 cpu->cpu_intr_actv |= (1 << pil); in hilevel_intr_prolog()634 ASSERT(cpu->cpu_intr_actv & (1 << pil)); in hilevel_intr_epilog()643 uint16_t *refcntp = (uint16_t *)&cpu->cpu_intr_actv + 1; in hilevel_intr_epilog()648 cpu->cpu_intr_actv &= ~(1 << pil); in hilevel_intr_epilog()650 cpu->cpu_intr_actv &= ~(1 << pil); in hilevel_intr_epilog()[all …]
844 CPU->cpu_intr_actv |= (1 << (XC_SYS_PIL - 1)); in mp_disable_intr()860 CPU->cpu_intr_actv &= ~(1 << (XC_SYS_PIL - 1)); in mp_enable_intr()
983 cp->cpu_id, cp->cpu_intr_actv)) in i_cpr_start_cpu()
287 ASSERT((cpu->cpu_intr_actv & (1 << pil)) == 0); in apix_do_softint_prolog()288 cpu->cpu_intr_actv |= (1 << pil); in apix_do_softint_prolog()314 ASSERT(cpu->cpu_intr_actv & (1 << pil)); in apix_do_softint_epilog()315 cpu->cpu_intr_actv &= ~(1 << pil); in apix_do_softint_epilog()439 mask = cpu->cpu_intr_actv & CPU_INTR_ACTV_HIGH_LEVEL_MASK; in apix_hilevel_intr_prolog()479 uint16_t *refcntp = (uint16_t *)&cpu->cpu_intr_actv + 1; in apix_hilevel_intr_prolog()483 cpu->cpu_intr_actv |= (1 << pil); in apix_hilevel_intr_prolog()501 ASSERT(cpu->cpu_intr_actv & (1 << pil)); in apix_hilevel_intr_epilog()510 uint16_t *refcntp = (uint16_t *)&cpu->cpu_intr_actv + 1; in apix_hilevel_intr_epilog()515 cpu->cpu_intr_actv &= ~(1 << pil); in apix_hilevel_intr_epilog()[all …]
46 /(self->done == 0) && (curthread->t_cpu->cpu_intr_actv == 0) /56 /(self->done == 0) && (curthread->t_cpu->cpu_intr_actv == 0) /
241 intr_actv = cp->cpu_intr_actv; in panicsys()252 cp->cpu_intr_actv &= ((1 << (LOCK_LEVEL + 1)) - 1); in panicsys()303 panic_cpu.cpu_intr_actv = intr_actv; in panicsys()
1420 if ((!no_quiesce && cp->cpu_intr_actv != 0) || in cpu_offline()
236 if (cp->cpu_intr_actv == 0 && in mp_cpu_quiesce()247 if (cp->cpu_intr_actv) { in mp_cpu_quiesce()
566 cp->cpu_intr_actv = 0; /* clear the value from previous life */ in restart_other_cpu()
149 uint_t cpu_intr_actv; /* interrupt levels active (bitmask) */ member274 #define CPU_ON_INTR(cpup) ((cpup)->cpu_intr_actv >> (LOCK_LEVEL + 1))288 ((cpup)->cpu_intr_actv & (1 << (level))) : (CPU_ON_INTR(cpup)))
202 cpu_intr_actv
146 ! current_thread starts at PIL_MAX to protect cpu_intr_actv1223 ! ASSERT(CPU->cpu_intr_actv & (1 << PIL))1305 ! Use cpu_intr_actv to find the cpu_pil_high_start[] offset for the1307 ! Create mask for cpu_intr_actv. Begin by looking for bits set
343 cpu_intr_actv
802 ASSERT(cp->cpu_intr_actv == 0); in sbdp_cpu_shutdown_self()
1352 ASSERT(CPU->cpu_intr_actv & (1 << i)); in thread_unpin()
1995 ocp->cpu_intr_actv != 0) in disp_getwork()
3278 ASSERT(CPU->cpu_intr_actv == 0); in fhc_cpu_shutdown_self()
2554 ASSERT(cp->cpu_intr_actv == 0); in drmach_cpu_shutdown_self()
5531 ASSERT(cp->cpu_intr_actv == 0); in drmach_cpu_shutdown_self()
347 uint_t actv = CPU->cpu_intr_actv >> (LOCK_LEVEL + 1); \