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Searched refs:cmi_hdl_wrmsr (Results 1 – 6 of 6) sorted by relevance

/titanic_50/usr/src/uts/i86pc/cpu/generic_cpu/
H A Dgcpu_mca.c1236 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC_CTL2(i), ctl2); in gcpu_mca_init()
1247 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC_CTL2(i), ctl2); in gcpu_mca_init()
1329 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC(i, CTL), in gcpu_mca_init()
1334 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC(i, STATUS), in gcpu_mca_init()
1346 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MCG_STATUS, 0ULL); in gcpu_mca_init()
1351 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MCG_CTL, in gcpu_mca_init()
1542 (void) cmi_hdl_wrmsr(hdl, in gcpu_cmci_logout()
1583 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC_CTL2(bank), in gcpu_cmci_throttle()
1632 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC(i, STATUS), 0ULL); in clear_mc()
1661 (void) cmi_hdl_wrmsr(hdl, in clear_mc()
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H A Dgcpu_poll_ntv.c106 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC_CTL2(i), in gcpu_ntv_mca_poll()
130 (void) cmi_hdl_wrmsr(hdl, in gcpu_ntv_mca_poll()
/titanic_50/usr/src/uts/i86pc/cpu/amd_opteron/
H A Dao_mca.c332 (void) cmi_hdl_wrmsr(hdl, AMD_MSR_NB_MISC, nval); in nb_mcamisc_init()
762 if (cmi_hdl_wrmsr(hdl, msr, val) == CMI_SUCCESS) in ao_ms_msrinject()
832 (void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr); in ao_bankstatus_prewrite()
846 (void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr); in ao_bankstatus_postwrite()
/titanic_50/usr/src/uts/i86pc/cpu/authenticamd/
H A Dauthamd_main.c258 (void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr); in authamd_bankstatus_prewrite()
269 (void) cmi_hdl_wrmsr(hdl, MSR_AMD_HWCR, hwcr); in authamd_bankstatus_postwrite()
719 (void) cmi_hdl_wrmsr(hdl, MC_MSR_NB_MISC(i), in authamd_mca_init()
1116 if (cmi_hdl_wrmsr(hdl, msr, val) == CMI_SUCCESS) in authamd_msrinject()
/titanic_50/usr/src/uts/intel/sys/
H A Dcpu_module.h143 extern cmi_errno_t cmi_hdl_wrmsr(cmi_hdl_t, uint_t, uint64_t);
/titanic_50/usr/src/uts/i86pc/os/
H A Dcmi_hw.c1751 cmi_hdl_wrmsr(cmi_hdl_t ophdl, uint_t msr, uint64_t val) in cmi_hdl_wrmsr() function