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Searched refs:cfg_value (Results 1 – 6 of 6) sorted by relevance

/titanic_50/usr/src/uts/common/io/nxge/
H A Dnxge_ndd.c569 uint32_t *cfg_value; in nxge_get_param_soft_properties() local
575 cfg_value = in nxge_get_param_soft_properties()
578 cfg_value = (uint32_t *)param_arr[i].value; in nxge_get_param_soft_properties()
581 cfg_value[j] = int_prop_val[j]; in nxge_get_param_soft_properties()
1283 uint32_t cfg_value; in nxge_param_rx_intr_pkts() local
1288 cfg_value = (uint32_t)mi_strtol(value, &end, BASE_ANY); in nxge_param_rx_intr_pkts()
1290 if ((cfg_value > NXGE_RDC_RCR_THRESHOLD_MAX) || in nxge_param_rx_intr_pkts()
1291 (cfg_value < NXGE_RDC_RCR_THRESHOLD_MIN)) { in nxge_param_rx_intr_pkts()
1295 if ((pa->value != cfg_value)) { in nxge_param_rx_intr_pkts()
1297 pa->value = cfg_value; in nxge_param_rx_intr_pkts()
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H A Dnxge_classify.c202 uint64_t cfg_value; in nxge_classify_get_cfg_value() local
208 cfg_value = class_quick_config_web_server[cfg_param]; in nxge_classify_get_cfg_value()
212 cfg_value = class_quick_config_distribute[cfg_param]; in nxge_classify_get_cfg_value()
215 return (cfg_value); in nxge_classify_get_cfg_value()
H A Dnxge_virtual.c1042 uint_t new_value, cfg_value[MAX_SIBLINGS]; in nxge_cfg_verify_set_classify_prop() local
1063 cfg_value[i] = known_cfg_value; in nxge_cfg_verify_set_classify_prop()
1067 cfg_value[i] = *cfg_val; in nxge_cfg_verify_set_classify_prop()
1094 if (cfg_value[i] != cfg_value[i - 1]) { in nxge_cfg_verify_set_classify_prop()
1134 uint64_t cfg_value; in nxge_class_get_known_cfg() local
1138 cfg_value = param_arr[class_prop].value; in nxge_class_get_known_cfg()
1145 cfg_value = nxge_classify_get_cfg_value(nxgep, in nxge_class_get_known_cfg()
1149 cfg_value = param_arr[class_prop].value; in nxge_class_get_known_cfg()
1152 return (cfg_value); in nxge_class_get_known_cfg()
1162 uint64_t cfg_value; in nxge_cfg_verify_set_classify() local
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/titanic_50/usr/src/uts/common/io/hxge/
H A Dhxge_ndd.c255 uint64_t *cfg_value; in hxge_get_param_soft_properties() local
261 cfg_value = in hxge_get_param_soft_properties()
264 cfg_value = (uint64_t *)param_arr[i].value; in hxge_get_param_soft_properties()
267 cfg_value[j] = int_prop_val[j]; in hxge_get_param_soft_properties()
667 uint32_t cfg_value; in hxge_param_rx_intr_pkts() local
675 cfg_value = (uint32_t)mi_strtol(value, &end, BASE_HEX); in hxge_param_rx_intr_pkts()
677 if ((cfg_value > HXGE_RDC_RCR_THRESHOLD_MAX) || in hxge_param_rx_intr_pkts()
678 (cfg_value < HXGE_RDC_RCR_THRESHOLD_MIN)) { in hxge_param_rx_intr_pkts()
682 if ((pa->value != cfg_value)) { in hxge_param_rx_intr_pkts()
684 pa->value = cfg_value; in hxge_param_rx_intr_pkts()
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H A Dhxge_virtual.c389 uint32_t cfg_value; in hxge_set_hw_class_config() local
411 cfg_value = (uint32_t)*int_prop_val; in hxge_set_hw_class_config()
414 cfg_value = (uint32_t)param_arr[i].value; in hxge_set_hw_class_config()
418 p_class_cfgp->class_cfg[j] = cfg_value; in hxge_set_hw_class_config()
432 cfg_value = (uint32_t)*int_prop_val; in hxge_set_hw_class_config()
435 cfg_value = (uint32_t)param_arr[i].value; in hxge_set_hw_class_config()
439 p_class_cfgp->class_cfg[j] = cfg_value; in hxge_set_hw_class_config()
446 cfg_value = (uint32_t)*int_prop_val; in hxge_set_hw_class_config()
449 cfg_value = (uint32_t)param_arr[param_hash_init_value].value; in hxge_set_hw_class_config()
452 p_class_cfgp->init_hash = (uint32_t)cfg_value; in hxge_set_hw_class_config()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_sli3.c2034 uint16_t cfg_value; in emlxs_sli3_hba_reset() local
2106 cfg_value = ddi_get16(hba->pci_acc_handle, in emlxs_sli3_hba_reset()
2111 (uint16_t)(cfg_value & ~(CMD_PARITY_CHK | CMD_SERR_ENBL))); in emlxs_sli3_hba_reset()
2122 (uint16_t)cfg_value); in emlxs_sli3_hba_reset()