| /titanic_50/usr/src/uts/sparc/v9/fpu/ |
| H A D | v9instr.c | 281 } ccr; in fmovcc_icc() local
287 ccr.i = (uint32_t)((tstate >> TSTATE_CCR_SHIFT) & 0xf); in fmovcc_icc()
290 ccr.i = (uint32_t)(((tstate >> TSTATE_CCR_SHIFT) & 0xf0) >> 4); in fmovcc_icc()
300 moveit = (int)(ccr.cc.z); in fmovcc_icc()
303 moveit = (int)(ccr.cc.z | (ccr.cc.n ^ ccr.cc.v)); in fmovcc_icc()
306 moveit = (int)(ccr.cc.n ^ ccr.cc.v); in fmovcc_icc()
309 moveit = (int)(ccr.cc.c | ccr.cc.z); in fmovcc_icc()
312 moveit = (int)(ccr.cc.c); in fmovcc_icc()
315 moveit = (int)(ccr.cc.n); in fmovcc_icc()
318 moveit = (int)(ccr.cc.v); in fmovcc_icc()
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| /titanic_50/usr/src/lib/libc/capabilities/sun4v/common/ |
| H A D | smt_pause.s | 46 rd %ccr, %g0
47 rd %ccr, %g0
49 rd %ccr, %g0
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| /titanic_50/usr/src/uts/sun4v/cpu/ |
| H A D | niagara2_asm.s | 167 rd %ccr, %g0
168 rd %ccr, %g0
170 rd %ccr, %g0
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| /titanic_50/usr/src/uts/sparc/v9/ml/ |
| H A D | sparcv9_subr.s | 1731 ! to store the %ccr, %asi, %pstate, and %cwp as they would appear
1735 rd %ccr, %l0 ! %l0 = %ccr
1777 wr %g0, %ccr ! clear condition codes
1780 rd %ccr, %o0 ! return condition codes
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| H A D | float.s | 526 rd %ccr, %o0 ! save ccr
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| H A D | lock_prim.s | 798 rd %ccr, %g0
799 rd %ccr, %g0
801 rd %ccr, %g0
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| /titanic_50/usr/src/uts/sun4v/os/ |
| H A D | mach_trap.c | 169 uint32_t gl, ccr, asi, cwp, pstate; in ptl1_showtrap() local
174 ccr = (tstate >> TSTATE_CCR_SHIFT) & TSTATE_CCR_MASK; in ptl1_showtrap()
181 "%%pstate: %b\n", gl, ccr, asi, cwp, pstate, PSTATE_BITS); in ptl1_showtrap()
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| /titanic_50/usr/src/uts/sun4u/os/ |
| H A D | mach_trap.c | 195 uint32_t ccr, asi, cwp, pstate; in ptl1_showtrap() local
200 ccr = (tstate >> TSTATE_CCR_SHIFT) & TSTATE_CCR_MASK; in ptl1_showtrap()
206 "%%pstate: %b\n", ccr, asi, cwp, pstate, PSTATE_BITS); in ptl1_showtrap()
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| /titanic_50/usr/src/uts/sparc/dtrace/ |
| H A D | fasttrap_isa.c | 675 uint_t ccr = rp->r_tstate >> TSTATE_CCR_SHIFT; in fasttrap_pid_probe() local
678 ccr >>= 4; in fasttrap_pid_probe()
680 c = (ccr >> 0) & 1; in fasttrap_pid_probe()
681 v = (ccr >> 1) & 1; in fasttrap_pid_probe()
682 z = (ccr >> 2) & 1; in fasttrap_pid_probe()
683 n = (ccr >> 3) & 1; in fasttrap_pid_probe()
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| /titanic_50/usr/src/uts/common/io/ |
| H A D | fdc.c | 669 int ccr; in fdc_propinit2() local
723 for (ccr = 0; ccr <= (FCC_NOPREC | FCC_DRATE); ccr++) { in fdc_propinit2()
729 outb(fcp->c_regbase + FCR_CCR, ccr); in fdc_propinit2()
732 (FCC_NOPREC | FCC_DRATE)) != ccr) { in fdc_propinit2()
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| /titanic_50/usr/src/uts/sun4/os/ |
| H A D | visinstr.c | 383 uint_t ccr; in vis_edge() local
536 ccr = get_subcc_ccr(addrl, addrr); /* get subcc cond. codes */ in vis_edge()
537 pregs->r_tstate |= ((uint64_t)ccr << TSTATE_CCR_SHIFT); in vis_edge()
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| /titanic_50/usr/src/uts/sun4v/ml/ |
| H A D | trap_table.s | 2221 srlx %g3, PSR_TSTATE_CC_SHIFT, %o0 ! shift ccr to V8 psr
2226 mov %o0, %g1 ! move ccr to normal %g1
2263 srlx %g1, PSR_TSTATE_CC_SHIFT, %o0 ! shift ccr to V8 psr
2292 sllx %g2, PSR_TSTATE_CC_SHIFT, %g3 ! shift to tstate.ccr.icc
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| /titanic_50/usr/src/uts/sun4u/ml/ |
| H A D | trap_table.s | 2459 srlx %g3, PSR_TSTATE_CC_SHIFT, %o0 ! shift ccr to V8 psr
2465 mov %o0, %g1 ! move ccr to normal %g1
2502 srlx %g1, PSR_TSTATE_CC_SHIFT, %o0 ! shift ccr to V8 psr
2531 sllx %g2, PSR_TSTATE_CC_SHIFT, %g3 ! shift to tstate.ccr.icc
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| /titanic_50/usr/src/cmd/sgs/libconv/common/ |
| H A D | corenote.msg | 322 @ MSG_REG_SPARC_CCR "[ ccr ]"
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| /titanic_50/usr/src/uts/sun4u/sunfire/io/ |
| H A D | jtag.c | 296 unsigned int ccr; member
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| /titanic_50/usr/src/uts/sun4u/cpu/ |
| H A D | opl_olympus_asm.s | 902 mov %g0, %ccr ;\
|