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Searched refs:cap_ptr (Results 1 – 25 of 25) sorted by relevance

/titanic_50/usr/src/uts/i86xpv/io/psm/
H A Dxpv_intr.c244 int cap_ptr = i_ddi_get_msi_msix_cap_ptr(dip); in apic_pci_msi_enable_vector() local
251 ASSERT((handle != NULL) && (cap_ptr != 0)); in apic_pci_msi_enable_vector()
266 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apic_pci_msi_enable_vector()
270 pci_config_put16(handle, cap_ptr + PCI_MSI_CTRL, msi_ctrl); in apic_pci_msi_enable_vector()
282 int cap_ptr = i_ddi_get_msi_msix_cap_ptr(rdip); in apic_pci_msi_disable_mode() local
285 ASSERT((handle != NULL) && (cap_ptr != 0)); in apic_pci_msi_disable_mode()
288 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apic_pci_msi_disable_mode()
293 pci_config_put16(handle, cap_ptr + PCI_MSI_CTRL, msi_ctrl); in apic_pci_msi_disable_mode()
296 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSIX_CTRL); in apic_pci_msi_disable_mode()
299 pci_config_put16(handle, cap_ptr + PCI_MSIX_CTRL, in apic_pci_msi_disable_mode()
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H A Dxpv_psm.c1107 int cap_ptr = i_ddi_get_msi_msix_cap_ptr(dip); in xpv_psm_get_msi_vector() local
1112 ASSERT((handle != NULL) && (cap_ptr != 0)); in xpv_psm_get_msi_vector()
1114 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in xpv_psm_get_msi_vector()
1120 cap_ptr + PCI_MSI_64BIT_DATA); in xpv_psm_get_msi_vector()
1123 cap_ptr + PCI_MSI_32BIT_DATA); in xpv_psm_get_msi_vector()
/titanic_50/usr/src/uts/common/os/
H A Dsunpci.c271 static uint32_t pci_generic_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
273 static uint32_t pci_msi_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
275 static uint32_t pci_pcix_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
277 static uint32_t pci_pcie_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
279 static uint32_t pci_ht_addrmap_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
281 static uint32_t pci_ht_funcext_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
283 static void pci_fill_buf(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
386 uint8_t cap_ptr, cap_id; local
427 cap_ptr = pci_config_get8(confhdl, PCI_BCNF_CAP_PTR);
431 while (cap_ptr != PCI_CAP_NEXT_PTR_NULL) {
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H A Dddi_intr_impl.c570 i_ddi_set_msi_msix_cap_ptr(dev_info_t *dip, int cap_ptr) in i_ddi_set_msi_msix_cap_ptr() argument
575 intr_p->devi_cap_ptr = cap_ptr; in i_ddi_set_msi_msix_cap_ptr()
/titanic_50/usr/src/uts/i86pc/io/pcplusmp/
H A Dapic_introp.c64 int cap_ptr = i_ddi_get_msi_msix_cap_ptr(dip); in apic_pci_msi_enable_vector() local
74 ASSERT((handle != NULL) && (cap_ptr != 0)); in apic_pci_msi_enable_vector()
106 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apic_pci_msi_enable_vector()
110 pci_config_put16(handle, cap_ptr + PCI_MSI_CTRL, msi_ctrl); in apic_pci_msi_enable_vector()
116 cap_ptr + PCI_MSI_ADDR_OFFSET, msi_addr); in apic_pci_msi_enable_vector()
120 cap_ptr + PCI_MSI_ADDR_OFFSET + 4, msi_addr >> 32); in apic_pci_msi_enable_vector()
122 cap_ptr + PCI_MSI_64BIT_DATA, msi_data); in apic_pci_msi_enable_vector()
125 cap_ptr + PCI_MSI_32BIT_DATA, msi_data); in apic_pci_msi_enable_vector()
413 int cap_ptr = i_ddi_get_msi_msix_cap_ptr(rdip); in apic_pci_msi_enable_mode() local
416 ASSERT((handle != NULL) && (cap_ptr != 0)); in apic_pci_msi_enable_mode()
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H A Dapic_common.c1650 int cap_ptr = i_ddi_get_msi_msix_cap_ptr(rdip); in apic_pci_msi_unconfigure() local
1653 ASSERT((handle != NULL) && (cap_ptr != 0)); in apic_pci_msi_unconfigure()
1656 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apic_pci_msi_unconfigure()
1658 pci_config_put16(handle, cap_ptr + PCI_MSI_CTRL, msi_ctrl); in apic_pci_msi_unconfigure()
1659 pci_config_put32(handle, cap_ptr + PCI_MSI_ADDR_OFFSET, 0); in apic_pci_msi_unconfigure()
1663 cap_ptr + PCI_MSI_64BIT_DATA, 0); in apic_pci_msi_unconfigure()
1665 cap_ptr + PCI_MSI_ADDR_OFFSET + 4, 0); in apic_pci_msi_unconfigure()
1668 cap_ptr + PCI_MSI_32BIT_DATA, 0); in apic_pci_msi_unconfigure()
1704 int cap_ptr = i_ddi_get_msi_msix_cap_ptr(rdip); in apic_pci_msi_disable_mode() local
1707 ASSERT((handle != NULL) && (cap_ptr != 0)); in apic_pci_msi_disable_mode()
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/titanic_50/usr/src/uts/common/sys/
H A Dpci_impl.h192 #define CAP_ID(confhdl, cap_ptr, xspace) \ argument
193 ((xspace) ? 0 : pci_config_get8((confhdl), (cap_ptr) + PCI_CAP_ID))
195 #define NEXT_CAP(confhdl, cap_ptr, xspace) \ argument
197 pci_config_get8((confhdl), (cap_ptr) + PCI_CAP_NEXT_PTR))
H A Dddi_intr_impl.h353 void i_ddi_set_msi_msix_cap_ptr(dev_info_t *dip, int cap_ptr);
H A Dddi_impldefs.h1242 uint32_t (*cap_save_func)(ddi_acc_handle_t confhdl, uint16_t cap_ptr,
/titanic_50/usr/src/lib/storage/libg_fc/common/
H A Dio.c482 struct scsi_capacity_16 *cap_ptr, int buf_len) in g_scsi_read_capacity_1016_cmd() argument
490 if ((fd < 0) || (cap_ptr == NULL) || in g_scsi_read_capacity_1016_cmd()
516 ret = scsi_read_capacity_16_cmd(fd, cap_ptr, buf_len); in g_scsi_read_capacity_1016_cmd()
518 cap_ptr->sc_capacity = cap_old.capacity; in g_scsi_read_capacity_1016_cmd()
519 cap_ptr->sc_lbasize = cap_old.lbasize; in g_scsi_read_capacity_1016_cmd()
526 struct scsi_capacity_16 *cap_ptr, int buf_len) in scsi_read_capacity_16_cmd() argument
532 if ((fd < 0) || (cap_ptr == NULL) || in scsi_read_capacity_16_cmd()
537 (void) memset((char *)cap_ptr, 0, buf_len); in scsi_read_capacity_16_cmd()
543 ucmd.uscsi_bufaddr = (caddr_t)cap_ptr; in scsi_read_capacity_16_cmd()
/titanic_50/usr/src/lib/libprtdiag_psr/sparc/opl/common/
H A Dopl_picl.c646 uint_t cap_ptr, cap_reg, link_status, link_cap, capid; in get_lane_width() local
673 cap_ptr = read_byte(fd, bus, dev, func, PCI_CONF_CAP_PTR, &ret); in get_lane_width()
679 cap_reg = read_word(fd, bus, dev, func, cap_ptr, &ret); in get_lane_width()
687 while (cap_ptr != 0) { in get_lane_width()
690 link_cap = read_long(fd, bus, dev, func, cap_ptr + in get_lane_width()
697 cap_ptr + PCIE_LINKSTS, &ret); in get_lane_width()
724 cap_ptr + PCI_PCIX_SEC_STATUS, &ret); in get_lane_width()
752 cap_ptr + PCI_PCIX_STATUS, &ret); in get_lane_width()
770 cap_ptr = (cap_reg >> PCI_REG_FUNC_SHIFT); in get_lane_width()
771 cap_reg = read_word(fd, bus, dev, func, cap_ptr, &ret); in get_lane_width()
/titanic_50/usr/src/uts/i86pc/io/apix/
H A Dapix_utils.c305 int i, cap_ptr = i_ddi_get_msi_msix_cap_ptr(dip); in apix_pci_msi_enable_vector() local
314 ASSERT((handle != NULL) && (cap_ptr != 0)); in apix_pci_msi_enable_vector()
341 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apix_pci_msi_enable_vector()
345 pci_config_put16(handle, cap_ptr + PCI_MSI_CTRL, msi_ctrl); in apix_pci_msi_enable_vector()
348 APIX_WRITE_MSI_DATA(handle, cap_ptr, msi_ctrl, in apix_pci_msi_enable_vector()
352 cap_ptr + PCI_MSI_ADDR_OFFSET, msi_addr); in apix_pci_msi_enable_vector()
355 cap_ptr + PCI_MSI_ADDR_OFFSET + 4, msi_addr >> 32); in apix_pci_msi_enable_vector()
357 APIX_WRITE_MSI_DATA(handle, cap_ptr, msi_ctrl, msi_data); in apix_pci_msi_enable_vector()
380 int cap_ptr = i_ddi_get_msi_msix_cap_ptr(dip); in apix_pci_msi_enable_mode() local
383 ASSERT((handle != NULL) && (cap_ptr != 0)); in apix_pci_msi_enable_mode()
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H A Dapix.c1593 int inum, cap_ptr; in apix_set_cpu() local
1620 cap_ptr = i_ddi_get_msi_msix_cap_ptr(dip); in apix_set_cpu()
1621 msix_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSIX_CTRL); in apix_set_cpu()
1656 int i, num_vectors, cap_ptr, msi_mask_off; in apix_grp_set_cpu() local
1713 cap_ptr = i_ddi_get_msi_msix_cap_ptr(dip); in apix_grp_set_cpu()
1715 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apix_grp_set_cpu()
1720 msi_mask_off = cap_ptr + PCI_MSI_64BIT_MASKBITS; in apix_grp_set_cpu()
1722 msi_mask_off = cap_ptr + PCI_MSI_32BIT_MASK; in apix_grp_set_cpu()
/titanic_50/usr/src/uts/common/io/igb/
H A Digb_debug.c42 uint8_t cap_ptr; in pci_dump() local
131 cap_ptr = pci_config_get8(handle, PCI_CONF_CAP_PTR); in pci_dump()
134 "PCI_CONF_CAP_PTR:\t0x%x\n", cap_ptr); in pci_dump()
149 offset = cap_ptr; in pci_dump()
/titanic_50/usr/src/uts/common/io/pciex/
H A Dpcieb.c307 uint16_t sdip_dev_ctrl, sdip_mrrs_mps, cap_ptr; in pcieb_41210_mps_wkrnd() local
321 if (PCI_CAP_LOCATE(cfg_hdl, PCI_CAP_ID_PCI_E, &cap_ptr) in pcieb_41210_mps_wkrnd()
328 sdip_dev_ctrl = PCI_CAP_GET16(cfg_hdl, NULL, cap_ptr, in pcieb_41210_mps_wkrnd()
347 PCI_CAP_PUT16(cfg_hdl, NULL, cap_ptr, PCIE_DEVCTL, in pcieb_41210_mps_wkrnd()
1541 uint16_t pmcap, cap_ptr; in pcieb_pwr_setup() local
1565 if ((PCI_CAP_LOCATE(conf_hdl, PCI_CAP_ID_PM, &cap_ptr)) == in pcieb_pwr_setup()
1575 pwr_p->pwr_pmcsr_offset = cap_ptr + PCI_PMCSR; in pcieb_pwr_setup()
1576 pmcap = PCI_CAP_GET16(conf_hdl, NULL, cap_ptr, PCI_PMCAP); in pcieb_pwr_setup()
1733 uint16_t cap_ptr; in pcieb_id_props() local
1754 PCI_CAP_ID_SLOT_ID, &cap_ptr)) != DDI_FAILURE)) { in pcieb_id_props()
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H A Dpcie.c1893 uint16_t cap_ptr; in pcie_get_max_supported() local
1932 if ((PCI_CAP_LOCATE(config_handle, PCI_CAP_ID_PCI_E, &cap_ptr)) == in pcie_get_max_supported()
1937 max_supported = PCI_CAP_GET16(config_handle, NULL, cap_ptr, in pcie_get_max_supported()
1966 uint16_t cap_ptr; in pcie_root_port() local
1980 &cap_ptr)) == DDI_FAILURE) { in pcie_root_port()
1985 port_type = PCI_CAP_GET16(config_handle, NULL, cap_ptr, in pcie_root_port()
2235 uint16_t cap_ptr; in pcie_ari_device() local
2251 if ((PCI_CAP_LOCATE(handle, PCI_CAP_ID_PCI_E, &cap_ptr)) in pcie_ari_device()
2260 &cap_ptr)) == DDI_FAILURE) { in pcie_ari_device()
2276 uint16_t cap_ptr, next_function; in pcie_ari_get_next_function() local
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/titanic_50/usr/src/uts/common/io/e1000g/
H A De1000g_debug.c373 uint8_t cap_ptr; in pciconfig_dump() local
438 cap_ptr = pci_config_get8(handle, PCI_CONF_CAP_PTR); in pciconfig_dump()
441 "PCI_CONF_CAP_PTR:\t0x%x\n", cap_ptr); in pciconfig_dump()
456 offset = cap_ptr; in pciconfig_dump()
/titanic_50/usr/src/uts/common/io/ixgbe/
H A Dixgbe_debug.c167 uint8_t cap_ptr; in ixgbe_pci_dump() local
256 cap_ptr = pci_config_get8(handle, PCI_CONF_CAP_PTR); in ixgbe_pci_dump()
259 "PCI_CONF_CAP_PTR:\t0x%x\n", cap_ptr); in ixgbe_pci_dump()
274 offset = cap_ptr; in ixgbe_pci_dump()
/titanic_50/usr/src/uts/sun4/io/
H A Dpcicfg.c574 uint16_t cap_ptr; in pcicfg_get_nslots() local
577 &cap_ptr)) == DDI_SUCCESS) { in pcicfg_get_nslots()
580 PCI_CAP_PUT8(handle, NULL, cap_ptr, PCI_HP_DWORD_SELECT_OFF, in pcicfg_get_nslots()
582 config = PCI_CAP_GET32(handle, NULL, cap_ptr, in pcicfg_get_nslots()
585 } else if ((PCI_CAP_LOCATE(handle, PCI_CAP_ID_SLOT_ID, &cap_ptr)) in pcicfg_get_nslots()
588 cap_ptr, PCI_CAP_ID_REGS_OFF); in pcicfg_get_nslots()
591 } else if ((PCI_CAP_LOCATE(handle, PCI_CAP_ID_PCI_E, &cap_ptr)) in pcicfg_get_nslots()
593 int port_type = PCI_CAP_GET16(handle, NULL, cap_ptr, in pcicfg_get_nslots()
597 (PCI_CAP_GET16(handle, NULL, cap_ptr, PCIE_PCIECAP) in pcicfg_get_nslots()
612 uint16_t cap_ptr; in pcicfg_is_chassis() local
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/titanic_50/usr/src/uts/intel/io/pci/
H A Dpci_boot.c901 int rv, cap_ptr, physhi; in fix_ppb_res() local
933 cap_ptr = get_pci_cap(bus, dev, func, PCI_CAP_ID_PCI_E); in fix_ppb_res()
934 if (cap_ptr != -1) { in fix_ppb_res()
936 (uint16_t)cap_ptr + PCIE_LINKCTL); in fix_ppb_res()
1829 uint8_t cap_ptr; in set_devpm_d0() local
1839 cap_ptr = pci_getb(bus, dev, func, PCI_CBUS_CAP_PTR); in set_devpm_d0()
1841 cap_ptr = pci_getb(bus, dev, func, PCI_CONF_CAP_PTR); in set_devpm_d0()
1845 while (cap_ptr != PCI_CAP_NEXT_PTR_NULL && cap_ptr >= PCI_CAP_PTR_OFF) { in set_devpm_d0()
1846 cap_ptr &= PCI_CAP_PTR_MASK; in set_devpm_d0()
1847 cap_id = pci_getb(bus, dev, func, cap_ptr + PCI_CAP_ID); in set_devpm_d0()
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/titanic_50/usr/src/uts/sparc/io/pciex/
H A Dpcieb_sparc.c125 uint16_t cap_ptr; in pcieb_plat_pcishpc_probe() local
126 if ((PCI_CAP_LOCATE(config_handle, PCI_CAP_ID_PCI_HOTPLUG, &cap_ptr)) != in pcieb_plat_pcishpc_probe()
/titanic_50/usr/src/uts/i86pc/io/pci/
H A Dpci_common.c202 int cap_ptr; in pci_common_intr_ops() local
346 cap_ptr = 0; in pci_common_intr_ops()
357 cap_ptr = ddi_prop_get_int(DDI_DEV_T_ANY, rdip, in pci_common_intr_ops()
359 if (cap_ptr == 0) { in pci_common_intr_ops()
367 i_ddi_set_msi_msix_cap_ptr(rdip, cap_ptr); in pci_common_intr_ops()
437 if (cap_ptr = i_ddi_get_msi_msix_cap_ptr(rdip)) in pci_common_intr_ops()
/titanic_50/usr/src/uts/common/io/cxgbe/t4nex/
H A Dt4_nexus.c2173 uint8_t cap_ptr, cap_id; in t4_os_find_pci_capability() local
2179 t4_os_pci_read_cfg1(sc, PCI_CONF_CAP_PTR, &cap_ptr); in t4_os_find_pci_capability()
2180 while (cap_ptr) { in t4_os_find_pci_capability()
2181 t4_os_pci_read_cfg1(sc, cap_ptr + PCI_CAP_ID, &cap_id); in t4_os_find_pci_capability()
2183 return (cap_ptr); /* found */ in t4_os_find_pci_capability()
2184 t4_os_pci_read_cfg1(sc, cap_ptr + PCI_CAP_NEXT_PTR, &cap_ptr); in t4_os_find_pci_capability()
/titanic_50/usr/src/uts/common/io/atge/
H A Datge_main.c1057 uint16_t cap_ptr; in atge_attach() local
1199 &cap_ptr); in atge_attach()
1207 cap_ptr + 0x08); in atge_attach()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_xioctl.c7853 uint8_t cap_ptr; in ql_get_pci_data() local
7866 cap_ptr = (uint8_t)ql_pci_config_get8(ha, PCI_CONF_CAP_PTR); in ql_get_pci_data()
7867 while (cap_ptr != PCI_CAP_NEXT_PTR_NULL) { in ql_get_pci_data()
7871 cap_id = (uint8_t)ql_pci_config_get8(ha, cap_ptr); in ql_get_pci_data()
7876 cap_ptr = (uint8_t)ql_pci_config_get8(ha, in ql_get_pci_data()
7877 (cap_ptr + PCI_CAP_NEXT_PTR)); in ql_get_pci_data()