Searched refs:c32 (Results 1 – 7 of 7) sorted by relevance
/titanic_50/usr/src/lib/libc/port/locale/ |
H A D | c32rtomb.c | 33 c32rtomb(char *restrict str, char32_t c32, mbstate_t *restrict ps) in c32rtomb() argument 35 if ((c32 >= UNICODE_SUR_MIN && c32 <= UNICODE_SUR_MAX) || in c32rtomb() 36 c32 > UNICODE_SUP_MAX) { in c32rtomb() 46 c32 = L'\0'; in c32rtomb() 49 return (wcrtomb_l(str, (wchar_t)c32, ps, uselocale((locale_t)0))); in c32rtomb()
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H A D | c16rtomb.c | 34 char32_t c32; in c16rtomb() local 53 c32 = UNICODE_SUR_UVALUE(c16s->c16_surrogate) | in c16rtomb() 55 c32 += UNICODE_SUP_START; in c16rtomb() 70 c32 = c16; in c16rtomb() 77 return (c32rtomb(str, c32, ps)); in c16rtomb()
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/titanic_50/usr/src/uts/common/sys/ |
H A D | sha2.h | 79 uint32_t c32[2]; /* for SHA256 , modulo 2^64 */ member
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/titanic_50/usr/src/common/crypto/sha2/ |
H A D | sha2.c | 807 buf_index = (ctx->count.c32[1] >> 3) & 0x3F; in SHA2Update() 810 if ((ctx->count.c32[1] += (input_len << 3)) < (input_len << 3)) in SHA2Update() 811 ctx->count.c32[0]++; in SHA2Update() 813 ctx->count.c32[0] += (input_len >> 29); in SHA2Update() 916 uint8_t bitcount_be[sizeof (ctx->count.c32)]; in SHA2Final() 922 index = (ctx->count.c32[1] >> 3) & 0x3f; in SHA2Final() 923 Encode(bitcount_be, ctx->count.c32, sizeof (bitcount_be)); in SHA2Final()
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/titanic_50/usr/src/grub/grub-0.97/ |
H A D | config.guess | 726 then echo c32-convex-bsd
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/titanic_50/usr/src/lib/libmvec/common/vis/ |
H A D | __vatan2f.S | 912 .c32: label 3280 ba .c32
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/titanic_50/usr/src/data/hwdata/ |
H A D | pci.ids | 8919 1048 0c32 Erazor III Pro 22204 1c32 Highland Technology, Inc. 28452 2c32 Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Rank Registers
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