Home
last modified time | relevance | path

Searched refs:bus_cfg_hdl (Results 1 – 7 of 7) sorted by relevance

/titanic_50/usr/src/uts/common/sys/
H A Dpcie_impl.h114 pci_config_get ## sz(bus_p->bus_cfg_hdl, off)
116 pci_config_put ## sz(bus_p->bus_cfg_hdl, off, val)
118 PCI_CAP_GET ## sz(bus_p->bus_cfg_hdl, NULL, bus_p->bus_pcie_off, off)
120 PCI_CAP_PUT ## sz(bus_p->bus_cfg_hdl, NULL, bus_p->bus_pcie_off, off, \
123 PCI_XCAP_GET ## sz(bus_p->bus_cfg_hdl, NULL, bus_p->bus_aer_off, off)
125 PCI_XCAP_PUT ## sz(bus_p->bus_cfg_hdl, NULL, bus_p->bus_aer_off, off, \
128 PCI_CAP_GET ## sz(bus_p->bus_cfg_hdl, NULL, bus_p->bus_pcix_off, off)
130 PCI_CAP_PUT ## sz(bus_p->bus_cfg_hdl, NULL, bus_p->bus_pcix_off, off, \
298 ddi_acc_handle_t bus_cfg_hdl; /* error handling acc hdle */ member
/titanic_50/usr/src/uts/intel/io/pciex/
H A Dpcieb_x86.c466 ddi_acc_handle_t cfg_hdl = bus_p->bus_cfg_hdl; in pcieb_intel_serr_workaround()
592 pexctrl = pci_config_get32(bus_p->bus_cfg_hdl, in pcieb_intel_mps_workaround()
599 pci_config_put32(bus_p->bus_cfg_hdl, in pcieb_intel_mps_workaround()
612 ddi_acc_handle_t cfg_hdl = bus_p->bus_cfg_hdl; in pcieb_intel_sw_workaround()
/titanic_50/usr/src/uts/common/io/pciex/hotplug/
H A Dpcishpc.c173 pci_config_get32(bus_p->bus_cfg_hdl, i)); in pcishpc_init()
1914 slot_p->hs_phy_slot_num = pci_config_get8(bus_p->bus_cfg_hdl, in pcishpc_set_slot_name()
2362 pci_config_put8(bus_p->bus_cfg_hdl, in pcishpc_read_reg()
2366 if (pci_config_get8(bus_p->bus_cfg_hdl, bus_p->bus_pci_hp_off + in pcishpc_read_reg()
2374 return (pci_config_get32(bus_p->bus_cfg_hdl, in pcishpc_read_reg()
2390 pci_config_put8(bus_p->bus_cfg_hdl, in pcishpc_write_reg()
2394 if (pci_config_get8(bus_p->bus_cfg_hdl, bus_p->bus_pci_hp_off + in pcishpc_write_reg()
2402 pci_config_put32(bus_p->bus_cfg_hdl, in pcishpc_write_reg()
2410 (void) pci_config_get16(bus_p->bus_cfg_hdl, PCI_CONF_VENID); in pcishpc_write_reg()
H A Dpciehpc.c640 return (pci_config_get8(bus_p->bus_cfg_hdl, off)); in pciehpc_reg_get8()
653 return (pci_config_get16(bus_p->bus_cfg_hdl, off)); in pciehpc_reg_get16()
666 return (pci_config_get32(bus_p->bus_cfg_hdl, off)); in pciehpc_reg_get32()
679 pci_config_put8(bus_p->bus_cfg_hdl, off, val); in pciehpc_reg_put8()
692 pci_config_put16(bus_p->bus_cfg_hdl, off, val); in pciehpc_reg_put16()
705 pci_config_put32(bus_p->bus_cfg_hdl, off, val); in pciehpc_reg_put32()
/titanic_50/usr/src/uts/common/io/pciex/
H A Dpcieb.c369 ddi_acc_handle_t config_handle = bus_p->bus_cfg_hdl; in pcieb_attach()
1169 hp_msi_off = PCI_CAP_GET16(bus_p->bus_cfg_hdl, NULL, in pcieb_intr_init()
1199 aer_msi_off = (PCI_XCAP_GET32(bus_p->bus_cfg_hdl, NULL, in pcieb_intr_init()
1736 ddi_acc_handle_t config_handle = bus_p->bus_cfg_hdl; in pcieb_id_props()
H A Dpcie.c457 bus_p->bus_cfg_hdl = eh; in pcie_init_cfghdl()
466 pci_config_teardown(&bus_p->bus_cfg_hdl); in pcie_fini_cfghdl()
535 pcie_check_io_mem_range(bus_p->bus_cfg_hdl, &empty_io_range, in pcie_initchild()
1744 rp_cap = PCI_CAP_GET16(bus_p->bus_cfg_hdl, NULL, in pcie_init_root_port_mps()
/titanic_50/usr/src/uts/sparc/io/pciex/
H A Dpcieb_sparc.c202 ddi_acc_handle_t config_handle = bus_p->bus_cfg_hdl; in pcieb_attach_plx_workarounds()