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Searched refs:bootprop_getval (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/i86pc/os/
H A Dmlsetup.c131 if (bootprop_getval("cpuid_feature_ecx_include", &prop_value) != 0) in mlsetup()
136 if (bootprop_getval("cpuid_feature_ecx_exclude", &prop_value) != 0) in mlsetup()
141 if (bootprop_getval("cpuid_feature_edx_include", &prop_value) != 0) in mlsetup()
146 if (bootprop_getval("cpuid_feature_edx_exclude", &prop_value) != 0) in mlsetup()
387 if (bootprop_getval(PLAT_DR_OPTIONS_NAME, &prop_value) == 0) { in mlsetup()
407 if (bootprop_getval(PLAT_DR_PHYSMAX_NAME, &prop_value) == 0) { in mlsetup()
412 if (bootprop_getval(BOOT_NCPUS_NAME, &prop_value) != 0) { in mlsetup()
427 if (bootprop_getval(PLAT_MAX_NCPUS_NAME, &prop_value) != 0) { in mlsetup()
439 if (bootprop_getval(BOOT_MAX_NCPUS_NAME, &prop_value) != 0) { in mlsetup()
H A Dlgrpplat.c983 if (bootprop_getval(BP_LGRP_TOPO_LEVELS, &value) == 0) in lgrp_plat_init()
989 if (bootprop_getval(BP_LGRP_SRAT_ENABLE, &value) == 0) in lgrp_plat_init()
995 if (bootprop_getval(BP_LGRP_SLIT_ENABLE, &value) == 0) in lgrp_plat_init()
1001 if (bootprop_getval(BP_LGRP_MSCT_ENABLE, &value) == 0) in lgrp_plat_init()
H A Dfakebop.c2671 bootprop_getval(const char *prop_name, u_longlong_t *prop_value) in bootprop_getval() function
/titanic_50/usr/src/uts/intel/sys/
H A Dbootconf.h243 extern int bootprop_getval(const char *, u_longlong_t *);