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Searched refs:assigned (Results 1 – 25 of 164) sorted by relevance

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/titanic_50/usr/src/uts/intel/io/pciex/
H A Dpcie_nvidia.c223 pci_regspec_t assigned[2] = {{0}}; in add_nvidia_isa_bridge_props() local
233 regs[0].pci_size_low = assigned[0].pci_size_low = PCI_CONF_HDR_SIZE; in add_nvidia_isa_bridge_props()
234 assigned[0].pci_phys_hi = regs[0].pci_phys_hi = (PCI_RELOCAT_B | in add_nvidia_isa_bridge_props()
236 assigned[0].pci_phys_low = regs[0].pci_phys_low = in add_nvidia_isa_bridge_props()
242 regs[1].pci_size_low = assigned[1].pci_size_low = PCI_CONF_HDR_SIZE; in add_nvidia_isa_bridge_props()
243 assigned[1].pci_phys_hi = regs[1].pci_phys_hi = (PCI_RELOCAT_B | in add_nvidia_isa_bridge_props()
245 assigned[1].pci_phys_low = regs[1].pci_phys_low = in add_nvidia_isa_bridge_props()
252 (int *)assigned, 2 * sizeof (pci_regspec_t) / sizeof (int)); in add_nvidia_isa_bridge_props()
/titanic_50/usr/src/cmd/backup/dump/
H A Dlint.sed12 /myrcmd.c",.*assigned value never used: retval .*(22[0-9])/d
24 /memutils.c",.*assigned value never used: allocated at/d
25 /dumpmain.c",.*assigned value never used:/d
31 /assigned value never used: idates_in/d
32 /roll_log.c",.*assigned value never used/d
/titanic_50/usr/src/cmd/backup/restore/
H A Dlint.sed6 /myrcmd.c",.*assigned value never used: retval .*(22[0-9])/d
7 /tape.c",.*assigned value never used: mt .*(22[0-9])/d
12 /byteorder.c",.*assigned value never used: allocated at.*byteorder.c/d
/titanic_50/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c1398 pci_regspec_t *assigned; in pcicfg_get_ntbridge_child_range() local
1404 "assigned-addresses", (caddr_t)&assigned, &length) in pcicfg_get_ntbridge_child_range()
1415 if ((PCI_REG_REG_G(assigned[i].pci_phys_hi) == in pcicfg_get_ntbridge_child_range()
1420 } else if ((PCI_REG_REG_G(assigned[i].pci_phys_hi) == in pcicfg_get_ntbridge_child_range()
1425 } else if ((PCI_REG_REG_G(assigned[i].pci_phys_hi) == in pcicfg_get_ntbridge_child_range()
1435 space_type, assigned[i].pci_phys_low, assigned[i].pci_size_low); in pcicfg_get_ntbridge_child_range()
1438 *boundbase = assigned[i].pci_phys_low; in pcicfg_get_ntbridge_child_range()
1439 *boundlen = assigned[i].pci_size_low; in pcicfg_get_ntbridge_child_range()
1442 kmem_free(assigned, length); in pcicfg_get_ntbridge_child_range()
2169 pci_regspec_t *assigned; in pcicfg_device_assign_readonly() local
[all …]
/titanic_50/usr/src/uts/sun4/io/
H A Dpcicfg.c1497 pci_regspec_t *assigned; in pcicfg_get_ntbridge_child_range() local
1503 DDI_PROP_DONTPASS, "assigned-addresses", (caddr_t)&assigned, in pcicfg_get_ntbridge_child_range()
1514 if ((PCI_REG_REG_G(assigned[i].pci_phys_hi) == in pcicfg_get_ntbridge_child_range()
1520 if ((PCI_REG_REG_G(assigned[i].pci_phys_hi) == in pcicfg_get_ntbridge_child_range()
1530 space_type, assigned[i].pci_phys_low, assigned[i].pci_size_low); in pcicfg_get_ntbridge_child_range()
1533 *boundbase = assigned[i].pci_phys_low; in pcicfg_get_ntbridge_child_range()
1534 *boundlen = assigned[i].pci_size_low; in pcicfg_get_ntbridge_child_range()
1537 kmem_free(assigned, length); in pcicfg_get_ntbridge_child_range()
2245 pci_regspec_t *assigned; in pcicfg_device_assign_readonly() local
2257 DDI_PROP_DONTPASS, "assigned-addresses", (caddr_t)&assigned, in pcicfg_device_assign_readonly()
[all …]
/titanic_50/usr/src/uts/sun4/io/efcode/
H A Dfcpci.c1278 pci_regspec_t *assigned; in pci_alloc_resource() local
1284 DDI_PROP_DONTPASS, "assigned-addresses", (caddr_t)&assigned, in pci_alloc_resource()
1294 if (assigned[i].pci_phys_hi == phys_spec.pci_phys_hi) { in pci_alloc_resource()
1295 if (assigned[i].pci_size_low >= in pci_alloc_resource()
1297 kmem_free(assigned, assigned_len); in pci_alloc_resource()
1304 (void) pci_free_resource(dip, assigned[i]); in pci_alloc_resource()
1314 if (PCI_REG_BDFR_G(assigned[i].pci_phys_hi) == in pci_alloc_resource()
1319 if (PCI_REG_ADDR_G(assigned[i].pci_phys_hi) != in pci_alloc_resource()
1324 assigned[i].pci_phys_hi, in pci_alloc_resource()
1331 l = MAX(assigned[i].pci_size_low, in pci_alloc_resource()
[all …]
/titanic_50/usr/src/uts/common/io/xge/drv/
H A Dxge.c885 xge_hal_channel_t *assigned[XGELL_RX_RING_NUM_MAX + in xge_add_intrs() local
909 assigned[msix_idx] = channel; in xge_add_intrs()
914 assigned[msix_idx] = channel; in xge_add_intrs()
929 } else if (assigned[i] && assigned[i]->type == in xge_add_intrs()
932 intr_arg = (caddr_t)assigned[i]; in xge_add_intrs()
935 assigned[i]->post_qid, i); in xge_add_intrs()
936 } else if (assigned[i] && assigned[i]->type == in xge_add_intrs()
939 intr_arg = (caddr_t)assigned[i]; in xge_add_intrs()
942 assigned[i]->post_qid, i); in xge_add_intrs()
960 (void) xge_hal_channel_msix_set(assigned[i], i); in xge_add_intrs()
/titanic_50/usr/src/uts/intel/io/pci/
H A Dpci_boot.c2374 pci_regspec_t assigned[15] = {{0}}; in add_reg_props() local
2469 assigned[nasgn].pci_phys_hi = in add_reg_props()
2472 assigned[nasgn].pci_size_low = len; in add_reg_props()
2527 assigned[nasgn].pci_phys_low = base; in add_reg_props()
2550 assigned[nasgn].pci_size_low = len; in add_reg_props()
2583 assigned[nasgn].pci_phys_hi = phys_hi; in add_reg_props()
2584 assigned[nasgn].pci_phys_hi |= PCI_RELOCAT_B; in add_reg_props()
2585 assigned[nasgn].pci_phys_mid = base_hi; in add_reg_props()
2650 assigned[nasgn].pci_phys_low = base; in add_reg_props()
2681 assigned[nasgn].pci_phys_hi = (PCI_RELOCAT_B | in add_reg_props()
[all …]
/titanic_50/usr/src/cmd/bnu/
H A DConfig32 # and <value> is the value to be assigned to that parameter.
37 # and describes the values which may be assigned to them.
/titanic_50/usr/src/uts/common/io/pciex/
H A Dpciev.c127 boolean_t assigned = PCIE_IS_ASSIGNED(bus_p); in pcie_cache_domain_info() local
142 if (assigned) { in pcie_cache_domain_info()
166 boolean_t assigned = PCIE_IS_ASSIGNED(bus_p); in pcie_uncache_domain_info() local
192 if (assigned) { in pcie_uncache_domain_info()
/titanic_50/usr/src/uts/sun4v/sys/
H A Dvsw_hio.h40 kstat_named_t assigned; /* to which mac */ member
/titanic_50/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c2252 pci_regspec_t *assigned; in cardbus_free_device_resources() local
2260 (caddr_t)&assigned, in cardbus_free_device_resources()
2278 if ((assigned[i].pci_size_low != 0)|| in cardbus_free_device_resources()
2279 (assigned[i].pci_size_hi != 0)) { in cardbus_free_device_resources()
2280 switch (PCI_REG_ADDR_G(assigned[i].pci_phys_hi)) { in cardbus_free_device_resources()
2285 assigned[i].pci_size_low, in cardbus_free_device_resources()
2286 assigned[i].pci_phys_low, in cardbus_free_device_resources()
2287 PCI_REG_REG_G(assigned[i].pci_phys_hi)); in cardbus_free_device_resources()
2295 assigned[i].pci_size_low, in cardbus_free_device_resources()
2296 assigned[i].pci_phys_mid, in cardbus_free_device_resources()
[all …]
/titanic_50/usr/src/cmd/ipf/examples/
H A Dnat-setup31 addresses assigned to you, maybe several different blocks, or you use a
33 assigned, these can be used to create either a 1:1 mapping (if you have
/titanic_50/usr/src/uts/i86pc/io/acpi/drmach_acpi/
H A Ddrmach_acpi.c578 bp->assigned = boot_board; in drmach_board_new()
734 stat->assigned = bp->assigned; in drmach_board_status()
1035 stat->assigned = dp->bp->assigned; in drmach_io_status()
1123 stat->assigned = dp->bp->assigned; in drmach_cpu_status()
1344 stat->assigned = dp->dev.bp->assigned; in drmach_mem_status()
2064 if (!bp->connected || !bp->powered || !bp->assigned) { in drmach_board_check_dependent_cb()
2081 if (!bp->powered || !bp->assigned) { in drmach_board_check_dependent_cb()
2096 } else if (!bp->assigned) { in drmach_board_check_dependent_cb()
2134 if (bp->connected || bp->powered || bp->assigned) { in drmach_board_check_dependent_cb()
2245 bp->assigned = 1; in drmach_board_assign()
/titanic_50/usr/src/lib/libc/port/gen/
H A Dcrypt.c904 int assigned; in allocate_KS() local
915 assigned = 0; in allocate_KS()
917 assigned = 1; in allocate_KS()
923 if (!assigned) in allocate_KS()
/titanic_50/usr/src/uts/common/io/ib/clients/rdsv3/
H A Dib_send.c495 int ix, len, assigned; in rdsv3_ib_xmit_populate_wr() local
510 assigned = 0; in rdsv3_ib_xmit_populate_wr()
515 assigned = min(len, sgl->ds_len - off); in rdsv3_ib_xmit_populate_wr()
516 sge->ds_len = assigned; in rdsv3_ib_xmit_populate_wr()
518 len -= assigned; in rdsv3_ib_xmit_populate_wr()
/titanic_50/usr/src/uts/sun4u/lw8/sys/
H A Dsgenv.h95 int assigned; member
/titanic_50/usr/src/cmd/loadkeys/type_4/
H A Dkorea_532 # New function keys assigned old codes
H A Dtraditional_chinese_531 # New function keys assigned old codes
H A Dkorea_hobo48 # New function keys assigned old codes
H A Dtraditional_chinese_hobo49 # New function keys assigned old codes
/titanic_50/usr/src/cmd/lp/filter/postscript/font/
H A DREADME34 ./devpost/charlib. Characters that are assigned a code (ie. number in the fourth
75 used by dpost. It must be the code assigned to the character in the PostScript
77 that are assigned codes less than 32 (typically 1 or 2) are special and are
/titanic_50/usr/src/cmd/loadkeys/type_6/
H A Dkorea35 # New function keys assigned old codes
H A Dtraditional_chinese32 # New function keys assigned old codes
/titanic_50/usr/src/uts/sun4u/starfire/io/
H A Ddrmach.c132 int assigned; member
805 bp->assigned = !drmach_initialized; in drmach_board_new()
839 stat->assigned = bp->assigned; in drmach_board_status()
2008 bp->assigned = 1; in drmach_board_assign()
2064 obj->assigned = 1; in drmach_board_connect()
2702 stat->assigned = dp->bp->assigned; in drmach_cpu_status()
2913 stat->assigned = dp->bp->assigned; in drmach_io_status()
3375 stat->assigned = dp->bp->assigned; in drmach_mem_status()

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