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Searched refs:adap (Results 1 – 10 of 10) sorted by relevance

/titanic_50/usr/src/uts/common/io/cxgbe/common/
H A Dcommon.h304 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask,
307 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
310 int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
313 void t4_read_indirect(struct adapter *adap, unsigned int addr_reg,
316 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg,
328 int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
330 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
346 int t4_reinit_adapter(struct adapter *adap);
360 void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx);
373 int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask);
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H A Dt4_hw.c103 t4_read_indirect(struct adapter *adap, unsigned int addr_reg, in t4_read_indirect() argument
108 t4_write_reg(adap, addr_reg, start_idx); in t4_read_indirect()
109 *vals++ = t4_read_reg(adap, data_reg); in t4_read_indirect()
127 t4_write_indirect(struct adapter *adap, unsigned int addr_reg, in t4_write_indirect() argument
132 t4_write_reg(adap, addr_reg, start_idx++); in t4_write_indirect()
133 t4_write_reg(adap, data_reg, *vals++); in t4_write_indirect()
141 get_mbox_rpl(struct adapter *adap, __be64 *rpl, int nflit, u32 mbox_addr) in get_mbox_rpl() argument
144 *rpl++ = cpu_to_be64(t4_read_reg64(adap, mbox_addr)); in get_mbox_rpl()
151 fw_asrt(struct adapter *adap, u32 mbox_addr) in fw_asrt() argument
155 get_mbox_rpl(adap, (__be64 *)&asrt, sizeof (asrt) / 8, mbox_addr); in fw_asrt()
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H A Dcommon.c26 is_offload(const struct adapter *adap) in is_offload() argument
28 return (adap->params.offload); in is_offload()
32 core_ticks_per_usec(const struct adapter *adap) in core_ticks_per_usec() argument
34 return (adap->params.vpd.cclk / 1000); in core_ticks_per_usec()
38 t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, int size, void *rpl) in t4_wr_mbox() argument
40 return (t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true)); in t4_wr_mbox()
44 us_to_core_ticks(const struct adapter *adap, unsigned int us) in us_to_core_ticks() argument
46 return ((us * adap->params.vpd.cclk) / 1000); in us_to_core_ticks()
58 dack_ticks_to_usec(const struct adapter *adap, unsigned int ticks) in dack_ticks_to_usec() argument
60 return ((ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap)); in dack_ticks_to_usec()
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/titanic_50/usr/src/uts/common/io/chxge/com/
H A Dmc5.c220 adapter_t *adap = mc5->adapter; in init_mask_data_array() local
232 dbgi_wr_data3(adap, 0, 0, 0); in init_mask_data_array()
234 if (mc5_write(adap, data_array_base + i, write_cmd)) in init_mask_data_array()
238 dbgi_wr_data3(adap, 0xffffffff, 0xffffffff, 0xff); in init_mask_data_array()
241 t1_write_reg_4(adap, A_MC5_DBGI_REQ_DATA0, in init_mask_data_array()
244 if (mc5_write(adap, mask_array_base + i, write_cmd)) in init_mask_data_array()
253 adapter_t *adap = mc5->adapter; in init_lara7000() local
255 t1_write_reg_4(adap, A_MC5_RSP_LATENCY, in init_lara7000()
256 t1_is_asic(adap) ? 0x0a0a0a0a : 0x09090909); in init_lara7000()
259 t1_write_reg_4(adap, A_MC5_AOPEN_SRCH_CMD, 0x20022); in init_lara7000()
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H A Dmc4.c301 adapter_t *adap = mc4->adapter; in t1_mc4_bd_read() local
311 t1_write_reg_4(adap, A_MC4_BD_ADDR, start); in t1_mc4_bd_read()
312 t1_write_reg_4(adap, A_MC4_BD_OP, 0); in t1_mc4_bd_read()
313 val = t1_read_reg_4(adap, A_MC4_BD_OP); in t1_mc4_bd_read()
315 val = t1_read_reg_4(adap, A_MC4_BD_OP); in t1_mc4_bd_read()
320 buf[--i] = t1_read_reg_4(adap, A_MC4_BD_DATA3); in t1_mc4_bd_read()
322 buf[--i] = t1_read_reg_4(adap, A_MC4_BD_DATA2); in t1_mc4_bd_read()
324 buf[--i] = t1_read_reg_4(adap, A_MC4_BD_DATA1); in t1_mc4_bd_read()
325 buf[--i] = t1_read_reg_4(adap, A_MC4_BD_DATA0); in t1_mc4_bd_read()
H A Dcommon.h218 #define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B) argument
219 #define is_T2(adap) adapter_matches_type(adap, CHBT_TERM_T2, TERM_T2) argument
233 static inline unsigned int core_ticks_per_usec(const adapter_t *adap) in core_ticks_per_usec() argument
235 return board_info(adap)->clock_core / 1000000; in core_ticks_per_usec()
H A Dtp.c91 static unsigned int tp_delayed_ack_ticks(adapter_t *adap, unsigned int tp_clk) in tp_delayed_ack_ticks() argument
93 u32 tr = t1_read_reg_4(adap, A_TP_TIMER_RESOLUTION); in tp_delayed_ack_ticks()
98 static unsigned int t1_tp_ticks_per_sec(adapter_t *adap, unsigned int tp_clk) in t1_tp_ticks_per_sec() argument
100 u32 tr = t1_read_reg_4(adap, A_TP_TIMER_RESOLUTION); in t1_tp_ticks_per_sec()
161 void t1_tp_get_mib_statistics(adapter_t *adap, struct tp_mib_statistics *tps) in t1_tp_get_mib_statistics() argument
166 t1_write_reg_4(adap, A_TP_MIB_INDEX, 0); in t1_tp_get_mib_statistics()
169 *data++ = t1_read_reg_4(adap, A_TP_MIB_DATA); in t1_tp_get_mib_statistics()
H A Dtp.h94 void t1_tp_get_mib_statistics(adapter_t *adap, struct tp_mib_statistics *tps);
/titanic_50/usr/src/uts/common/io/chxge/
H A Doschtoe.h186 #define t1_is_T1A(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1A) argument
187 #define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B) argument
188 #define t1_is_T1C(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1C) argument
H A Dsge.h65 #define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B) argument
66 #define t1_is_T1C(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1C) argument