Searched refs:V_P5mmx (Results 1 – 1 of 1) sorted by relevance
| /titanic_50/usr/src/lib/libcpc/i386/ |
| H A D | conf_pentium.c | 50 #define V_P5mmx (1u << 1) /* " MMX instructions */ macro
60 V_P5 | V_P5mmx, /* CPC_PENTIUM_MMX */
116 {V_P5mmx, 0x2a, "bus_ownership_latency"},
117 {V_P5mmx, 0x2b, "mmx_instr_upipe"},
118 {V_P5mmx, 0x2c, "cache_M_line_sharing"},
119 {V_P5mmx, 0x2d, "emms_instr"},
120 {V_P5mmx, 0x2e, "bus_util_processor"},
121 {V_P5mmx, 0x2f, "sat_mmx_instr"},
122 {V_P5mmx, 0x30, "clks_not_HLT"},
123 {V_P5mmx, 0x31, "mmx_data_read"},
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