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Searched refs:VCLK_DIVISOR_VGA1 (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/intel/io/drm/
H A Di915_drv.c539 s3_priv->saveVCLK_DIVISOR_VGA1 = S3_READ(VCLK_DIVISOR_VGA1); in i915_save_display()
664 S3_WRITE(VCLK_DIVISOR_VGA1, s3_priv->saveVCLK_DIVISOR_VGA1); in i915_restore_display()
H A Di915_drv.h1197 #define VCLK_DIVISOR_VGA1 0x6004 macro