Searched refs:UDS_SEL (Results 1 – 8 of 8) sorted by relevance
336 (rp->r_ss & 0xffff) != UDS_SEL) { in sendsig()341 rp->r_ss = UDS_SEL; in sendsig()423 } else if ((rp->r_ss & 0xffff) != UDS_SEL) { in sendsig32()554 (rp->r_ss & 0xffff) != UDS_SEL) { in sendsig32()559 rp->r_ss = UDS_SEL; in sendsig32()643 } else if ((rp->r_ss & 0xffff) != UDS_SEL) { in sendsig()765 (rp->r_ss & 0xffff) != UDS_SEL) { in sendsig()767 rp->r_ss = UDS_SEL; in sendsig()
908 rp->r_ss = UDS_SEL; in setregs()944 rp->r_ds = rp->r_es = UDS_SEL; in setregs()969 rp->r_ds = rp->r_es = UDS_SEL; in setregs()
177 fn->f_ds = UDS_SEL; in fxsave_to_fnsave()661 case UDS_SEL: in fix_segreg()735 rp->r_ss = UDS_SEL; in setgregs()741 pcb->pcb_ds = UDS_SEL; in setgregs()742 pcb->pcb_es = UDS_SEL; in setgregs()
446 movl $UDS_SEL, REGOFF_SS(%rsp)663 movl $UDS_SEL, REGOFF_SS(%rsp)743 movl $UDS_SEL, REGOFF_SS(%rsp)984 movl $UDS_SEL, REGOFF_SS(%rsp)
562 pushl $UDS_SEL / (really %ss, but it's the same ..)
81 ucp->uc_mcontext.gregs[REG_SS] = UDS_SEL; in setup_context()
182 ASSERT(UDS_SEL == U32CS_SEL + 8); in init_cpu_syscall()227 ASSERT32(UDS_SEL == UCS_SEL + 8); in init_cpu_syscall()230 ASSERT64(UDS_SEL == U32CS_SEL + 8); in init_cpu_syscall()
604 #define UDS_SEL SEL_GDT(GDT_UDATA, SEL_UPL) macro