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Searched refs:TTL (Results 1 – 7 of 7) sorted by relevance

/titanic_50/usr/src/cmd/ypcmd/yp2lscripts/
H A Dinityp2l.sh571 HELP - The lower limit for the initial TTL (in seconds) for data
582 HELP - The upper limit for the initial TTL (in seconds).
589 HELP - The TTL (in seconds) for data retrieved from LDAP while the
596 HELP - The default TTL value for each map is set to :
599 Select yes if you want to change the current TTL value.
605 HELP - Select yes if you want to set a new TTL value, but want
612 HELP - Select yes if you want to set TTL value for each map, but
619 HELP - Select yes if you want to accept the default TTL
626 HELP - Select yes if you want to set TTL value for the map,
/titanic_50/usr/src/uts/common/io/ntxn/
H A Dnic_cmn.h623 U32 TTL:8, member
/titanic_50/usr/src/lib/libslp/clib/
H A Dlibslp.po57 msgid "could not set multicast TTL: %s"
/titanic_50/usr/src/lib/libslp/etc/
H A Dslp.conf.example119 # Change the multicast time-to-live (TTL). Default is 255. This example
/titanic_50/usr/src/data/hwdata/
H A Dpci.ids19770 100a APCI1696 SP controller (96 TTL I/Os)
20372 4253 PMC-DX503 Reconfigurable FPGA with TTL and Differential I/O
20378 4353 PMC-DX2003 Reconfigurable FPGA with TTL and Differential I/O
20393 524d PMC-DX2001 Reconfigurable FPGA with TTL I/O
20427 7015 AP471 48-Channel TTL Level Digital Input/Output Module
20428 7016 AP470 48-Channel TTL Level Digital Input/Output Module
20436 7021 APA7-201 Reconfigurable Artix-7 FPGA module 48 TTL channels
20438 7023 APA7-203 Reconfigurable Artix-7 FPGA module 24 TTL & 12 RS485 channels
20447 7042 AP482 Counter Timer Module with TTL Level Input/Output
20448 7043 AP483 Counter Timer Module with TTL Level and RS422 Input/Output
[all …]
/titanic_50/usr/src/cmd/look/
H A Dwords23470 TTL
/titanic_50/usr/src/cmd/spell/
H A Dlist23469 TTL