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Searched refs:TM_REG_TM_INT_STS (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dbnxe_hw_debug.c676 …IDLE_CHK_1(0x1F, TM_REG_TM_INT_STS, (val != 0), IDLE_CHK_ERROR, "TIMERS: Interrupt status is not 0… in lm_idle_chk()
/titanic_50/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A D57712_reg.h16911 #define TM_REG_TM_INT_STS macro