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Searched refs:TEMP_CS64_SEL (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/i86pc/ml/
H A Dmpcore.s207 pushl $TEMP_CS64_SEL
H A Dcpr_wakecode.s457 D16 pushl $TEMP_CS64_SEL
/titanic_50/usr/src/uts/intel/sys/
H A Dsegments.h600 #define TEMP_CS64_SEL SEL_GDT(TEMPGDT_KCODE64, SEL_KPL) macro