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Searched refs:TDC_TDR_CFG (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/hxge/
H A Dhpi_txdma.c105 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value); in hpi_txdma_channel_control()
107 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
112 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value); in hpi_txdma_channel_control()
114 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
124 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
129 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value); in hpi_txdma_channel_control()
131 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
136 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, &cfg.value); in hpi_txdma_channel_control()
138 TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value); in hpi_txdma_channel_control()
256 TXDMA_REG_READ64(handle, TDC_TDR_CFG, channel, reg_data); in hpi_txdma_ring_config()
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H A Dhxge_tdc_hw.h38 #define TDC_TDR_CFG (TDC_BASE_ADDR + 0x20) macro