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Searched refs:TCAM_CTL_RWC_RAM_WR (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/common/io/hxge/
H A Dhxge_pfc.h57 #define TCAM_CTL_RWC_RAM_WR 0x4 macro
H A Dhpi_pfc.c153 tctl.bits.cmd = TCAM_CTL_RWC_RAM_WR; in hpi_pfc_tcam_asc_ram_entry_write()
/titanic_50/usr/src/uts/common/sys/nxge/
H A Dnxge_fflp_hw.h298 #define TCAM_CTL_RWC_RAM_WR 0x4 macro
/titanic_50/usr/src/uts/common/io/nxge/npi/
H A Dnpi_fflp.c522 tctl.bits.ldw.rwc = TCAM_CTL_RWC_RAM_WR; in npi_fflp_tcam_asc_ram_entry_write()