Home
last modified time | relevance | path

Searched refs:TCAM_CTL_RWC_RAM_RD (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/common/io/hxge/
H A Dhxge_pfc.h58 #define TCAM_CTL_RWC_RAM_RD 0x5 macro
H A Dhpi_pfc.c125 tctl.bits.cmd = TCAM_CTL_RWC_RAM_RD; in hpi_pfc_tcam_asc_ram_entry_read()
/titanic_50/usr/src/uts/common/sys/nxge/
H A Dnxge_fflp_hw.h299 #define TCAM_CTL_RWC_RAM_RD 0x5 macro
/titanic_50/usr/src/uts/common/io/nxge/npi/
H A Dnpi_fflp.c566 tctl.bits.ldw.rwc = TCAM_CTL_RWC_RAM_RD; in npi_fflp_tcam_asc_ram_entry_read()