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Searched refs:SAD_DRAM_RULE_ENABLE (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/intel/io/intel_nhm/
H A Dintel_nhm.h225 #define SAD_DRAM_RULE_ENABLE(sad) ((sad) & 1) macro
H A Dmem_addr.c921 sad[i].enable = SAD_DRAM_RULE_ENABLE(sad_dram_rule); in mem_reg_init()