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Searched refs:RX_DMA_ENT_MSK_REG (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/nxge/npi/
H A Dnpi_rxdma.c49 RCRSTAT_C_REG, RX_DMA_ENT_MSK_REG, RX_DMA_CTL_STAT_REG, RCR_FLSH_REG,
2250 RXDMA_REG_READ64(handle, RX_DMA_ENT_MSK_REG, channel, in npi_rxdma_event_mask()
2255 RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel, in npi_rxdma_event_mask()
2260 RXDMA_REG_READ64(handle, RX_DMA_ENT_MSK_REG, channel, in npi_rxdma_event_mask()
2262 RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel, in npi_rxdma_event_mask()
2314 RXDMA_REG_READ64(handle, RX_DMA_ENT_MSK_REG, channel, in npi_rxdma_event_mask_config()
2319 RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel, in npi_rxdma_event_mask_config()
2324 RXDMA_REG_READ64(handle, RX_DMA_ENT_MSK_REG, channel, &value); in npi_rxdma_event_mask_config()
2325 RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel, in npi_rxdma_event_mask_config()
2330 RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel, in npi_rxdma_event_mask_config()
/titanic_50/usr/src/uts/common/sys/nxge/
H A Dnxge_rxdma_hw.h782 #define RX_DMA_ENT_MSK_REG (DMC + 0x00068) macro